CHAPTER 12

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Instructor: Afroza Sultana

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Classification Of Memory

MEMORY

PRIMARY MEMORY

SECONDARY MEMORY PROCESSOR

MEMORY

REGISTER CACHE

ROM RAM

MAGNETIC MEMORY OPTICAL MEMORY SEMICONDUCTOR SEMICONDUCTOR MEMORY

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Memory Terminology

• Memory Cell: A device or an electric circuit used to store a single bit. Example: FF.g p

• Memory Word: A group of bits that represents instruction or type of data. Word size range from 8 – 64 bits.

• Byte: A group of 8 bits

• Capacity (Density) : A way of specifying how many bits

b t d i ti l d i

can be stored in a particular memory device.

Ex: 4096 20-bit words

= 81,920 bits = 4096*20 = 4K*20 - 1 M or 1 meg = 2²⁰

- 1 G or 1 giga = 2³⁰

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Memory Terminology

• Address: A unique number that identifies the location of a word in

memory ^w

memory.

• Read Operation: The operation by which a word is fetched from which a word is fetched from memory.

• Write Operation: The operation by whitch a word is stored/written into memory.

• Access Time: A measure of

• Access Time: A measure of memory’s operating speed. It is the amount of time required to perform

d ti

a read operation.

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Memory Hierarchies

MICROPROCESSOR REGISTER

BUILT IN CACHE/ RAM BUILT-IN CACHE/ RAM

EXTERNAL CACHE MAIN MEMORY

SECONDARY MEMORY

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Registers

• Processor register (or general purpose register) is a small amount of storage available on the CPU whose contents can be accessed more quickly than storage available elsewhere.

Typically, this specialized storage is not considered part of the normal memory range for the machine.

• Processor registers are at the top of the memory hierarchy, and provide the fastest way for a CPU to access data

and provide the fastest way for a CPU to access data.

• Registers are normally measured by the number of bits they can hold, for example, an "8-bit register" or a "32-bit register".

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Cache Memory

• Cache memory is high-speed memory that holds the most recent data and instructions that have been loaded by the CPU. A CPU cache is used to reduce the average time to CPU. A CPU cache is used to reduce the average time to access memory.

• When the processor needs to read from or write to a location in main memory it first checks whether a copy of that data is in main memory, it first checks whether a copy of that data is in the cache. If so, the processor immediately reads from or writes to the cache, which is much faster than reading from or writing to main memory

or writing to main memory.

• Cache is located directly on the CPU or between the CPU and RAM, making it faster than normal RAM.g

• CPU-resident cache is called Level-1 (L1) cache. External cache is called Level-2 (L2) cache.

• The amount of cache memory has a tremendous impact on the computer's speed.

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Data Transfer between CPU and Cache

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Primary Memory

ROM RAM

Read Only Memory Random Access Memory Can not be changed Can be changed any time Non volatile and

permanent

Volatile memory Types: PROM EPROM Types: Static RAM Types: PROM, EPROM,

EEPROM

Types: Static RAM, Dynamic RAM

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CPU-Memory Connections

Fig 12-5 Three groups of lines connect the main memory ICs to CPU.

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Computer Bus

A bus is a path between the components of a computer. Data and instructions travel along these paths The types of buses are:

• Data Bus

paths. The types of buses are:

Data Bus

• Address Bus

• Control Bus

• Expansion Bus

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Computer Bus

• The Data Bus: The width of data bus determines how many bits can be transmitted between the CPU and other devices This is a bi-directional bus and carries the data to devices. This is a bi directional bus and carries the data to and from CPU.

The Address Bus: This bus runs only between the CPU

• The Address Bus: This bus runs only between the CPU and RAM, and carries nothing but memory addresses for the CPU to use. This bus is unidirectional.

• The Control Bus: This bus carries control signals from the control unit to each and every part of the system and control unit to each and every part of the system and controls every operation.

• Expansion Bus: Peripheral devices are connected to the

• Expansion Bus: Peripheral devices are connected to the CPU by an expansion bus.

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General Memory Operation General Memory Operation

1. Select the address in memory that is being y g accessed for a r/w operation

2. Select r/w operation to be performed

3. Supply the input data to be stored in memory during a write operation

4 Hold the output data coming from memory during a 4. Hold the output data coming from memory during a

read operation

5. Enable (or Disable) the memory so that it will (or will not) respond to the address and r/w command.

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32 × 4 Memory IC

FIG 12-3 (a) Diagram of a 32 × 4 memory; (b) virtual arrangement of memory cells into 32 four-bit words.

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Memory Read and Write Operations

Fig 12 4 (a) writing the data word 0100 into memory location 00011; (b) Fig 12-4 (a) writing the data word 0100 into memory location 00011; (b)

reading the data word 1101 from memory location 11110.

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General Memory Operation

• Write Operation

1. CPU supplies the binary address of the locationpp y 2. CPU places the data on the data bus line

3. CPU activates the appropriate control signals 4. Memory decodes the binary address

5. Data are transferred to the selected location

• Read Operation

1 CPU supplies the binary address of the location 1. CPU supplies the binary address of the location 2. CPU activates the appropriate control signals 3. Memory decodes the binary address

3 e o y decodes t e b a y add ess 4. Memory places data onto the data bus

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ROM

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ROM Architecture

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Types of ROMs

• Mask-programmed ROM (MROM)

• Programmable ROM (PROM)

• Erasable Programmable ROM (EPROM)

• Electrically Erasable Programmable ROM (EEPROM) CD ROM

• CD ROM

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MROMs

• It is programmed by the manufacturer accordingp g y g to customer’s specification.

• A mask is used to control the electrical interconnections on the chip.

• It can not be reprogrammed.

• Expensive.

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MROMs

Fig 12-9 MOS MROM (Mask-programmed ROM)

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PROMs

• Programmable Read Only Memoryg y y

• Fusible link is used for interconnection.

• It is programmed by the user

• It is programmed by the user.

• Once it is programmed, it can not be changed ie

‘one time programmable’ ROMone time programmable ROM.

• The process of programming a PROM is extremely time consuming and tedious

time consuming and tedious.

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PROMs

Fig 12-11 Programmable ROMs (PROMs) use fusible links that can be selectively blown open by the user to program a logic 0 into a cell.

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EPROMs

• Erasable Programmable Read Only Memory.

• It can be erased and programmed by the user.

• The programming process involves the applicationThe programming process involves the application of special voltage levels.

• Erasing process involves expensive UV technology.

• Selected cells can not be erased.

• High density and low cost per bit.High density and low cost per bit.

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EEPROMs

• Electrically Erasable Programmable Read Only Memory.

• Erased an programmed by the user.

• Erasing and programming can be done rapidly using

• Erasing and programming can be done rapidly using electrical power.

• It can be erased and reprogrammed in circuit on byteIt can be erased and reprogrammed in circuit on byte by byte basis.

• Faster read access than EPROM.

• Lower density and higher cost per bit than EPROMs.

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CD ROM

• Used as secondary storage device.

• The disks are manufactured with a highly reflective surface.

• Digital data are stored on the disk one bit at a time by burning or not burning a pit into the

fl i i

reflective coating.

• Quicker access time for retrieving data.

• Inexpensive and can store large amount of data.

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Flash Memory

• Semiconductor nonvolatile memory used as

y

Semiconductor nonvolatile memory used as auxiliary storage.

• Made of slightly larger single transistor EPROMg y g g cell.

• High density closer to EPROM.g y

• Allows electrical bulk-erase or sector erase operation.

• Cost is considerably less than EEPROM but not closer to EPROM.

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ROM Applications

• Firmware: OS programs and language interpreters.

• Bootstrap Memory:p y when the computer is powered on, itp p , will execute the instructions that are in bootstrap program.

• Data Tables: store tables that do not changes like trigonometric table, log table etc.

• Data Converter: used to store code conversion like BCD to

bi d

binary code.

• Function Generator: used to generate different functional wave like sine wave square wave saw tooth wave etc

wave like sine wave, square wave, saw- tooth wave etc.

• Auxiliary Storage: used as cost effective flash memory.

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Semiconductor RAM Semiconductor RAM

• When the term RAM is used with semiconductor memories, it is usually taken to mean read/write memory (RWM) as opposed to ROM.

• Major disadvantage: volatile

• Main advantage: can be written into and read from rapidly with equal ease

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RAM Architecture

Fig 12-19 Internal organization of a 64 × 4 RAM

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Static RAM

• SRAM can store data as long as power is applied

Static RAM

g p pp

to the chip.

• Made by semiconductor devicesy

• Faster operation

Comparatively expensive

• Comparatively expensive

• High power consumption

• Low data density

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Dynamic RAM (DRAM) Dynamic RAM (DRAM)

• Store 1s and 0s as charges on a small MOSg capacitor

• Because of the tendency for these charges to leak off after period of time, DRAMs require periodic recharging of the memory cells (refreshing)

L iti d l ti

• Larger capacities and lower power consumption

• Comparatively Cheaper

• Slower operation

• Data density is four times of that of SRAM

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