MSI LOGIC CIRCUITS

(1)

CHAPTER -9

Instructor: Afroza Sultana

(2)

Digital IC Technology

• SSI (Small Scale Integration) – fewer than 12 gates per chip

• MSI (Medium Scale Integration) – 13 to 99 gates per chip

• LSI (Large Scale Integration) – 100 to 999 gates per chip

• VLSI (Very Large Scale Integration) – 1000 to 999,999 gates per chip

• ULSI (Ultra Large Scale Integration) – 1000,000 to 999999U S (U t a a ge Sca e teg at o ) 000,000 to 999999 gates per chip

• GSI (Giga Scale Integration) – 1000000 or more gates per chipGSI (Giga Scale Integration) – 1000000 or more gates per chip

(3)

The evolution of IC technique

Tran Single SSI MSI LSI VLSI ULSI GSI 1947 1950 1961 1966 1971 1980 1985 1990

sistor compon ent

100 1000 20000

Logic Gate count

---- ---- 10

100

~ 1000

1000

~ 20000

20000

~ 500,000

>

500,000

>

10,000,000

(4)

Decoders

A decoder accepts a set of inputs that represents a binary number and activates only the output that corresponds to that input number.

Fig 9-1 General decoder diagram

(5)

3-line-to-8-line (or 1-of-8) decoder

(6)

3-line-to-8-line (or 1-of-8) decoder

Some decoders have one or more ENABLE inputs used to control the operation of the decoder

decoder.

Fig 9-3

(a) Logic diagram for 74ALS138 decoder (b) truth table

(c) logic symbol

(7)

1-of-32 decoder

FIG 9-4 Four 74AS138s forming a 1-of-32 decoder

(8)

1-of-32 decoder

• The IC 74LS138 and an INVERTER can be arranged to function as a 1 of 32 decoders.

• The 5-bit input code A₄A₃A₂A₁A₀will activate the output from 0 to 31.

• The IC Z1 will output the codes from 00000-00111

• The IC Z1 will activate for A₄A₃= 00, Z2 will activate for A₄A₃= 01, IC Z3 will activate for A₄A₃= 10 and Z4

ill ti t f A A 11 will activate for A₄A₃= 11.

(9)

BCD-to-decimal decoder

(10)

BCD to 7-Segment Decoder/Drivers BCD to 7 Segment Decoder/Drivers

Fig 9-7 (a) 7- segment arrangement display (b) active segments for each digit

(11)

BCD to 7-Segment Decoder/Drivers

BCD-to-7-segment decoder/driver driving a 7-segment LED display

(12)

Encoder

The opposite of decoding process is called encoding and it is performed by a logic circuit called encoder.

Di it l i it th t d t t d

Digital circuit that produces an output code depending on which of its inputs is activated.

Fig 9-12 General encoder diagram.

(13)

Octal-to-binary (8-line-to-3-line) Encoder

Fig 9-13 Logic circuit for an octal-to-binary (8-line-to-3-line) encoder For proper operation only one input should be encoder. For proper operation, only one input should be

active at one time.

(14)

Priority Encoder

A priority encoder includes the necessary logic to ensure that when two or more inputs are activated, the output code will correspond to the highest-numbered input.

Fig 9-14 74147 decimal-to-BCD priority encoder.

(15)

Multiplexers (Data Selectors)

It is a logic circuit that, depending on its select inputs, selects one of several data inputs and pass it to the

t t output.

Fig 9-18 Functional diagram of a digital multiplexer (MUX).

(16)

Multiplexers

Fig 9-19 Two-input multiplexer.g p p

(17)

Multiplexers Multiplexers

Fig 9-20 Four-input multiplexer.

(18)

8- input Multiplexer

(19)

16-input Multiplexer

Fig 9-22 Ex. 9-9; two 74HC151s combined to form a 16-input multiplexer.

(20)

Multiplexer Applications

D t R ti

Data Routing: Multiplexers can route data from one of several sources to one destination. Fig 9-24shows a system for displaying two multi digit BCD counters one at a time.

(21)

Multiplexer Applications

Parallel-to-Serial Conversion:

(22)

Multiplexer Applications

Operation Sequencing: The circuit of Fig 9-26 Seven-step control Ope at o Seque c g e c cu t o g 9 6 Se e step co t o sequencer uses an 8-input mux as part of control sequencer that steps through seven steps each of which actuates some portion of the physical process being controlled.

(23)

Multiplexer Applications

Logic Function Generation:

Fig 9-27 Mux used to implement a logic function

(24)

Demultiplexers (Data Distributors)

A DEMUX takes a single input and distributes it over several outputs.p

(25)

1-line-to-8-line demux

(26)

De-Multiplexer Applications

• Clock Demultiplexer: Under control of the SELECT

p pp

Clock Demultiplexer: Under control of the SELECT inputs the clock signal is routed to the desired destination (fig-9-31).

S S /

• Security Monitoring System: The open/close status of an industrial plant is monitored and displayed by LEDs on a remote monitoring panel at the securityg p y station (fig:9-32).

• Synchronous Data Transmission System: Used to

i ll t it f 4 bit d t d f

serially transmit four 4-bit data words from a transmitter to a remote receiver (fig:9-33).

(27)

Code Converters

A d t i l i i it th t h d t A code converter is a logic circuit that changes data presented in one type of binary code to another type of binary code. y

Fig 9-39 Basic idea of a two-digit BCD-to-binary converter.

(28)