Continuous-time signal is "the function of continuous-time variable that has uncountable or infinite sets of numbers in its order". The continuous-time signal can be represented and defined at any point in time in its sequence. It is a digital representation of a continuous-time signal. The discrete-time signal can be represented and defined at specific times in its sequence.
Working Principle of Op-Amp
AOL is the open-loop gain for the given op-amp and is constant (ideally). Note that this is an ideal condition, in practice there are small imbalances in the opamp.
DIFFERENTIAL AND COMMONMODE OPERATION
It is also true that if we apply small differential input voltage, the operational amplifier amplifies it to a significant value, but this significant value at the output cannot go beyond the supply voltage of the op-amp. Ideal Voltage Transfer Curve โ The ideal op-amp produces the output proportional to the difference between the two input voltages.
Virtual Ground Concept โ OPAMP
Using Infinite Voltage Gain
- SUMMING AMPLIFIER
- DIFFERENCE AMPLIFIER OR OP AMP SUBTRACTOR
- VOLTAGE BUFFER
- OP AMP AS INTEGRATOR
- OP AMP DIFFERENTIATOR
Here, in the circuit, the non-inverting terminal of the op amp is grounded, so the potential on that terminal is zero. We know that the voltage on both the inverting and non-inverting terminals of an ideal op amp is the same.
OPAMP PARAMETERS
We will first assume that the op-amp used here is an ideal op-amp. It is also known to us that the current entering through inverting and non-inverting terminal of an ideal op amp is zero.
1.COMMON-MODE REJECTION RATIO
Differentiator is an op-amp based circuit, whose output signal is proportional to differentiation of input signal. An op amp differentiator is basically an inverting amplifier with a capacitor of suitable value at its input terminal. Considering these conditions of an ideal op-amp, if we apply Kirchhoff's current law at node 1 of the op-amp-differentiator circuit, we get,.
2.INPUT OFFSET VOLTAGE
GAINโBANDWIDTH
One could therefore refer to the point where the gain is reduced to 1 as the unit-gain frequency (f1) or the unit-gain bandwidth (B1). The equation shows that the unit-gain frequency can also be called the gain-bandwidth product of the op-amp.
Pin Diagram of an Op Amp IC
The non-inverting input is an AC (or DC) signal applied to a differential amplifier that produces the same polarity signal at the output of the operational amplifier. The output of the initial stage is fed to the intermediate stage, which is driven by the output of the input stage.
SEMICONDUCTOR DIODE
Definition of Semiconductor
I CHARACTERSTICS OF DIODE
During the positive half cycle of the AC voltage, the diode will be forward biased and current flows through the diode. During the negative half cycle of the AC voltage, the diode will be reverse biased and the current will be blocked.
FULL WAVE RECTIFIERS
During the positive half cycle of the secondary voltage, end A becomes positive and end B becomes negative. When the diode D1 conducts, current (i) flows through the diode D1 load resistor RL (from M to L) and the upper half of the secondary winding, as shown in the circuit diagram marked by the red arrowheads. During the positive half cycle of the secondary voltage, end A becomes positive and end B becomes negative, as shown in the figure below.
The ripple factor is the ratio between the RMS value of the AC voltage (on the input side) and the DC voltage (on the output side) of the rectifier.
MODULE-II
BIPOLAR JUNCTION TRANSISTOR
The electrons then combine with the hole carriers in the base to complete the emitter-base circuit. Most of the electrons flow through to the collector as the collector terminal is connected to the positive terminal of the battery and this reverse bias potential is very large so most of the majority charge carriers are attracted and will cross the large base to collector depletion region due to large reverse biased potential. A small change in emitter-to-base bias causes a somewhat larger change in emitter-collector current.
The Common Base (CB) Configuration as amplifier
For p-n-p transistors, the input current is the emitter current (๐ผ๐ธ) and the input voltage is the collector emitter voltage (๐๐ต๐ธ). Since the emitter-base connection is forward, therefore the graph of ๐ผ๐ธ Vs ๐๐ต๐ธ resembles the forward characteristics of a p-n diode.
BASE WIDTH MODULATION/EARLY EFFECT
๐ผ๐ต (Base Current) is the input current, ๐๐ต๐ธ (Base โ Emitter Voltage) is the input voltage for CE (Common Emitter) mode. So the input characteristics for the CE mode are the relationship between ๐ผ๐ต and ๐๐ต๐ธ with ๐๐ถ๐ธ as a parameter. Output characteristics for CE mode are the curve or graph between the collector current (๐ผ๐ถ) and the collector-emitter voltage (๐๐ถ๐ธ) when the base current ๐ผ๐ต is the parameter.
Like the output characteristics of common โ base transistor CE mode also has three regions called (i) Active region, (ii) cutoff regions, (iii) saturation region.
Proper Zero Signal Collector Current
When there is no input signal, DC current flows in the circuit due to VBB. During the positive half-cycle of the input, the base-emitter junction is more forward-biased, so the collector current increases. During the negative half cycle of the input, the input junction is less forward biased, so the collector current is reduced.
The value of zero signal collector current should be at least equal to the maximum collector current due to the signal alone.
Proper Minimum V BE at any instant
Therefore, both cycles of the input appear in the output and thus produce faithful amplification results as shown in the figure below.
Proper flow of zero signal collector current and maintenance of proper collector-emitter voltage during signal conduction is known as Transistor Biasing.
Need for DC biasing
When a line is drawn connecting these two points, such a line can be called Load Line. This line, when drawn across the output characteristic curve, makes contact at a point called the Operating Point. There can be many such intersections, but the Q point is chosen so that regardless of the AC signal swing, the transistor remains in active region.
The transistor acts as a good amplifier when it is in the active region and when operating at the Q point, a faithful gain is achieved.
Faithful amplification is the process of obtaining complete portions of input signal by increasing the signal strength. This is done when AC signal is applied at its input
Fidelity amplification is the process of taking complete parts of the input signal by increasing the power of the signal. Since VCC and RC are fixed values, the above equation is a first-order equation and hence will be a straight line in the output characteristics. To obtain the load line, the two endpoints of the straight line must be determined.
To obtain A
To obtain B
All these methods have the same basic principle of obtaining the required value of IB and IC from VCC in the zero signal conditions. The base-emitter junction is forward biased since the base is positive with respect to the emitter. The required value of the zero signal base current and therefore the collector current (if IC = ฮฒIB) can be made by selecting the appropriate value of base resistance RB.
The analysis will again be performed by first analyzing the base-emitter loop with the results applied to the collector-emitter loop.
PRACTICAL CIRCUIT OF TRANSISTOR AMPLIFIER
CURRENTS IN TRANSISTOR AFTER APPLICATION OF AC SIGNAL
IMPORTANT POINTS
Input impedance Z i
Output impedance Z o
Voltage gain A v
The remodel uses a diode and controlled current source to duplicate the behavior of a transistor. A current controlled current sources is one where the parameters of the current source are controlled by a current elsewhere in the network, in general BJT transistor amplifiers are referred to as current controlled device. Substituting the resulting value of re into Fig 5- 4(b) will lead to the very useful model of Fig 5-5.
For the CE configuration, the transmitter is shared between the input and output ports of the amplifier.
Phase Relationship: The negative sign in the resulting equation for Av reveals that there is a 180ยบ phase shift between the output Vo and the input Vi. Phase Relationship: The negative sign in the resulting equation for Av reveals that there is a 180ยบ phase shift between the output Vo and the input Vi. Example 5: For the network in Fig. 6-14, determine (using a suitable approximation). b) The equivalent AC circuit is shown in Figure 6-15.
Phase relationship: the resulting equation for Av reveals that output Vo and input Vi.
MOSFET
DIGITAL ELECTRONIC PRINCIPLES
- Find 2โs complement of the smaller number
- Add the larger and 2โs complement of the smaller number
- Discard the carry
- After discarding the carry, keep the result which will be answer for subtraction
Just as you can convert any binary number to hexadecimal or convert binary to octal, any number in the binary number system can be converted to the hexadecimal number system. This can also be done in the same way, but after the decimal point the number must be multiplied by 2-. Again the last 1 has been borrowed because the operation performed was 0 โ 1 = 1 borrowing 1 from the second most significant bit and the final result of binary subtraction we got is written in place of the result of the last step.
The computer only understands binary as we know and there is nothing called as negative number in the binary number system but it is absolutely necessary to represent a negative number using binary which can be done by assigning a sign bit to the number which is an extra bit required.
LOGIC GATES AND BOOLEAN ALGEBRA
The laws of Boolean algebra also apply to more than two variables, such as Cumulative laws of Boolean algebra.
DE MORGANโS THEREM,
Now, fill in each of the variables, This is the final simplified form of the Boolean expression,.
LOGIC GATES
LOGIC GATES AND THEIR TRUTH TABLES
The product of sums form is a method (or form) of simplifying the Boolean expressions of logic gates. All these sum terms are AND multiplied together to get the product-of-sum form. When two or more sum terms are multiplied with a Boolean OR operation, the resulting output expression will be in product-of-sums form or POS form.
The form of products of sums is also called conjunctive normal form because the terms of the sum are joined by AND and the conjunction operation is a logical AND.
UNIVERSAL GATES-NAND AND NOR GATES
The SOP format representation is most suitable for their use in FPGAs (Field Programmable Gate Arrays). Writing the input variables if the value is 1 and writing the complement of the variable if its value is 0. Here the sum terms are defined using the OR operation and the product term is defined using the AND operation.
NAND GATE AS UNIVERSAL GATE
EXNOR GATE FROM NAND GATE
NOR GATE AS UNIVERSAL GATE
EXNOR GATE FROM NOR GATE
EXOR GATE FROM NOR GATE