Control of Inverters Via a Virtual Capacitor to Achieve Capacitive Output Impedance

Control of Inverters Via a Virtual Capacitor to Achieve Capacitive Output Impedance

Qing-Chang Zhong, Senior Member, IEEE, and Yu Zeng

Abstract—Mainstream inverters have inductive output impedance at low frequencies (such inverters are called L-inverters). In this paper, a control strategy is proposed to make the output impedance of an inverter capacitive at low frequencies (such inverters are called C-inverters). The proposed control strategy involves the feedback of the inductor current through an integrator, which is actually the impedance of a virtual capacitor.

The gain of the integrator or the virtual capacitance is first selected to guarantee the stability of the current feedback loop and then optimized to minimize the total harmonic distortion (THD) of the output voltage. Moreover, some guidelines are developed to facilitate the selection of the filter components for C-inverters.

Simulation and experimental results are provided to demonstrate the feasibility and excellent performance of C-inverters, with the filter parameters of the test rig selected according to the guidelines developed. It is shown that, with the same hardware, the lowest voltage THD is obtained when the inverter is designed to be a C-inverter. A by product of this study is that, as long as the current ripples are kept within the desired range, the filter inductor should be chosen as small as possible in order to reduce voltage harmonics. This helps reduce the size, weight, and volume of the inductor and improve the power density of the inverter.

Index Terms—Inverters with capacitive output impedance (C-inverters), inverters with inductive output impedance (L- inverters), inverters with resistive output impedance (R-inverters), power quality, total harmonic distortion (THD).

I. INTRODUCTION

E

NERGY and sustainability are now on the top agenda of many governments. Smart grids have become one of the main enablers to address energy and sustainability issues.

Renewable energy, distributed generation, hybrid electrical ve- hicles, more-electric aircraft, all-electric ships, smart grids etc.

will become more and more popular. DC/AC converters, also called inverters, play a common role in these applications to convert a dc source into an ac source. Arguably, the integra- tion of renewable and distributed energy sources, energy stor-

Manuscript received February 11, 2013; revised May 5, 2013, September 1, 2013, and October 26, 2013; accepted November 21, 2013. Date of current ver- sion May 30, 2014. This work was supported by the EPSRC, U.K. under Grants EP/J001333/1 and EP/J01558X/1. Some preliminary results were presented at the 37th Annual Conference of the IEEE Industrial Electronics Society, Mel- bourne, Australia, November 2011. Recommended for publication by Associate Editor Dr. A. M. Trzynadlowski.

Q.-C. Zhong is with the Deparment of Automatic Control and Systems Engineering, The University of Sheffield, Sheffield S1 3JD, U.K., and with the China Electric Power Research Institute (CEPRI), Beijing, China (e-mail:

zhongqc@ieee.org).

Y. Zeng is with the Department of Automatic Control and Systems Engineer- ing, The University of Sheffield, Sheffield S1 3JD, U.K.

Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2013.2294425

age, and demand-side resources into smart grids is the largest

“new frontier” for smart grid advancements [1], [2]. Inverters are also widely used in uninterruptible power supplies, induc- tion heating, high-voltage dc transmission, variable-frequency drives, electric vehicle drives, air conditioning, vehicle-to-grid etc. and, hence, have become a common key device for many energy-related applications. How to control the inverters is crit- ical for these applications.

There are several important control problems associated with inverters. For example, how to make sure that the total harmonic distortion (THD) of the inverter voltage remains within a cer- tain range when the loads are nonlinear and the grid voltage, if present, is distorted; how to make sure that the output voltage of an inverter is maintained within a certain range; how to share loads proportionally according to their power ratings when in- verters are operated in parallel; how to make sure that inverters can be operated in the grid-connected mode and the standalone mode and how to minimize the transient dynamics when the operation mode is changed [3]; how to connect inverters to the grid in a grid-friendly manner so that the impact on the grid is minimized [4], [5]; and how to minimize the total microgrid operating cost [6], etc. There have been a lot of research ac- tivities on these problems, from one aspect to another, and a systematic treatment of the control problems related to inverters in renewable energy and smart grid integration can be found in [1].

The voltage THD can be improved by using deadbeat or hysteresis controllers [7], [8], selective harmonic elimination pulsewidth modulation strategies [9], and repetitive controllers [10]–[16] [17], [18], injecting harmonic voltages [19], [20], in- troducing a voltage feedback loop [21] etc. Another way is to investigate the role of the output impedance as it is known that the output filter also contributes to the output voltage qual- ity [22]–[25]. It is well known that mainstream inverters have inductive output impedance at low frequencies because of the filter inductor. Moreover, the output impedance of an inverter can also change with the control strategy adopted [26]–[30].

The general understanding is that inverters with resistive out- put impedance are better than inverters with inductive output impedance because resistive output impedance makes the com- pensation of harmonics easier. Some questions pop up imme- diately. For example: 1) Is it possible to have inverters with capacitive output impedance? 2) If so, what are the advantages, if any? 3) If so, how to achieve parallel operation for such invert- ers? The preliminary results presented in [31] have shown that an inverter can be designed to have capacitive output impedance.

This concept has been further developed in [32] to implement active capacitors that are accurate and stable with respect to the

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change of environmental factors, e.g., temperature and humidity.

In order to facilitate the presentation, inverters with inductive, resistive, and capacitive output impedance are called L-, R-, and C-inverters, respectively.

In this paper, a simple but effective control strategy is pro- posed to design the output impedance of an inverter to be ca- pacitive, following [1], [31]. Then, the control parameter (i.e., the output capacitance) is designed to guarantee the stability and, furthermore, optimized to minimize the THD of the output voltage. Moreover, detailed analyses are carried out to provide guidelines for selecting the filter components for C-inverters.

Note that the typically-needed voltage loop to track a voltage reference [26], [27], [33] is not adopted, which reduces the num- ber of control parameters and the complexity of the controller.

Experimental results are presented to demonstrate the feasibility and performance of C-inverters and the guidelines for the com- ponent selection. It is shown that, with the same hardware, the lowest voltage THD is obtained when the inverter is designed to be a C-inverter.

Note that the output impedance of an inverter can be defined at different terminals that have different pairs of voltage and current and hence can be different. In this paper, the output impedance of an inverter is defined at the terminal with the output voltage and the filter inductor current. In order to avoid confusion, the output impedance that takes into account the effect of the filter capacitor and the control strategy is called the overall output impedance. At low frequencies, for which the major voltage harmonics are concerned, the overall output impedance is more or less the same as the output impedance without considering the filter capacitor.

The rest of the paper is organized as follows. A controller is proposed in Section II to force the output impedance of an inverter to be capacitive and the stability is analyzed. The con- trol parameter is optimized to minimize the voltage THD in Section III and guidelines for selecting the filter components are provided in Section IV. Experimental and simulation results are presented in Section V and VI, followed by conclusions and discussions made in Section VII.

II. DESIGN OFC-INVERTERS

A. Implementation

Fig. 1(a) shows an inverter, which consists of a single-phase H-bridge inverter powered by a dc source, and an LC filter.

The control signaluis converted to a PWM signal to drive the H-bridge so that the average ofuf over a switching period is the same asu, i.e.,u≈uf. Different PWM techniques and the associated switching effect play an important role in inverter design [34]–[36] but from the control point of view, the PWM block and the H-bridge can be ignored when designing the con- troller; see, e.g., [37]–[40]. In particular, this is true when the switching frequency is high enough. The inverter can be mod- eled as shown in Fig. 1(b) as the series connection of a voltage referencev_r and the output impedanceZ_o, taking the voltage v_o as the output voltage and the currentias the output current.

This is equivalent to regarding the filter capacitor as a part of the load [37]. The output impedanceZ_o is inductive when no

(a)

(b)

Fig. 1. Single-phase inverter. (a) Descriptive circuit. (b) Simplified model with terminal voltagevo and terminal currenti.

Fig. 2. Controller to make the output impedance of an inverter capacitive.

controller is adopted and can be made resistive after introducing the proportional feedback of the filter inductor current, which is often used to dampen oscillations in the system. Here, the con- troller shown in Fig. 2 is proposed to make the output impedance of an inverter capacitive.

The following two equations hold for the closed-loop system consisting of Fig. 1(a) and Fig. 2:

u=vr− 1 sCo

i, and uf = (R+sL)i+vo (1) whereRis the equivalent series resistance of the inductor. It is normally small but not exactly0. Since the average ofu_f over a switching period is the same asu, there is (approximately)

vr− 1

sC_oi= (R+sL)i+vo (2) which leads to

vo =vr−Zo(s)·i (3) with the output impedanceZo(s)given by

Z_o(s) =R+sL+ 1 sCo

. (4)

As a result, the integrator block _sC¹

o is added virtually to the original output impedance of the inverter. This is equivalent to connecting a virtual capacitorC_o (inside the inverter) in series

with the filter inductorL. It is worth noting that the original filter capacitorC is still required. Although the virtual capacitance introduced by the feedback changes the output impedance within the bandwidth of the controller, the switching noises are often far beyond the reach of this control and an LC filter is still needed to suppress switching noises. The impact of the control strategy is on the change of the inverter dynamics, with some practical implications discussed in the rest of this section.

If the capacitorC_o is chosen small enough, the effect of the inductor (R+sL) is not significant and the output impedance can be made nearly purely capacitive around the fundamental frequency, i.e., roughly

Zo(s)≈ 1 sCo

. (5)

Hence, the virtual capacitorC_oresonates with the filter inductor Lat a frequency higher than the fundamental frequency, which is able to reduce the harmonic voltage dropped on the filter inductor caused by the harmonic components of the load current.

This allows C-inverters to achieve better voltage quality than R- and L- inverters without additional hardware cost.

B. Stability of the Current Loop

When the controller is implemented digitally, the effect of computation and PWM conversion can be approximated by a one-step delaye^−sTs, whereTsis the sampling period. Hence, the approximate block diagram of the current loop can be derived as shown in Fig. 3(a). The corresponding open-loop transfer function is

L(s) = 1 sC_o

1

sL+Re^−sTs (6) which has a pole ats= 0but does not have any unstable poles in the right-half-plane of thes-domain. A typical Nyquist plot of such systems is shown in Fig. 3(b). In order to make sure that the system is stable, according to the well-known Nyquist theorem, the plot should not encircle the critical point(−1,0).

Assume that the plot crosses the real axis for the first time at the frequencyω0, thenω0satisfies

−π

2 −atanω₀L

R −ω₀T_s =−π. (7) In other words, ω₀ can be found as the first positive number from 0 that satisfies

R

ω0L = tan(ω0Ts). (8) At this frequency, the loop gain ¹

ω0Co

√ω²₀L²+R² should be less than1. In other words, the loop is stable if

1 Co

< ω₀

ω²₀L²+R². (9) It can be easily seen that

0< ω₀ < π 2Ts

. (10)

Hence, the current loop is stable if 1

C_o < π 2T_s

πL

2T_{s 2}

+R² (11)

(a)

(b)

Fig. 3. The current loop. (a) Approximate block diagram. (b) Typical Nyquist plot.

of which the right-hand side is about(_2T^π

s)²Lfor smallR≈0.

In other words, the loop is stable if the capacitanceCo or the sampling frequencyfs= _T¹

s is chosen large enough so that the sampling frequency fs is larger than four times the resonant frequency_2π^√1_{L C}

o withL, which can be easily met without any problem. Note thatRis not exactly zero in reality, which helps maintain the stability of the loop.

C. DC Offset in the System

Because of the presence of the integrator_sC¹

o, any dc offset in the currenti, e.g., that is caused by the conversion process or faults in the system etc., would lead to a dc offset in the output voltage. In order to avoid this problem, some simple mechanisms can be adopted. For example, the integrator _sC¹ can be reset when the inductor current passes zero if the offseto

exceeds a given level. Alternatively, the integrator _sC¹_o can be slightly modified as _sC¹

o+ with a negligible positive number ≈0. This is equivalent to putting a large resistor ¹ in parallel with Co, which does not change the performance at non-dc frequencies.

III. OPTIMIZATION OF THEVOLTAGEQUALITY

Assume that the output current of the inverter is i=√

2Σ^∞_{h= 1}Ihsin(hωt+φh) (12)

where ω is the system frequency. Then, the amplitude of the h-th harmonic voltage dropped on the output impedance is

√2Ih|Zo(jhω)|. Moreover, assume that the voltage reference vris clean and sinusoidal and is described as

vr =√

2Esin(ωt+δ). (13) Then, the fundamental component of the output voltage is

v₁=√

2Esin(ωt+δ)−√

2I₁|Z_o(jω)|sin(ωt+φ₁+θ) (14)

=√

2V₁sin(ωt+β) (15)

with V1=

E²+I₁²|Zo(jω)|²−2EI1|Zo(jω)|cos(φ1+θ−δ) (16) β = arctan

ω|Z_o(jω)|sin(φ₁+θ−δ) I1|Zo(jω)|cos(φ1+θ−δ)−E

. (17) The sum of all harmonic components in the output voltage is

vH =√

2Σ^∞_{h= 2}Ih|Zo(jhω)|sin(hωt+φh+∠Zo(jhω)).

(18) It is clear thatv1 andvH do not affect each other.v1 is deter- mined by the clean reference voltage, the fundamental current and the output impedance at the fundamental frequency.vH is determined by the harmonic current components and the output impedance at the harmonic frequencies.

According to the definition of THD, the THD of the output voltage is

THD=

Σ^∞_{h= 2}I_h²|Zo(jhω)|²

V1 ×100%. (19)

Hence, the THD is mainly affected by the output impedance at harmonic frequencies. As a result, it is feasible to optimize the design of the output impedance at harmonic frequencies to minimize the THD of the output voltage.

For the C-inverter designed in the previous section, according to (4), there is

|Zo(jhω^∗)|²=R²+

hω^∗L− 1 hω^∗Co

2

(20) where ω^∗ is the rated angular system frequency. In order to minimize the THD of the output voltage, the virtual capacitor Coshould be chosen to minimize

Σ^∞_{h= 2}I_h²|Zo(jhω^∗)|² (21) because the fundamental componentV₁ can be assumed to be almost constant. This is equivalent to

CominΣ^∞_{h= 2}i²_1h

hω^∗L− 1 hω^∗Co

2

(22)

wherei_1h =^I_I^h

1 is the normalizedh-th harmonic currentI_hwith respect to the fundamental currentI₁. Depending on the distri- bution of the harmonic current components, different strategies can be obtained.

Assume that the harmonic current is negligible for the har- monics higher than the N-th order (with an odd numberN).

Then,Co can be found via solving (22). Define f(Co) = Σ^N_{h= 2}i²_1h

hω^∗L− 1 hω^∗C_o

₂

. (23) Then,Co needs to satisfy

df(Co)

dC_o = 2Σ^N_{h= 2}i²_1h

hω^∗L− 1 hω^∗C_o

1

hω^∗C_o² = 0 (24) which is equivalent to

Σ^N_{h= 2}i²_1h(L− 1

(hω^∗)²C_o) = 0. (25) Hence

Σ^N_{h= 2}i²_1hL= 1 (ω^∗)²Co

Σ^N_{h= 2}i²_1h

h² (26)

and the optimal capacitance can be solved as Co = 1

(ω^∗)²L

Σ^N_{h= 2}ⁱ_h^21h2

Σ^N_{h= 2}i²_1h (27) which is applicable for any current iwith a known harmonic profile. The correspondingf(C_o)is

f_{m in}(C_o) = Σ^N_{h= 2}i²_1h

hω^∗L−ω^∗L h

Σ^N_{h= 2}i²_1h Σ^N_{h= 2}ⁱ_h^21h2

₂

= (ω^∗L)²Σ^N_{h= 2}i²_1h

h−1 h

Σ^N_{h= 2}i²_1h Σ^N_{h= 2}ⁱ_h^21h2

2

. (28) Hence, the THD ofvo is in proportion to the inductanceLof the inverter LC filter. A smallLdoes not only reduce the cost, size, weight, and volume of the inductor but also improves the voltage quality. However, a small Lleads to a high dⁱ

dt for the switches and large current ripples. See the guidelines of selecting the components in the next section for details. Moreover, since

1

Co ∼L, a smallLleads to a small gain for the integrator, which is good for the stability of the current loop.

If the distribution of the harmonic components is not known, then it can be assumed that the even harmonics are zero, which is normally the case, and the odd harmonics are equally distributed.

As a result, the optimalCo can be chosen, according to (27), as Co= 1

(ω^∗)²L

Σh= 3,5,7,..., N 1 h²

Σ^N_{h= 3,5,7,..., N}1 (29)

= 1

(ω^∗)²L

Σ_{h= 3,5,7,..., Nh}¹2

(N−1)/2 . (30) This can be written as

Co = 1 (ω^∗)²L

1 (N−1)/2

1

3² + 1

5² +· · ·+ 1 N²

(31)

1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7

−14

−12

−10

−8

−6

−4

−2 0 2 4 6

ω/ω^*

The gain factor

Original inductor

3rd and 5th 3rd only

5th only

Fig. 4. The gain factors to meet different criteria.

where(N−1)/2is the number of terms in the summation. The correspondingf(Co)is

f_{m in}(C_o) = (ω^∗L)²Σ_{h= 3,5,7,..., N}

×

h−1 h

(N−1)/2 Σ_{h= 3,5,7,..., N h}¹2

2

. (32) If a singleh-th harmonic component is concerned, then the optimalCo is

Co = 1

(hω^∗)²L. (33) This forces the impedance at theh-th harmonic frequency close to0and hence no voltage at this frequency is caused, assum- ing R= 0. According to the stability analysis carried out in the previous section, the current loop is stable in this case if (hω^∗)²L <(_2T^π

s)²L, or in other words, iffs >4hf^∗, where f^∗= ^ω_2π^∗ is the rated system frequency.

A. Special Case I: To Minimize the Third and Fifth Harmonic Components

In most cases, it is enough to consider the third and fifth harmonics only. This gives the optimal capacitance

Co = 17

225(ω^∗)²L. (34) As a result, the output impedance is

Z_o(jω) =R+j

ωL− 1 ωCo

(35)

=R+jω^∗L

ω

ω^∗ −225 17

ω^∗ ω

. (36) The gain factor_ω^ω_∗ −²²⁵₁₇ ^ω_ω^∗of the imaginary part with respect to the normalized frequency_ω^ω_∗ is shown in Fig. 4. It changes from negative to positive at around _ω^ω∗ = 3.638. At the fundamental frequency, i.e., whenω=ω^∗, the output impedance is

Zo =R−j208

17 ω^∗L≈ −j12.23ω^∗L. (37) It is capacitive as expected becauseRis normally smaller than ω^∗L.

B. Special Case II: To Minimize the Third Harmonic Component

In this case, the optimalC_o is Co = 1

(3ω^∗)²L (38) and the corresponding impedance is

Zo(jω) =R+j

ωL− 1 ωCo

(39)

=R+jω^∗L

ω

ω^∗ −9ω^∗ ω

. (40) The gain factor _ω^ω_∗−^9ω_ω^∗ of the imaginary part with respect to the normalized frequency_ω^ω_∗ is also shown in Fig. 4. It changes from negative to positive atω= 3ω^∗. At the fundamental fre- quency, i.e., whenω=ω^∗, the output impedance is

Z_o =R−j8ω^∗L≈ −j8ω^∗L (41) which is capacitive as well.

C. Special Case III: To Minimize the Fifth Harmonic Component

In this case, the optimalCo is C_o = 1

(5ω^∗)²L (42) and the corresponding impedance is

Z_o(jω) =R+j

ωL− 1 ωC_o

(43)

=R+jω^∗L

ω

ω^∗ −25ω^∗ ω

. (44) The gain factor_ω^ω∗−^25ω_ω^∗ of the imaginary part with respect to the normalized frequency_ω^ω∗ is also shown in Fig. 4. It changes from negative to positive atω= 5ω^∗. At the fundamental fre- quency, i.e., whenω=ω^∗, the output impedance is

Zo =R−j24ω^∗L≈ −j24ω^∗L. (45) This is capacitive as well.

IV. COMPONENTSELECTION

A. Selection of the Filter InductorL

As discovered in the previous section, the smaller the filter inductor, the smaller the output impedance and the better the voltage quality. Thus, it is better to have a small output inductor than a big one. This leaves the selection of the filter inductor to meet the requirement on the allowed current ripples only.

According to [23], it is recommended that the current ripples should satisfy

0.15 ΔI

I_ref 0.4 (46) with

ΔI= Udc

4Lf_s (47)

whereΔIis the inductor current ripple andIrefis the rated peak current at the fundamental frequency. Thus, the inductor should be chosen to satisfy

5Udc

8f_sI_ref L 5Udc

3f_sI_ref. (48) This could be applied to analyze the impact on the dc-bus voltage. For example, assume thatLis selected to achieve the maximum current ripple of0.4Iref. Moreover, assume that the peak of theh-th harmonic current reaches50%of I_ref. Then, the voltage drop of theh-th harmonic current on the inductor ishω^∗_8f^{5Ud c}

sIr e f ×^{Ir e f}₂ =^{5h ω}_16f^∗

sU_dc. In other words, the maximum increase of the required dc- bus voltage is ^{5h ω}_16f^∗

s ×100%. For h= 5,fs= 10kHz andω^∗= 100πrad/sec, this is4.9%so it is not demanding at all and there is no need to take any special action when determining the dc-bus voltage.

B. Selection of the Filter CapacitorC

The main function of the LC filter is to attenuate the har- monics generated by the PWM conversion and the H-bridge via reproducing the control signalu, especially the harmonics around the switching frequencyf_s. When there is no load, the transfer function betweenuf andvois

H(s) = 1

s²LC+ 1. (49) Indeed, the virtual capacitor Co does not change the role of the LC filter in suppressing the switching noises because the actual output voltageuf generated by the inverter is still passed through the LC filter. The cut-off frequencyfc can be found from

|H(j2πf_c)|= 1

|1−(2πf_c)²LC| = 1

√2 (50) as

f_c = 1 2π√

LC

√

2 + 1 (51)

which is about1.5times of the resonant frequency_2π^√1_{L C}. Since it is very close to the resonant frequency, it is reasonable to use the resonant frequency when selecting the components.

The overall output impedanceZ(s)after taking into account the filter capacitorCis

Z(s) = Z_o(s)_sC¹

Z_o(s) +_sC¹ = Z_o(s)

sCZ_o(s) + 1. (52) At low frequencies, there is

Z(s)≈Zo(s) =R+sL+ 1 sCo

(53) and at high frequencies, there is

Z(s)≈ 1

sC. (54)

This actually verifies that the definition of the output impedance Z_o without considering the filter capacitorC does not materi- ally affect the analysis at low frequencies. Defining the output

Fig. 5. Overall output impedance of an L-inverter and a C-inverter after taking into account the filter capacitorC.

impedance at the terminal with the output voltage and the filter inductor current is simply to facilitate the presentation.

For conventional inverters, which are mainly L-inverters, Z(s)is inductive at low frequencies. Hence, the overall output impedanceZ(s)changes its type from inductive to capacitive at the resonant frequency. However, according to (52), the overall output impedanceZ(s)for the C-inverters designed above is

Z(s) = sL+R+_sC¹

o

s²LC+sCR+_C^C

o + 1. (55)

It is capacitive at both low frequencies (_sC¹_o) and high frequen- cies (_sC¹ ). In order to better demonstrate this, the Bode plots of the overall output impedances of typical L- and C-inverters are shown in Fig. 5. The output impedance of the C-inverter is ca- pacitive over a wide range of both low and high frequencies and is inductive only over a small range of mid-frequencies. There is a series resonance betweenLandCo, in addition to the parallel resonance betweenLandC, which is slightly changed because ofCo. The output impedance of the L-inverter is inductive for low frequencies up to the resonant frequency of the filter and capacitive for the frequencies above.

The optimization of the voltage quality discussed in the pre- vious subsection is achieved via tuning the series resonance betweenLandCo. Since the load currentiomay include a large amount of harmonic components, especially when the load is nonlinear, the parallel resonance betweenL,C, andC_o should be considered when designing the filter. According to (55), the parallel resonant frequencyf_rcan be obtained as

f_r = 1 2π

C+Co

LCC_o = 1 2π√

LC

C

C_o + 1. (56)

With the same L and C, the resonance frequency fr of C- inverters is higher than, but very close to, that of the corre- sponding L-inverter or R-inverters, which is ¹

2π√

L C, because C_o is often much larger thanC. In order to avoid amplifying some harmonic current components, the resonance frequency f_r is recommended to be chosen between ten times the line fre- quencyω^∗and half of the switching frequencyf_s[23]. Hence, f_r is often far away from the harmonics to be eliminated by designing Co. Indeed, ifCo is designed to eliminate theh-th harmonic, then according to (56), there is

fr = 1 2π√

LCo

C_o

C + 1 = hω^∗ 2π

C_o

C + 1. (57) That is, the resonant frequency is

Co

C + 1times the harmonic frequencyhω^∗under control. If

Co

C + 1>3, thenfr > ^{3h ω}_2π^∗ and it is over nine times the system frequencyω^∗even forh= 3.

Hence, it is recommended to selectfr to satisfy 3hω^∗

2π fr 1

2fs (58)

that is to select the parallel resonant frequency between three times of the harmonic frequency under control and half of the switching frequency. Accordingly, it is recommended to select the filter capacitorCto satisfy

3hω^∗ 2π hω^∗

2π Co

C + 11 2fs

or, equivalently,

Co

(_{h ω}^{π fs}∗)² −1 C1

8Co. (59) V. SIMULATIONRESULTS

Simulations were carried out with a single-phase inverter powered by a 350-V dc voltage supply. The switching frequency is10kHz and the system frequency is50Hz. The rated output voltage is230V and the rated peak current is chosen as 40 A.

Thus, the rated apparent power of the inverter is 6.5 kVA. The load is a full-bridge rectifier loaded with an LC filter (2.2mH, 150μF) and a resistorR_L = 30 Ω. An extra load consisting of a 200−Ωresistor and a22−mH inductor in series is connected att= 2s, and disconnected att= 9sto test the transient re- sponse of C-inverters, R-inverters, and L-inverters. The inverter reference voltage was generated by the robust droop controller proposed in [31], which is shown in Fig. 6 for convenience. As can be seen from Fig. 6, at the steady state, there is

Ke(E^∗−Vo) =niPi

whereV_o is the RMS value of the output voltage. As a result, the RMS output voltage is

V_o =E^∗− n_i Ke

P_i

which shows that the output voltage is regulated and the voltage error could be maintained small via choosing a largeK_e. Hence, there is no need to have an extra voltage loop to regulate the

Fig. 6. The robust droop controller for C-inverters [31] to generate the voltage referencevr.

instantaneous output voltage. The parameters of the robust droop controller were chosen asni= 6.3×10⁻⁴,mi= 3.4×10⁻⁵, andKe= 10, according to [31].

According to (48), the filter inductor should be chosen be- tween0.55mH and1.46mH. To make the output voltage THD small, the inductor is chosen as0.55mH. The virtual capacitor Cois chosen to be1400μFto reduce the third and fifth harmon- ics. According to (59), the filter capacitorCshould satisfy

1.84μFC174μF (60) from which the filter capacitor was selected asC= 20μF.

The simulation results of the C-inverter, together with those of an L-inverter and a R-inverter withKi= 4, are shown in Fig. 7.

The C-inverter achieves lowest output voltage THD among the three types of inverters. When the extra load of a200−Ωresis- tor and a22−mH inductor in series is connected or disconnected, all the three type of inverter are able to respond fast and reach the steady state quickly and smoothly. It can be seen that the transient response of the C-inverter is better than the other two.

VI. EXPERIMENTALVALIDATION

Experiments were carried out with a single-phase inverter powered by a 180-V dc voltage supply, which was obtained from a nonregulated diode rectifier. The switching frequency and the system frequency are the same with the ones used in the simulation, respectively. The rated output voltage is110V and the rated peak current is 8 A. The load is a full-bridge rectifier loaded with an LC filter (2.2mH,150μF) and a resistorRL = 200 Ω. The inverter reference voltage was also generated by the robust droop controller [31] shown in Fig. 6, and the parameters of the robust droop controller were chosen asni= 3.4×10⁻³, mi= 3.9×10⁻⁴, andKe = 10.

According to (48), the filter inductor should be chosen be- tween1.41 and3.75mH. The inductor 2.2mH on board the inverter falls into this range. Three different cases with the vir- tual capacitorC_o chosen to reduce the third harmonic, the fifth harmonic, and both the third and the fifth harmonics, respec- tively, were tested. The corresponding virtual capacitanceC_ois 512μF,184μF, and348μF, respectively. According to (59), the

Fig. 7. Simulation results with the extra load consisting of a200−Ωresistor and a22−mH inductor in series connected att= 2sand disconnected att= 9s:

C-inverter withCo= 1400μF to reduce the third and the fifth harmonics (left column), R-inverter withKi= 4(middle column) and L-inverter (right column).

(a) Active power. (b) Reactive power. (c) Frequency. (d) Output voltage RMSVo. (e) Output voltagevo. (f) THD of output Voltagevo. (g) Inductor currenti.

filter capacitorCshould satisfy

0.46μFC23μF. (61) The filter capacitorC= 10μFon board the inverter falls into this range. The corresponding resonant frequency is 1131Hz for the case withh= 5and1083Hz for the case withh= 3, which leaves enough room for a normal switching frequency, e.g., 5 kHz.

The experimental results are shown in Fig. 8, together with those from an R-inverter withZo = 4 Ωand an L-inverter de- signed according to the current feedback controller proposed in [37] with Ki= 4 and Ki = 0, respectively, for compari- son. When the inverter was designed to have capacitive output impedance to reduce the effect of the third and the fifth har- monics, the third harmonic was reduced by about 50% from the case of the L-inverter and by about65% from the case of the R-inverter, and the fifth harmonic was reduced by about

Fig. 8. Experimental results: output voltagevoand inductor currenti(left column), harmonic distribution ofvo(right column). (a) C-inverter withCo = 348μF to reduce the third and thefifth harmonics. (b) C-inverter withCo= 512μF to reduce the third harmonic. (c) C-inverter withCo= 184μF to reduce the fifth harmonic. (d) R-inverter withKi= 4. (e) L-inverter.

30% and18%, respectively. The THD was reduced by about 40%and50%, respectively. When the inverter was designed to have capacitive output impedance to minimize the effect of the third harmonic, the third harmonic was reduced by63%from the case of the L-inverter and by74%from the case of the R- inverter, respectively. The THD was reduced by about36%and by47%, respectively .When the inverter was designed to have capacitive output impedance to minimize the effect of the fifth harmonic, the fifth harmonic was reduced by41%from the case of the L-inverter and by31%from the case of the R-inverter, respectively. The THD was reduced by about37%and48%, re- spectively. Apparently, C-inverters performed much better than the R- and L-inverters. Moreover, the THD is the lowest when C_o is designed to optimize the third and fifth harmonics than to optimize these two separately. This is because the major har- monic components of the load current are the third and the fifth harmonics, as can be seen from Fig. 8(e).

The recorded average RMS values of the output voltage are 109.7 V for the R-inverter, 110.2 V for the L-inverter, and 109.8 V for the C-inverters, which shows the excellent volt- age regulation capability of the robust droop control strategy.

This is true regardless of the virtual capacitance concept.

VII. CONCLUSION ANDDISCUSSIONS

It has been shown that it is feasible to force the output impedance of an inverter to be capacitive over a wide range of both low and high frequencies although it normally has an inductor connected to the inverter bridge. Such inverters are called C-inverters. One simple but effective approach is to form an inductor current feedback through an integrator, of which the time constant is the desired output capacitance. This is a virtual capacitor, so there is no limit on the current rating and can be applied to any power level. The capacitance can be selected to guarantee the stability of the current loop and an algorithm is proposed to optimize the value of the output capacitance so that the THD of the output voltage is minimized. Detailed guide- lines have been provided to place the relevant frequencies prop- erly so that the filter components can be determined. Extensive experimental results have shown that the THD of an inverter can be reduced when it is designed to have capacitive output impedance, with comparison to an inverter having resistive or inductive output impedance. Moreover, no visible dc offsets are seen from the experimental results. One by product of this study is that the filter inductor should be chosen small in order to re- duce voltage harmonics and the criterion is reduced to meet the current ripples allowed on the inductor. A small inductor helps reduce the size, weight, and volume of the passive components needed.

Since the C-inverter concept is completely new, some issues should be further investigated, in particular, for grid-connected applications. For example, because of the introduction of a ca- pacitor into the output impedance, a natural question is whether this would lead to possible resonance with the rest of the system (such as the line, loads, etc.). This may not be an issue because in flexible ac transmission systems (FACTS), capacitors have been physically connected in series with transmission lines to

improve the line capacity. Another question is whether this will affect the current quality for grid-connected applications. It has been found that C-inverters offer the lowest output voltage THD among R-, L-, and C-inverters with the same hardware. Further investigations should be carried out to explore other advantages and applications of C-inverters.

ACKNOWLEDGMENT

The authors would like to thank the Reviewers and Editors for their detailed comments, which have considerably improved the quality of the paper. Yokogawa Measurement Technologies Ltd is greatly appreciated for the donation of a high-precision wide- bandwidth power meter WT1600 and a digital eight-channel oscilloscope DL7480.

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Qing-Chang Zhong (M’03–SM’04) received the Ph.D. degree in control and engineering from Shang- hai Jiao Tong University, Shanghai, China, in 2000, and the Ph.D. degree in control theory and power en- gineering (awarded the Best Doctoral Thesis Prize) from Imperial College London, London, U.K., in 2004.

He is currently the Chair Professor in Control and Systems Engineering with the Department of Auto- matic Control and Systems Engineering, The Uni- versity of Sheffield, Sheffield, U.K. He is a Distin- guished Lecturer of IEEE Power Electronics Society and is invited to represent the U.K. at the European Control Association. From 2012–2013, he spent a six-month sabbatical at the Cymer Center for Control Systems and Dynamics, University of California, San Diego, CA, USA, and an eight-month sabbatical at the Center for Power Electronics Systems, Virginia Tech, Blacksburg, VA, USA. He (co-)authored three research monographs: Control of Power Inverters in Renewable Energy and Smart Grid Integration (Wiley-IEEE Press, 2013), Robust Control of Time-Delay Systems (Springer-Verlag, 2006), Control of In- tegral Processes with Dead Time (Springer-Verlag, 2010). He also serves as an Associate Editor for IEEE Transactions on Power Electronics, IEEE Access, and the Conference Editorial Board of the IEEE Control Systems Society. His fourth research monograph entitled Completely Autonomous Power Systems (CAPS): Next Generation Smart Grids is scheduled to appear in 2015. He is the architect of the next-generation smart grid based on the synchronization mechanism of synchronous machines and a Specialist recognized by the State Grid Corporation of China, a Fellow of the Institution of Engineering and Tech- nology, the Vice-Chair of IFAC TC 6.3 (Power and Energy Systems) and was a Senior Research Fellow of the Royal Academy of Engineering/Leverhulme Trust, U.K. (2009–2010). His research focuses on advanced control theory and its applications in various sectors, which include power electronics, renewable energy and smart grid integration, electric drives and electric vehicles, robust and H-infinity control, time-delay systems, process control, and mechatronics.

Dr. Zhong, jointly with G. Weiss, invented the synchronverter technology to operate inverters to mimic synchronous generators, which was awarded Highly Commended at the 2009 IET Innovation Awards.

Yu Zeng received the B.Eng. degree in automation from Central South University, Changsha, China, in 2009. She is currently working toward the Ph.D. de- gree from the Department of Automatic Control and Systems Engineering, the University of Sheffield, Sheffield, U.K.

Her research interests include control of power electronic systems, microgrids, and distributed gen- eration, in particular, the parallel operation of inverters.