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Baseband Processor Design of Multi-purpose RFID Tag

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To the best of my knowledge, the matter contained in the thesis has not been submitted by any other university/institute for the award of any degree or diploma. First of all, we would like to express our deepest gratitude to our project supervisor Prof. Debiprasad Priyabrata Acharya, Department of Electronics and Communication Engineering, for giving us the opportunity to work on such an interesting topic. Object identification and tracking, supply chain management, anti-theft and fraud systems are just some of the uses that RFID tags find in today's market.

As RFID technology competes with other technologies present in the market, a lot of research has been done to optimize the performance and cost factors of the readers and tags included in the RFID system. This architecture takes into account the flexibility of the entire system with the help of independent sub-modules. The RFID tag has been designed according to the EPCglobal Class1 Generation2 standard to operate in the 860-960 MHz range in the air interface.

The design of the label components was done with the help of XILINX and the verifications and analyzes with ModelSim.

INTRODUCTION AND LI

  • WHAT IS RFID?
  • APPLICATIONS OF RFID
  • TYPES OF RFID TAGS
  • RFID STANDARDS
  • PARTS OF AN RFID SYSTEM
  • WORKING OF AN RFID SYSTEM

For the purpose of achieving long-range tracking, the UHF RFID standard was used for the design of the tag. The data modulation scheme for the reader to mark communications to be used is double-sided ASK (DSB-ASK), single-sideband ASK (SSB-ASK), and phase-reversal ASK (PR-ASK). Reader: The main purpose of this device is to send a probing signal to the tag and receive the corresponding response signals for the single or multiple tags and pass the identification information to the database for useful interpretation.

Tag: The tag is equipped with a memory in which the identification data of the object on which it is deployed is stored. The tag contains the identification information and it is the reader's job to retrieve it. The reader demodulator receives this information and passes it to the database after the necessary processing.

The database performs the necessary operations on the received data and returns useful information to the user.

Fig 1.1: ISO/IEC 18000-6 C Standard Specifications  1.5 PARTS OF AN RFID SYSTEM
Fig 1.1: ISO/IEC 18000-6 C Standard Specifications 1.5 PARTS OF AN RFID SYSTEM

MODEL AND ARCHITECHTURE

READER-TAG MODEL

  • The Conventional Single-purpose tag
  • Multipurpose Tag Environment
  • Implementing the Multipurpose RFID Tag
  • Advantages of the Multipurpose tag over the single purpose tag

When exposed to the probe signal, they transmit the entire data to the reader. One method of implementation is to implement multiple tags that only interact with one of the readers to provide the necessary information. In this project, we have considered the possibility of replacing these multiple numbers of tags with a single tag capable of interacting with all readers and providing the necessary information according to the probe signal of each reader.

This is not only a convenience for the person, but it also relieves the burden on the RFID reader's database, which can now obtain all the necessary data from a single tag instead of having to retrieve the related information from the database after receiving a some identifying information. . A small but effective adjustment to the RFID tag can ensure that it can be used for multiple purposes. The intrusion signal from the ASK modulator of the RFID reader is demodulated by the ASK demodulator at the reader.

This probing signal contains the information about which data set will be retrieved from the tag. The data received from this is passed to the decoder which generates the corresponding ROM address for the various data stored in the ROM. Thus, this type of tag can retrieve different data stored in different ROM inputs through changing the probing signal.

The information retrieved from the ROM is finally BPSK modulated by the BPSK modulator and sent back to the reader. As the UID example shows, the tag can also be used for a wide variety of applications. So instead of needing multiple tags for different purposes, a user can have a single tag that incorporates all the data from the different tags into a single one, where only the relevant information is retrieved each time.

This not only does away with the inconvenience of carrying multiple IDs, but also reduces the pressure on database systems since the majority of user information is on the tag itself. A disadvantage of this method is the increased cost that must be incurred due to the extra blocks introduced (the vra-demodulator, the decoder, increased memory).

THE RFID ARCHITECTURE

This above model gives flexibility to the design as individual sub-modules can be changed independently without affecting the system as a whole.

Fig 2.2: Implemented Architecture
Fig 2.2: Implemented Architecture

DESIGN AND ANALYSIS TOOLS USED

DESIGN TOOLS

The XILINX 10.1 XST (Xilinx Synthesis Technology) was used to synthesize the entire system for the Spartan 3E FPGA. Since analog signals cannot be viewed with the XILINX test bench, the outputs were viewed in ModelSim, a simulation and debugging software from Mentor Graphics.

XILINX

Simulators are used to test and verify the functionality, behavior and timing of a designed circuit.

MODELSIM

IMPLEMENTATION

  • GENERATION OF SINE WAVE IN XILINX
    • Sine wave generation using IP core
    • Sine wave generation using Look Up tables (LUTs)
  • READER TO TAG COMMUNICATION
    • ASK Modulator
    • ASK Demodulator
  • TAG TO READER COMMUNICATION
    • BPSK Modulator
  • DECODER AND MEMORYa

In this, the various data values ​​are taken which, when plotted against time, give us a representation of the sine wave. Although more number of values ​​will give a smoother sine wave but the memory requirement will be more. For our case, the number of values ​​to plot a single sine wave is taken as 30.

Then the sine values ​​corresponding to these t values ​​were taken and scaled to a resolution of 8 bits. Therefore, we have a sine wave spanning 30 beats, with two consecutive sine wave values ​​separated by 1 beat. This modulation scheme was preferred because ASK demodulation is very easy to implement and thus satisfies the need to keep the tag small.

One method follows the assignment of two different amplitude levels to two different logic levels. The "1" bit is represented by a full sine wave, while the "0" bit is represented by the zero level line. For each clock cycle, two signals are prepared - one corresponding to the sine wave and the second corresponding to the "zero" level.

The information contained in the tag must be returned to the reader for processing. This stage of communication deals with the transfer of identification information from the tag to the reader. The data retrieved from memory is taken and sent to the BPSK modulator.

Two signals are generated - one representing the sine wave from the values ​​taken from the LUT and the other representing the second sine wave with a phase shift of 180° (this is done by simply negating the values ​​of the original sine LUT). If the incoming bit is a "0", the inverse sine wave signal is sent, i.e. one with a phase shift of 180°, to the output.

Fig 4.1: Two different amplitudes assigned to the two different logic level  [13]
Fig 4.1: Two different amplitudes assigned to the two different logic level [13]

RESULTS

  • SINE WAVE GENERATED
  • ASK MODULATED WAVEFORM
  • ASK DEMODULATION WAVEFORMS
  • BPSK MODULATION
  • WAVEFORMS OF THE BASEBAND PROCESSOR

The figure above shows the sine wave form created using a Look-Up Table (LUT) as seen using ModelSim. The sine wave generated in this block is used to modulate BPSK and ASK signals. It shows the generation of the probing signal generated in the reader, which contains the information about the data to be received from the RFID tag.

The signal dataout2 is the input bitstream while dataout4 shows the ASK modulated signal. The initial demodulated data (dataout7) was seen to be shifted by one bit compared to the input data (dataout2). It is shifted by one bit to give the final demodulated output (dataout6).

The signal6 data was then passed to the decoder and memory blocks to retrieve the required data from the reader. Once the required data has been received from the ROM, it is modulated into a sine wave for transmission back to the reader. Signal Data4 shows the final BPSK signal which was generated using the in-phase and quadrature components of the sine wave.

The data from ROM (represented by end processor: data) indicates the information retrieved from memory that corresponds to the data input.

Fig 5.1: Sine Wave
Fig 5.1: Sine Wave

CONCLUSION AND FUTURE WORK

CONCLUSION

The reader to tag communications and the subsequent demodulation are modeled on the same system. And the desired data was taken from memory and the modulation block output was true BPSK representation of the data. The advantage of such an implementation is that each sub-module can be modified later without the need to change the entire system.

Finally, the multi-purpose nature of the tag opens up a range of possible applications, one of which was mentioned earlier.

FUTURE WORK

To include signal security, modulation techniques such as Direct Sequence Spread Spectrum can be added to the system. A power management unit can be incorporated which controls the activity of individual blocks in order to optimally utilize the power to the tag. 1] Iker Mayordomo, Roc Berenguer, Andrés García-Alonso, Iñaki Fernández, and Íñigo Gutiérrez, “Design and Implementation of a Long Range RFID Reader for Passive.

6] Standaard voor radiospecificatie voor mobiele RFID-lezer, MRFS-5-01-R1 ​​[7] Ickjin Kwon, Yunseong Eo, Heemun Bang, Kyudon Choi, Sangyoon Jeon,. Sungjae Jung, Donghyun Lee en Heungbae Lee “A Single-Chip CMOS Transceiver for UHF Mobile RFID Reader”, IEEE Journal of solid-state circuits, vol. 3, maart 2008 [8] He Yan, Hu jianyun, Li Qiang, Min Hao, “Design of Low-power Baseband-processor for RFID Tag”, Proceedings of the International Symposium on Applications and the Internet Workshops (SAINTW’06).

Gambar

Fig 1.1: ISO/IEC 18000-6 C Standard Specifications  1.5 PARTS OF AN RFID SYSTEM
Fig 1.2: A RFID system  1.6 WORKING OF AN RFID SYSTEM
Fig 2.1: Adopted Architecture
Fig 2.2: Implemented Architecture
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