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Microcontroller based Nine Level Inverter for PV System with Reduced Switches Topology
1Aravind M R,, 2Shailaja B, 3Venkateshappa
1,2,3
Dept Of ECE, M S Engineering College, Bangalore
Email: 1[email protected], 2[email protected], 3[email protected]
Abstract - This Paper proposes the hardware design and implementation of a Microcontroller based single phase nine- level inverter for PV system. There are many limitations in extracting power from renewable energy resources. To minimize the power demand and scarcity we have to improve the power extracting methods. Multilevel inverter is used to extract power from PV cells. Multilevel inverters tender high power capability, associated with lower output harmonics and lower turn-off losses. Our work informs, for the same nine level inverter output this particular topology has reduced count of switches, on comparing with the conventional Cascaded H- Bridge Multilevel Inverter. For a single phase, nine level inverter output this topology requires one H-bridge and a multi conversion cell. Four equal voltage sources with four controlled switches and four diodes comprise a multi conversion cell. Instead of sixteen controlled switches as in conventional method, this topology requires only eight switches to obtain nine level output. The reduction of switches lowers switching losses, cost and total harmonic distortions. Performance parameters have been analyzed for the nine level CHB-MLI. The control circuit necessary for multilevel inverter operation is implemented using an AT MEGA2560 Microcontroller, reducing overall system cost and complexity. Theoretical predictions are validated using simulation in MATLAB SIMULINK, and satisfactory circuit operation is proved with experimental tests performed on an experimental model.
Keyword - Photovoltaic(PV) System, Microcontroller, MATLAB, Cascaded H Bridge(CHB)- Multilevel Inverter(MLI).
I. INTRODUCTION
The demand for renewable energy has increased significantly over the years because of shortage of fossil fuels and greenhouse effect. Among various types of renewable energy sources, solar energy and wind energy have become very popular and demanding due to advancement in power electronics techniques. Photo- Voltaic (PV) sources are used today in many applications as they have the advantages of being maintenance and pollution free. Solar-electric-energy demand has grown consistently by 20%–25% per annum over the past 20 years, which is mainly due to the decreasing costs and prices. This decline has been driven by the following factors: 1) an increasing efficiency of solar cells 2) manufacturing technology improvements and 3) economics of scale [1].
Multilevel inverter, which is the heart of a PV system, is used to convert dc power obtained from PV modules
into ac power to be fed into the grid. Improving the output waveform of the inverter reduces its respective harmonic content and, hence, the size of the filter used and the level of electromagnetic interference (EMI) generated by switching operation of the inverter. In recent years, multilevel inverters have become more attractive for researchers and manufacturers due to their advantages over conventional three-level inverters. They offer improved output waveforms, smaller filter size, lower EMI and lower total harmonic distortion (THD) [2].
II. MULTILEVEL INVERTER
The Application of the classical inverter has few drawbacks such as high dv/dt and filtering requirement at high power (due to lower switching frequency). In order to overcome the limitations with traditional inverters, multilevel structure has been introduced as an alternative in high power and medium voltage situations.
The concept of multilevel inverter has been introduced since 1975. The principle of a multilevel converter is to approximate the sine output with series of staircase/step like waveforms using several low power semiconductor devices that switch in sequentially and apply step waveforms to the load. The voltage dv/dt is substantially reduced on account of lower step levels compared to the case with the classical inverter. Commonly used multilevel topologies for PV applications are listed below [1]-[3].
A. Diode clamped MLI
In three-level neutral-point-clamped (NPC) inverter proposed by Nabae et al. capacitors are used to generate an intermediate voltage level. The voltage value across the switches becomes half of the input dc voltage.
Diode-clamped inverters are limited due to the capacitor voltage balancing problems.
B. Flying Capacitor MLI
In this MLI, floating capacitors are used to achieve clamping voltages and multilevel. Redundant switching states can be achieved without additional clamping diodes, which are used balance the capacitor charge, even under loaded condition and obtain required dc level. But, number of capacitor increases on increasing the level of output ac voltage. Also capacitor charging circuit will be high, which is needed to initialize charge across the capacitor.
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C. Cascaded H-bridge MLI
In cascade H-bridge topology, the multilevel output can be achieved with symmetrical or asymmetrical dc voltage sources. It requires comparatively less number of elements and addition or subtraction of dc sources can be achieved easily, which in turn increase the number of levels in output waveform. But for each level addition, four controllable switches and additional control circuits are required.
D. Modular MLI (half H-bridge)
Modular MLI is deduced from the cascaded Hbridge MLI topology. Instead of four power switches, half number of switches is used forming half Hbridge and connected in cascade to obtain multilevel output. Level can be increased by addition of a module, consisting of a dc source and two switches.
III. GENERALIZED H-BRIDGE CASCADED TOPOLOGY
The fundamental H-Bridge cascaded topology is shown in the figure 1and the respective operational waveforms is shown in figure 2. For attaining a three level output a basic H-Bridge topology needs one DC source all along with four MOSFET switches and one balancing capacitors. In turn to get consequent levels necessitate a same set of topology as shown in figure 1 which increases the number of components required which in turn make design complexity and increases the cost and number of components used [5, 6].It is also to be establish that the maximum output voltage cannot go beyond the sum of voltage of individual sources which becomes the most important setback of this topology.
For that reason in an application which requires high output voltage from low voltage level, it wants H bridge module in addition or step-up transformers. To triumph over this problem proposed a new configuration is shown in fig 3.
Fig.1: Traditional cascaded H-bridge cell multilevel inverter (nine levels)
Fig. 2:.Operational Waveforms
IV. MODIFIED CHB-MLI TOPOLOGY
The general structure of the Modified cascaded multilevel inverter is shown in Figure 1. This inverter consists of an H Bridge and multi conversion cell which consists of four separate voltage sources (Vdc, Vdc2, Vdc3 and V dc4), four switches and four diodes. Each source connected in cascade with other sources through a circuit consists of one active switch and one diode that can make the output voltage source only in positive polarity with several levels. Only one H-bridge is connected with multi conversion cell to acquire both positive and negative polarity.
Fig .3: 9-Level Modified-Cascaded multilevel inverter By turning on controlled switches S1 (S2, S3 and S4 turn off) the output voltage +1Vdc (first level) is
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produced across the load. Similarly turning on of switches S1, S2 (S3 & S4 turn off) +2Vdc (second level) output is produced across the load. Similarly +3Vdc levels can be achieved by turning on S1, S2, S3 switches (S4 turn off) and +4Vdc levels can be achieved by turning on S1, S2, S3 & S4 as shown in below Table 1.
It is observed that for each voltage level, among the paralleled switches only one switch is switched ON. The input DC voltage is converted into a stepped DC voltage, by the multi conversion cell, which is further processed by the H Bridge and outputted as a stepped or approximately sinusoidal AC waveform. In the H Bridge, during the positive cycle, only the switches Q1 and Q3 are switched on. And during the negative half cycle, only the switches Q2 and Q4 are switched on.
Table 1: Switching Patterns for 9 levels CHB-MLI
V. PROPOSED SYSTEM
The block diagram of Multi-level Inverter (MLI) is as shown in Figure 4. Boost chopper is connected between the PV array and MLI. The purpose of boost chopper is to step-up the voltage and to produce continuous current to MLI. The simulation results are validated for the improvement in the PV cell system. The hardware is implemented with boost chopper and multilevel inverter.
The Microcontroller ATMEGA2560 is used to generate the PWM signal for boost chopper and inverter switches.
Boost chopper output is fed to multilevel inverter and the stepped wave is obtained. The expected results obtain through simulation are verified with hardware results
Fig. 4: Block diagram of Multilevel Inverter for PV system
VI. SIMULATION RESULT
The experiment is conducted in MATLAB. The simulation of the proposed multilevel inverter was implemented by using MATLAB/SIMULINK and the model is as shown in Figure 5.
This model, developed using the Simulink power system block set, comprises of components such as power electronic devices (MOSFETs) and elements such as diodes and resistors. The PWM signals for each of the switching devices in the power circuit come from the PWM generator block.
The switching pattern required for the modified nine level inverter circuit is shown in Figure 6.
Fig. 5: Simulink Model
Fig.6: Switching pulses required for Mosfets
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Fig.7: Output Waveform
The above Output waveform obtained from simulation consists of output voltage with maximum positive peak +400V and negative peak voltage of -400V. Since each voltage source will be given 100Vdc.
The output current with peak +4A and -4A. Since the resistive load applied was 100Ω (ohms).
Fig.8: THD of Nine Level Inverter
The Total Harmonic Distortion (THD) of the nine level inverter is observed that 12.41% and fundamental voltage is 383.9V (50Hz) that has been illustrated in figure 8.
VII. EXPERIMENTAL ANALYSIS
The hardware of cascaded multilevel inverter with boost chopper is implemented and the output is fed to the load.
The DC supply is given to the boost chopper. The boosted voltage is given to the cascaded multilevel inverter. The cascaded multilevel inverter is used to reduce the harmonics. The DC link voltage is given s input to the ATMEGA2560 microcontroller. The microcontroller is used to produce control signals based on single pulse width modulation technique for the gates of the MOSFET. The hardware results are pulses and
voltage. These results are measured using Cathode Ray Oscilloscope (CRO).
The pulses generated using the Microcontroller and given to the inverter switches. The pulses supplied from the Microcontroller have amplitude of 5V which is not enough to drive the MOSFET switches and therefore driver IC’s are employed. The input supply to the driver board is 12V DC from the regulator. The switches S1, S2, S3 and S4 are turned on.The switches S5, S6, S7 and S8 are turned on.
Fig. 9: Experimental Setup
VIII. CONCLUSION
This paper gives the clear idea about the cascaded multilevel inverter topology for PV cell. The voltage level of the PV panel is improved using boost chopper and multilevel inverter. The proposed multilevel inverter is to reduce both voltage & current THD of the inverter.
The circuit topology, modulation law and operational principle of the proposed inverter are analyzed in detail.
The performance of the PV system is increased with in solar insolation and surface temperature. Simulation results indicate that the THD of the Nine-level inverter is much lesser than that of the conventional three-level inverter. As the level increases, the THD value reduces but the complexity of the system increases. Thus the hardware is implemented with Nine levels. The hardware is implemented with boost chopper with multilevel inverter. Boost chopper is used to boost the voltage, without that the input voltage drawn from the source by the multilevel inverter is high. The pulses are generated by the gate driver circuit and it is given to the switches of the multilevel. The output voltage waveform of the multilevel inverter is a stepped wave with Nine levels. In the proposed MLI there are only one H Bridge inverter to achieve the Nine level output voltage.
Compared to the conventional three-level inverter, the harmonics are reduced
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Table 2: Percentage of Reduction in Switches
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