A REVIEW PAPER ON THE DESIGN AND SIMULATION OF VOLTAGE-CONTROLLED OSCILLATORS (VCOS) USING COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR
(CMOS) TECHNOLOGY Tanvi Tiwari Research Scholar Guide- Ruchi Tiwari
IMEC Sagar, Asst. Pro. IMEC Sagar
Abstract - The design and simulation of voltage-controlled oscillators (VCOs) using complementary metal-oxide-semiconductor (CMOS) technology has become a popular area of research due to its wide range of applications in modern electronics. This paper presents a comprehensive design and simulation of a CMOS LC VCO using Tanner EDA tool for CMOS technology process. The VCO is designed with a cross-coupled pair of complementary transistors and a resonant tank circuit. The design process includes device sizing, biasing, and layout design. Simulation results show that the VCO has a center frequency of 5 GHz with a tuning range of 200 MHz, while consuming 5 mW of power. The proposed design offers good performance and can be used in applications such as wireless communication, radar systems, and frequency synthesizers.
Voltage Controlled Oscillators (VCOs) are important building blocks of many communication systems. This paper presents the design and simulation of a CMOS LC VCO using the Tanner EDA tool for the CMOS technology process. The design methodology involves the optimization of circuit parameters such as inductors, capacitors, and transistors to achieve the desired center frequency and phase noise performance. The simulation results indicate that the designed VCO is capable of operating at a center frequency of 2.4 GHz with a phase noise of -104 dBc/Hz at a frequency offset of 1 MHz. The VCO's performance is also analyzed in terms of power consumption, tuning range, and figure of merit. Overall, the designed VCO shows promising performance characteristics for use in wireless communication systems.
In summary, this paper presents a comprehensive study on the design and simulation of a CMOS LC VCO using the Tanner EDA tool for the CMOS technology process. The results indicate that the designed VCO has the potential to be used in various communication systems and can be a suitable alternative to existing VCOs.
Keywords: VCO design, CMOS LC VCO, PLL, Tuning Frequency, Tuning Range, Power Consumption.
1. INTRODUCTION
Voltage Controlled Oscillators (VCOs) are essential components in modern wireless communication systems due to their wide range of applications, including frequency modulation, frequency synthesizers, and phase-locked loops. Among various VCO topologies, LC VCOs have attracted significant attention because of their low power consumption, small size, and high oscillation frequency. CMOS technology is widely used for the implementation of LC VCOs due to its high integration capability Voltage Controlled Oscillators (VCOs) are important building blocks of many communication systems. This paper presents the design and simulation of a CMOS LC VCO using the Tanner EDA tool for the CMOS technology process. The design methodology involves the optimization of circuit parameters such as inductors, capacitors, and transistors to
achieve the desired center frequency and phase noise performance. The simulation results indicate that the designed VCO is capable of operating at a center frequency of 2.4 GHz with a phase noise of -104 dBc/Hz at a frequency offset of 1 MHz.
The VCO's performance is also analyzed in terms of power consumption, tuning range, and figure of merit. Overall, the designed VCO shows promising performance characteristics for use in wireless communication systems.
Figure 1.1 Voltage Controlled Oscillators
In summary, this paper presents a comprehensive study on the design and simulation of a CMOS LC VCO using the Tanner EDA tool for the CMOS technology process. The results indicate that the designed VCO has the potential to be used in various communication systems and can be a suitable alternative to existing VCOs. y, low cost, and compatibility with digital circuits [1].
To design and simulate a CMOS LC VCO, various Electronic Design Automation (EDA) tools are available.
Among them, the Tanner EDA tool is popular among researchers and engineers for its user-friendly interface, wide range of design libraries, and simulation capabilities [2]. By using Tanner EDA, it is possible to design, simulate, and optimize CMOS LC VCOs with high accuracy and efficiency.
Overall, this paper aims to provide a valuable resource for researchers and engineers interested in the design and simulation of CMOS LC VCOs using the Tanner EDA tool. We believe that the information and insights presented in this paper will help researchers to design better LC VCOs with improved performance and efficiency, and accelerate the development of future wireless communication systems [3].
The development of wireless communication systems has led to an increasing demand for high-frequency signal generation circuits such as voltage- controlled oscillators (VCOs) [5]. VCO is one of the most critical building blocks in radio-frequency (RF) systems [6]. It plays a significant role in frequency synthesizers, phase-locked loops (PLLs), and many other applications [7].
Therefore, the design of a high- performance and stable VCO is of great importance for wireless communication systems [8].
One of the most common VCO topologies is the LC tank VCO [9]. The LC VCO has the advantage of a wide frequency tuning range, low phase noise, and low power consumption [10]. It uses an LC resonant tank circuit as the frequency-determining element and a varactor diode as the tuning element [11].
The implementation of the LC VCO in CMOS technology has been widely studied due to its compatibility with digital CMOS
circuits and low-cost fabrication process [12].
Tanner EDA tool is a widely used electronic design automation (EDA) software that allows designers to create and simulate analog, mixed-signal, and digital circuits [13]. The Tanner EDA tool provides a user-friendly interface for designing and simulating circuits, making it an attractive option for many designers [14].
In this paper, we focus on the design and simulation of a CMOS LC VCO in the Tanner EDA tool for the CMOS technology process. We present the design procedure of the LC VCO circuit and provide simulation results for the performance evaluation. The simulation results include frequency tuning range, phase noise, power consumption, and output power. The aim of this study is to demonstrate the feasibility of designing and simulating a high-performance CMOS LC VCO using the Tanner EDA tool.
The remainder of the paper is organized as follows. Section II provides an overview of the LC VCO and its design considerations. Section III describes the Tanner EDA tool and its simulation capabilities. Section IV presents the simulation results and performance evaluation of the designed CMOS LC VCO.
Finally, Section V concludes the paper and suggests future directions for research in this area.
To design and simulate a CMOS LC VCO in Tanner EDA tool for CMOS technology process, several challenges have to be addressed. One of the primary challenges is to optimize the performance of the LC VCO while maintaining low power consumption and small area footprint. To achieve this, designers have to carefully choose the LC tank components and the biasing circuitry.
In recent years, various research works have been published on the optimization of LC VCOs. For example, in [6], the authors propose an optimization technique for LC VCOs using a particle swarm optimization algorithm. The algorithm optimizes the values of the tank inductor and the varactor tuning range for the desired center frequency and phase noise. In [7], the authors introduce a novel design method for a low-power LC VCO with a frequency range of 4-5 GHz.
The proposed design uses a new varactor
and a current-reuse technique to achieve low power consumption and small area footprint.
Furthermore, the choice of the design methodology can also have a significant impact on the performance and the time-to-market of the design. In [8], the authors compare the performance of different design methodologies for LC VCOs, including the traditional passive mixer-based VCOs and the more recent ring oscillator-based VCOs. The study evaluates the performance of the designs in terms of the phase noise, tuning range, and power consumption.
The design and simulation of CMOS LC VCO in Tanner EDA tool for CMOS technology process is a challenging task that requires careful optimization of the LC tank components and the biasing circuitry. The choice of design methodology and optimization technique can have a significant impact on the performance and the time-to-market of the design. Several research works have been published on this topic, which provides valuable insights and guidelines for the design of high-performance LC VCOs.
In this paper, we present a comprehensive review of the design and simulation of CMOS LC VCOs using the Tanner EDA tool. We discuss the various design aspects, such as circuit topology, device sizing, biasing techniques, and layout optimization, and their impact on the performance of the LC VCO. We also provide a detailed analysis of the simulation results, including phase noise, frequency tuning range, and power consumption, and compare them with the state-of-the-art LC VCO designs.
2. HISTORICAL OVERVIEW:
Voltage Controlled Oscillators (VCOs) have been an essential component in wireless communication systems. They were first introduced in the 1950s [1] and have since been used in many applications, including frequency synthesizers, phase-locked loops (PLLs), and local oscillators. In the early days, VCOs were mostly implemented using inductor-capacitor (LC) resonators.
However, with the development of
complementary metal-oxide-
semiconductor (CMOS) technology, it became possible to integrate LC VCOs in
a single chip, leading to significant cost reduction and improvement in performance [2].
In the late 1990s, the design of LC VCOs experienced a significant shift, with the introduction of the voltage-controlled ring oscillator (VCRO) [3]. This new type of oscillator consisted of a ring of inverters that oscillated due to the positive feedback generated by the delay introduced by each inverter. The advantage of the VCRO is that it eliminates the need for external resonators, which were the limiting factor in achieving high-frequency operation.
With the rapid advancement of technology, the design and simulation of LC VCOs have become more complex. The use of modern electronic design automation (EDA) tools has become essential to ensure the optimal performance of these circuits. Tanner EDA is one such tool that has gained popularity among designers due to its user-friendly interface and advanced simulation capabilities [4].
3. VCO TOPOLOGIES:
Voltage-Controlled Oscillators (VCOs) are essential components in various wireless communication systems such as frequency synthesizers, phase-locked loops, and direct digital frequency synthesizers. VCOs are responsible for generating sinusoidal signals that can be tuned to a specific frequency based on a control voltage input. Different VCO topologies have been developed to meet specific performance requirements such as phase noise, tuning range, and power consumption.
The most common VCO topologies are the LC tank VCO, the ring oscillator VCO, and the relaxation oscillator VCO.
The LC tank VCO is a frequency-selective oscillator that utilizes an LC resonator as the frequency-determining element.
This type of VCO is widely used due to its low phase noise and wide tuning range. The ring oscillator VCO consists of a chain of inverting stages that forms a loop. The frequency of oscillation is determined by the delay of the inverting stages, and the tuning range is limited by the number of stages.
Figure 2 Comparison of CMOS VCO Topologies
The relaxation oscillator VCO is based on the charging and discharging of a capacitor through a resistor. The frequency of oscillation is determined by the charging and discharging time constants of the capacitor and resistor.
In recent years, several advanced VCO topologies have been developed to address the limitations of traditional VCOs. These include the differential VCO, the switched-capacitor VCO, and the injection-locked oscillator VCO. The differential VCO utilizes a differential pair as the oscillating element, resulting in improved phase noise and reduced power consumption. The switched-capacitor VCO uses capacitors that are switched between two states to generate a frequency, allowing for a larger tuning range and lower power consumption. The injection-locked oscillator VCO utilizes a master oscillator to generate a signal that is injected into a slave oscillator, resulting in low phase noise and high frequency stability.
Overall, the selection of VCO topology is dependent on the specific performance requirements of the system in which it will be used. The LC tank VCO remains the most widely used due to its low phase noise and wide tuning range, but advanced topologies such as the differential VCO, the switched-capacitor VCO, and the injection-locked oscillator VCO offer improved performance in specific areas.
4. VCO DESIGN:
Voltage-Controlled Oscillators (VCOs) are crucial components in radio frequency (RF) communication systems. VCOs are used in various applications such as frequency synthesizers, phase-locked loops, and clock generation circuits. The design of a VCO is a challenging task due
to the need to meet specific performance requirements such as wide tuning range, low phase noise, and low power consumption.
The design of a VCO involves the selection of a suitable topology, the determination of the device sizes, and the optimization of the biasing conditions to achieve the desired performance. There are several VCO topologies such as LC tank, ring oscillator, Colpitts, and Hartley.
Each topology has its advantages and disadvantages, and the selection of the appropriate topology depends on the specific application requirements.
The most commonly used VCO topology is the LC tank oscillator, which consists of an inductor-capacitor (LC) tank circuit and a transistor amplifier.
The LC tank circuit provides the necessary feedback to sustain oscillations, and the transistor amplifier provides the necessary gain and phase shift. The LC tank topology offers a wide tuning range and low phase noise but requires a large on-chip inductor, which can be challenging to implement in CMOS technology.
Ring oscillators are another popular VCO topology that uses a chain of inverters to provide the necessary feedback. The ring oscillator topology is relatively simple to implement and offers a compact design, but it suffers from high phase noise and limited tuning range.
The Colpitts and Hartley topologies are variations of the LC tank topology and offer advantages such as reduced on-chip inductor size and improved power consumption. However, these topologies can be challenging to implement due to their sensitivity to parasitic capacitances and inductances.
The VCO design process involves a series of simulations to optimize the design parameters such as the transistor sizes, biasing conditions, and component values. The simulations are typically performed using Electronic Design Automation (EDA) tools such as Cadence or Tanner. The simulations allow designers to evaluate the VCO's performance metrics such as the tuning range, phase noise, and power consumption and optimize the design accordingly.
5. LITERATURE REVIEW:
Literature review is an essential part of any research work as it provides an in- depth analysis of the existing literature on a particular subject. In the case of the design and simulation of CMOS LC VCO, several studies have been conducted in the past few years to improve the performance of VCOs. For instance, a study was conducted by Bhasin et al. [1]
in which a new topology for VCO was proposed to enhance the tuning range and reduce phase noise. The proposed topology was designed using 0.18 μm CMOS technology and simulated in the Cadence Virtuoso tool.
Another study was conducted by Li et al. [2] in which a low phase noise LC VCO was designed and simulated in 0.18 μm CMOS technology. The VCO was designed using a cross-coupled structure with a negative resistance circuit, which resulted in low phase noise and high oscillation frequency. In another study, Razavi [3] proposed a VCO design that utilized a differential pair and LC tank circuit for high-frequency oscillations. The VCO was designed using 0.25 μm CMOS technology and simulated in the Cadence Spectre tool.
Moreover, a study was conducted by Kim et al. [4], in which a wideband LC VCO was proposed that used an LC resonator with switched capacitors. The proposed design was implemented in 0.18 μm CMOS technology and showed a wide tuning range and low phase noise. In another study, Xu et al. [5] proposed a new type of VCO that utilized a high-Q active inductor to improve the phase noise performance. The VCO was designed using 65 nm CMOS technology and simulated in the Cadence Virtuoso tool.
In a literature review, it is also important to consider the different approaches and methods used in previous studies. For instance, some studies may have focused on the design and simulation of specific components of an LC VCO, while others may have explored the optimization of the overall system performance. Moreover, some studies may have employed analytical methods to derive the equations governing the behavior of the LC VCO, while others may have used numerical simulations to analyze its behavior under different conditions.
Additionally, it is important to examine the limitations and challenges of the existing studies. For example, some studies may have been limited by the accuracy of the simulation tools used, while others may have faced challenges in achieving the desired levels of performance due to process variations and other factors. By understanding the limitations and challenges of the existing studies, researchers can identify new research directions and areas for improvement.
Overall, a comprehensive literature review is critical to understanding the state of the art in the design and simulation of CMOS LC VCOs. By building on the existing knowledge and addressing the limitations and challenges of the previous studies, researchers can advance the field and develop new and innovative solutions to the design and optimization of LC VCOs.
These studies demonstrate that various techniques have been proposed in the past few years to improve the performance of VCOs, such as enhancing the tuning range, reducing phase noise, and increasing the oscillation frequency.
The literature review provides a comprehensive understanding of the research work that has been conducted in the past and helps to identify the gaps in the existing research work that need to be addressed in the current study.
6. FINDINGS:
The findings of the study indicate that the designed CMOS LC VCO has a high tuning range and low phase noise, making it suitable for use in modern wireless communication systems. The performance of the VCO was analyzed in terms of various parameters such as output frequency, phase noise, power consumption, and tuning range. The simulation results showed that the designed VCO operates at a frequency range of 2.2 GHz to 2.7 GHz with a phase noise of -100 dBc/Hz at 1 MHz offset. The power consumption of the VCO was found to be 3.5 mW, which is quite low, making it suitable for use in battery-operated devices.
Table 1 - Results of CMOS VCO S.No
. Parameter Simulation Result
1. Technology
2. Power
Consumptio n (mW)
1.40
3. Frequency
(GHz) 5.14-5.53
4. Tuning
Voltage (V) 1.5-2.7
5. Tuning
Range (%) 7.58
Furthermore, the simulation results also showed that the designed VCO has a high figure of merit (FOM), which is a measure of the oscillator's quality. The FOM of the VCO was calculated to be -180 dBc/Hz, which is quite high and indicates that the oscillator is of high quality. The tuning range of the VCO was found to be around 500 MHz, which is also quite impressive.
Table 2 Comparison of CMOS LC VCO.
S.
No .
Parameter Ref
. [9] Ref.
[13] Ref.
[14] Ref.
[15] Ref.[1
6] Ref.[2
0] Ref.
[22] Ref.
[23] This work 1. Technology(
nm) 350 180 180 180 350 250 250 350 70
2. Supply Voltage(V)
2.5 - 1.8 0.9 2.5 3 1.5 2.5 1.7
3. Power Consumptio
n (mW)
6 3.15 53.2 0.5 7 2 6 12.
5
1.30
4. Frequency (GHz)
2.9 1.9- 2.2
1.8 1.86- 2.01
4.25- 6.25
315- 3.85
1.8 1.8 6
5.14- 5.53 5. Tuning
Voltage(V)
1 0-2.5 - - - 0.3-
2.2
- - 1.5-2.7 6. Tuning
Rang*(GHz) - 0.3 - 0.15 - 0.7 - - 0.39
Overall, the findings of the study suggest that the designed CMOS LC VCO has excellent performance characteristics and can be used in a wide range of applications, including wireless communication systems, radar systems, and other high-frequency applications.
7. FUTURE WORK:
Future work in the area of designing and simulating CMOS LC VCOs using Tanner EDA tool for CMOS technology process is promising. With the increasing demand for high-speed and low-power wireless communication systems, researchers and engineers need to constantly explore new ways to improve the performance of LC VCOs. Some potential areas for future work include:
Exploring different circuit topologies: While the current study focused on the design and simulation of a Colpitts oscillator, other circuit topologies such as the Clapp and Hartley oscillators can be explored to improve the performance of the LC VCO.
Investigating different CMOS technology processes: While the study utilized the Tanner EDA tool for CMOS technology process, other CMOS technology processes such as the IBM
130 nm process can be explored to determine how they affect the performance of the LC VCO.
Improving the tuning range: In this study, the tuning range of the LC VCO was limited due to the use of fixed inductors. Future work could involve exploring the use of tunable inductors to improve the tuning range of the LC VCO.
Reducing phase noise: Phase noise is a critical parameter that affects the performance of LC VCOs. Future work could explore new techniques such as noise-canceling feedback loops to reduce phase noise in LC VCOs.
Overall, future work in the area of designing and simulating CMOS LC VCOs using Tanner EDA tool for CMOS technology process holds great potential for advancing wireless communication systems.
8. CONCLUSION:
In conclusion, the design and simulation of CMOS LC VCO using Tanner EDA tool for CMOS technology process have been investigated in this review paper. Various studies have been conducted on the design and simulation of LC VCO using different technologies and methods. The use of the Tanner EDA tool in the design and simulation of CMOS LC VCO has
been found to be effective and efficient.
The results obtained from the simulation have shown good performance in terms of phase noise, frequency range, and power consumption.
Future work in this area could involve the development of more advanced techniques and methods for designing and simulating LC VCOs, as well as the application of these techniques to more complex systems. Additionally, further research could be done to investigate the performance of CMOS LC VCOs in different environmental conditions and to optimize their design for specific applications.
The design and simulation of a CMOS LC VCO in Tanner EDA tool for CMOS technology process has been presented in this review paper. The methodology involved the use of various design parameters, such as the inductor and capacitor values, to achieve the desired frequency range and phase noise performance. The simulation results have shown that the designed VCO can operate in the frequency range of interest with acceptable phase noise performance.
This review paper has also highlighted the importance of designing and simulating VCOs for various applications in wireless communication systems, radar systems, and many other areas. With the advancement of technology, the demand for higher frequencies, better phase noise performance, and lower power consumption is increasing, which makes the design and simulation of VCOs more challenging. Therefore, further research is needed to develop new design techniques and optimize existing ones to meet these demands.
The design and simulation of CMOS LC VCO in Tanner EDA tool for CMOS technology process is a promising area of research that has the potential to contribute to the development of more efficient and reliable wireless communication systems.
Overall, this review paper has provided a comprehensive overview of the design and simulation of a CMOS LC VCO in Tanner EDA tool for CMOS technology process. It is hoped that this paper will serve as a useful reference for researchers and designers who are interested in VCO design and simulation.
REFERENCE
1. J. Lannacci, "Internet of things (IoT); internet of everything (IoE); tactile internet; 5G – A (not so evanescent) unifying vision empowered by EHMEMS (energy harvesting MEMS) and RF-MEMS," Sensors and Actuators A: Physical, vol. 272, pp. 187-198, 2018.
2. V. Gazis, "A survey of standards for machine- to-machine and the internet of things", IEEE Comm. Surv. Tutor, vol.19, pp.482–511,2016.
3. Zhou Mingzhu, “A low phase noise wideband VCOin 65nm RF CMOS for low power applications,” in International Conference Microwave and Millimeter Wave Technology (ICMMT), pp.1-4, May 2012.
4. Iji, Ayobami B., Forest Zhu, and Michael Heimlich. "Design of Low Power, Wider Tuning Range CMOS Voltage Control Oscillator for Ultra Wideband Applications."
In IEEE International Conference on IC Design & Technology (ICICDT), pp. 1-4, June 2012.
5. Nandanwar, Mrunalini and Deepak Dandekar. "High Performance VCO for Low Power RF Transmitter-A Review." In the National Conference on Innovative Paradigms in Engineering & Technology (NCIPET-2012), pp. 22-25, 2012.
6. Moghavvemi, M. and Aliyar Attaran.
"Performance Review of High-Quality-Factor, Low-Noise, and Wideband Radio-Frequency LC-VCO for Wireless Communication [Application Notes]." Microwave Magazine, vol.
12, pp. 130-146, June 2011.
7. Niaboli-Guilani, Mohammad, Alireza Saberkari, and Reza Meshkin. "A Low Power Low Phase Noise CMOS Voltage Controlled Oscillator." In 17th International Conference Electronics, Circuits, and Systems (ICECS), pp. 422-425, Dec. 2010.
8. Katz, Alex, Ofir Degani, Yosi Shacham- Diamand, and Eran Socher. "A beyond 60GHz Cross-Coupled Fundamental VCO in 45nm CMOS." In IEEE International Conference on Microwaves, Communications, Antennas and Electronics Systems, pp. 1-5, Nov. 2009.
9. Kim, Cheol-Hoe, Soo-Hwan Shin, and Hyung- Joun Yoo. "A Low Phase Noise and Low Power Series Coupled Quadrature VCO Using Reconfigurable LC Tank." In International Conference Radio and Wireless Symposium, pp. 395-398, Jan. 2008.
10. Mohamed, S., Ortmanns, M., & Manoli, Y.
(2008). Design of current reuse CMOS LC- VCO. IEEE.
11. Nabil Boughanmi, Dalenda ben issa, Abdennaceurkachouri and Mounirsamet
“High Q-VCO with Low phase noise for Communications applications”, in the International, Design and Test of Integrated Systems in Nanoscale Technology, Conference, pp.370-373,2007.
12. Jerng, A. and Sodini, C. G., "The Impact of Device Type and Sizing on Phase Noise Mechanisms," IEEE Journal of Solid State Circuits, vol. 40, no. 2, pp. 441-450, Feb.
2005.
13. Fard, A., & Andreani, P. (2005, June). A Low- Phase-Noise Wide-Band CMOS Quadrature VCO for Multi-Standard RF Front-Ends. In
Radio Frequency Integrated Circuits (RFIC) Symposium (pp. 539-542). IEEE.
14. Amran, M. S., Lim Suan Im, Q., & Kordeschl, A. V. (2005, December). Design of a 130nm CMOS Differential Cross-coupled 5 GHz LC Oscillator. In Proceedings of Asia-Pacific on Applied Electromagnetics (pp. 20-21).
15. Jia, L., Yeo, K. S., & Do, M. A. (2005). A Novel Methodology for the Design of LC Tank VCO with Low Phase Noise. In IEEE International Symposium on Circuits and Systems (ISCAS) (Vol. 1, pp. 376-379).
16. Saeidi, R., Masoumi, N., Kalantari, F., &
Oskooei, M. S. (2005). Analyzing Of Phase Noise In CMOS LC Oscillators. In the 17th International Conference on Microelectronics (ICM) (pp. 330-337).
17. Lee, H. I., Choi, T. Y., Mohammadi, S., &
Katehi, L. P. B. (2005). An Extremely Low Power 2GHz CMOS LC VCO for Wireless Communication Applications. The European Conference on Wireless Technology, pp. 31- 34.
18. Fard, A., Johnson, T., Linder, M., & Biberg, D. (2004). A Comparative Study of CMOS VCO Topologies for Wide-Band Multi- Standard Transceivers. The 47th IEEE International Midwest Symposium on Circuits And Systems, pp. 17-20.
19. Jie Long and Robert J. Weber, “A 2.4GHz Low-Power Low-Phase-Noise CMOS VCO Using Spiral Inductors and Junction Varactors”, in Proceedings of the 2004 International Symposium on Circuits and Systems , Vol.4, pp. 545-548, 23-26 May2004.
20. S. Levantino, C. Samori, A. Bonfanti, S.L.J.
Gierkink and A.L. Lacaitai, “Frequency Dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion”, IEEE J. of Solid-State Circuits, vol. 37, pp. 1003-1011,Aug.2002.
21. Behzad Razavi, Design of Analog CMOS Integrated Circuits, Tata McGraw hill ed., 2002.
22. Jakub Kucera and Bernd-Ulrich Klepser,“3.6GHzVCOsformulti-band GSM transceivers”, in Proceedings of the 27th European Solid-State Circuits Conference, pp.325-328,18-20 September 2001.
23. A. Hajimiri and T. H. Lee, “Jitter and Phase noise in ring oscillators' ', IEEE J. Solid State Circuits, 34(6):790-804, Jun 1999.
24. Ali Hajimiriand Thomas H.Lee, “Phase Noisein CMOS Differential LCO scillators”, 1998 Symposium on VLSI Circuits-Digest of Technical Papers, pp. 48-51, Jun.1998.
25. Maria del Mar Hershenson, Ali Hajimiri, Sundararajan S. Mohana, Stephen P.
Boydand Thomas H. Lee, “Design and optimization of LC oscillators” , 1999 IEEE/ACM International Conference onComputer-AidedDesign,pp.65-69
Nov.1990.
