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Digital Signal Processing, VI, Zheng-Hua Tan, 2006 1

Digital Signal Processing, Fall 2006

Zheng-Hua Tan

Department of Electronic Systems Aalborg University, Denmark

[email protected]

Lecture 6: System structures for implementation

Course at a glance

Discrete-time signals and systems

Fourier-domain representation

System analysis MM1

MM2

MM6 Sampling and

reconstruction MM5

System structure System

(2)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 3

System implementation

„ LTI systems with rational system function e.g.

„ Impulse response

„ Linear constant-coefficient difference equation

Three equivalent representations!

How to implement, i.e. convert to an algorithm or structure?

|

|

|

| 1 ,

)

( 1

1 1

0 z a

az z b z b

H >

= +

] 1 [ ]

[ ]

[n =b0a u n +b1a 1u n

h n n

] 1 [ ] [ ]

1 [ ]

[nay n− =b0x n +b1x ny

System implementation

The input-output transformation x[n] Æy[n]can be computed in different ways – each way is called an implementation

‰ An implementation is a specific description of its internal computational structure

‰ The choice of an implementation concerns with

„ computational requirements

„ memory requirements,

„ effects of finite-precision,

„ and so on

(3)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 5

Part I: Block diagram representation

„

Block diagram representation of computational structures

„

Signal flow graph description

„

Basic structures for IIR systems

„

Transposed forms

„

Basic structures for FIR systems

System implementation

„ Impulse response

is infinite-duration, impossible to implement in this way.

„ However, linear constant-coefficient difference ]

[

* ] [ ] [

] 1 [ ]

[ ]

[ 0 1 1

n h n x n y

n u a b n u a b n

h n n

=

− +

=

(4)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 7

Basic elements

„ Implementation based on the recurrence formula derived from difference equation requires

‰ adders

‰ multipliers

‰ memory for storing delayed sequence values

Fig. 6.1

] 1 [ ] [ ] 1 [ ]

[n =ay n− +b0x n +b1x ny

Example of block diagram representation

„ A second-order difference equation

2 2 1 1

0

) 1

(

= −

z a z a z b

H

] [ ] 2 [ ]

1 [ ]

[n a1y n a2y n b0x n

y = − + − +

Demonstrates the complexity, the steps, the amount of resources required.

(5)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 9

General Nth-order difference equation

=

=

= N

k

k k M

k

k k

z a

z b z

H

1 0

1 ) (

= =

− +

= M

k k N

k

ky n k b x n k

a n

y

0 1

] [ ]

[ ]

[

] [n v

A cascade of two systems!

X[n]Æv[n], v[n]Æy[n]

Rearrangement of block diagram

„ A block diagram can be rearranged in many ways without changing overal function, e.g. by reversing the order of the two cascaded systems.

(6)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 11

System function decomposition

⎟⎟

⎟⎟

⎜⎜

⎜⎜

⎟⎠

⎜ ⎞

=⎛

=

⎟⎠

⎜ ⎞

⎟⎟

⎟⎟

⎜⎜

⎜⎜

=

=

=

∑ ∑

∑ ∑

=

=

=

=

=

=

N

k

k k M

k

k k

M

k

k N k

k

k k N

k

k k M

k

k k

z a z

b z

H z H

z b z

a z

H z H z

a z b z

H

1 0

2 1

0 1

1 2

1 0

1 ) 1

( ) (

1 ) 1 ( ) ( 1

) (

] [n v

] [n w

In the time domain

⎪⎪

⎪⎪⎨

+

=

=

− +

=

=

=

=

=

] [ ] [ ]

[

] [ ]

[

] [ ]

[ ]

[

1 0

0 1

n v k n y a n

y

k n x b n

v

k n x b k

n y a n

y

N

k k M

k k

M

k k N

k k

⎪⎪

⎪⎪⎨

=

+

=

=

=

] [ ]

[

] [ ] [ ]

[

0 1 M

k k N

k k

k n w b n

y

n x k n w a n

w

(7)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 13

Minimum delay implementation

„ One big difference btw the two implementations concerns the number of delay elements

) , max(N M

M N +

Direct form I and II

„ Direct form I as shown in Fig. 6.3

‰ A direct realization of the difference equation

„ Direct form II or canonic direct form as shown in Fig.

6.5

‰ There is a direct link between the system function (difference equation) and the block diagram

(8)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 15

An example

„ Direct form I and direct form II implementation

2 1

1

9 . 0 5

. 1 1

2 ) 1

(

+

= +

z z

z z H

Part II: Signal flow graph description

„

Block diagram representation of computational structures

„

Signal flow graph description

„

Basic structures for IIR systems

„

Transposed forms

„

Basic structures for FIR systems

(9)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 17

Signal flow graph (SFG)

„ As an alternative to block diagrams with a few notational differences.

„ A network of directed branches connecting nodes.

variable

Signal flow graph

Nodes in SFG represent both branching points and adders (depending on the number of

incoming branches), while in the diagram a special symbol is used for adders and a node has only one incoming

(10)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 19

From flow graph to system function

Fig. 6.12

„ Not a direct form,

‰ cannot obtain H(z) by inspection.

‰ But can write an equation for each node

„ involve feedback, difficult to solve

„ By z-transform Ælinear equations

] [ ] [ ] [

] 1 [ ] [

] [ ] [ ] [

] [ ] [

] [ ] [ ] [

4 2

3 4

2 3

1 2

4 1

n w n w n y

n w n w

n x n w n w

n w n w

n x n w n w

+

=

=

+

=

=

= α

] 1 [ ]

[ 3

4 n =w n

w

From flow graph to system function

+

=

=

+

=

=

=

) ( ) ( ) (

) ( )

(

) ( ) ( ) (

) ( )

(

) ( ) ( ) (

4 2

3 1 4

2 3

1 2

4 1

z W z W z Y

z W z z W

z X z W z W

z W z W

z X z W z W

α

+

=

+

=

=

) ( ) ( ) (

)) ( ) ( ( ) (

)) ( ) ( ( ) (

4 2

2 1 4

4 2

z W z W z Y

z X z W z z W

z X z W z

W α

] [ ]

1 [ ]

[ ) 1 (

) 1 (

) (

1 1

1 1

1 1

n u n

u n

h

z z z

H

z z X z z

Y

n

n +

=

=

⎟⎟

⎜⎜

=

α α

α α α

α

? is system the

real, is

Ifα All-pass

Causal!

(11)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 21

From flow graph to system function

„ Fig. 6.13

„ Fig. 6.12

Different implementations, different amounts of computational resources

Part III: Basic structures for IIR systems

„

Block diagram representation of computational structures

„

Signal flow graph description

„

Basic structures for IIR systems

„

Transposed forms

(12)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 23

Direct form I

=

=

= N

k

k k M

k

k k

z a

z b z

H

1 0

1 ) (

= =

− +

= M

k k N

k

ky n k b x n k

a n

y

0 1

] [ ]

[ ]

[

Direct form II

=

=

= N

k

k k M

k

k k

z a

z b z

H

1 0

1 ) (

= =

− +

= M

k k N

k

ky n k b x n k

a n

y

0 1

] [ ]

[ ]

[

(13)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 25

Example

2 1

2 1

125 . 0 752 . 0 1

2 ) 1

(

+

+

= +

z z

z z z

H

Cascade form

Factor the numerator and denominator polynomials

=

=

=

=

=

=

=

=

2 1

2 1

1

1

* 1 1

1 1

1

* 1 1

1

1 0

) 1

)(

1 ( ) 1 (

) 1

)(

1 ( ) 1

( 1

)

( N

k

k k

N

k

k M

k

k k

M

k

k N

k k k M

k k k

z d z

d z

c

z g z

g z

f A

z a

z b z

H

=

+

= Ns +

k k k

k k

k

z a z a

z b z b z b

H

1 2

2 1 1

2 2 1 1 0

) 1 (

(14)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 27

An example: from 2

nd

-order to 1st-order cascade

) 25 . 0 1 ( ) 5 . 0 1 (

) 1 ( ) 1 ( 125

. 0 752 . 0 1

2 ) 1

( 1 1

1 1

2 1

2 1

+

= + +

+

= +

z z

z z

z z

z z z

H

Parallel form by partial fraction expansion

=

=

=

+

+

=

2

1

1

1

* 1

1

1 1

0

) 1

)(

1 (

) 1 (

) 1 (

N

k k

k N

k k

k N

k k k

z d z d

z e B

z c z A

C z H

k k p

(15)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 29

Feedback in IIR systems

Feedback loop: a closed path Necessary but not sufficient condition for IIR system (Feedback introduced poles could be cancelled by zeros)

All loops must contain at least one unit delay element

1 1

2 2

1 1 ) 1

(

= +

= − az

az z z a

H ]

[n u an

) 1 /(

] [ ] [

] [ ] [ ] [

a n x n y

n x n ay n y

=

+

=

Part IV: Transposed forms

„

Block diagram representation of computational structures

„

Signal flow graph description

„

Basic structures for IIR systems

„

Transposed forms

(16)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 31

Transposed form for a first-order system

Flow graph reversal or transposition also provides alternatives:

reversing the directions of all branches and reversing the input and output

Resulting in same H(z)

1 1

) 1

(

= − z az H

Transposed direct form II and direct form II

The transposed direct form II implements the zeros first and then the poles, being important effect for finite-precision existing

(17)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 33

Part V: Basic structures for FIR systems

„

Block diagram representation of computational structures

„

Signal flow graph description

„

Basic structures for IIR systems

„

Transposed forms

„

Basic structures for FIR systems

Direct form

„ So far, system function has both poles and zeros.

FIR systems as a special case.

„ Causal FIR system function has only zeros (except for poles as z=0)

⎩⎨

⎧ =

= 0, otherwise ,..., 1 , 0 ] ,

[ b n M

n

h n

=

= M

k

kx n k b

n y

0

] [ ]

[

(18)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 35

Cascade form

Factoring the polynomial system function

∑ ∏

=

=

= + +

= Ms

k

k k

k M

n

n b b z b z

z n h z

H

1

2 2 1 1 0 0

) (

] [ )

(

Linear-phase FIR systems

„ Generalized linear-phase system

„ Causal FIR systemshave generalized linear-phase if h[n] satisfies the symmetry condition

M n

n h n M h

M n

n h n M h

,..., 1 , 0 ], [ ] [

or

,..., 1 , 0 ], [ ] [

=

=

=

=

=

= M

k

kx n k b

n y

0

] [ ]

[ constants

real are and

, of function real

a is ) (

) ( ) (

β α

ω ω

β ωα ω

ω j

j j j j

e A

e e A e

H = +

(19)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 37

Linear-phase FIR systems

] 2 / [

] / [ ]) [

] [ ](

[ ]

[

] [ ] [

if

] [

] [

] 2 / [

] / [ ] [ ] [

] [ ] [ ]

2 / [

] / [ ] [ ] [

] [ ] [ ]

[

integer even

an is if

1 2 /

0

1 2 /

0 1

2 /

0

1 2 / 1

2 /

0 0

M n x M k h k M n x k n x k h n

y

n h n M h

k M n x k M h M

n x M k h k n x k h

k n x k h M

n x M k h k n x k h

k n x k h n

y M

M

k

M

k M

k

M

M k M

k M

k

− +

+

− +

=

=

+

− +

− +

=

− +

− +

=

=

=

=

=

+

=

=

=

Linear phase FIR systems

M is an even integer and h[M-n]=h[n]

] 2 / [

] / [ ]) [

] [ ](

[ ]

[

1 2 /

0

M n x M k h k M n x k n x k h n

y

M

k

− +

+

− +

=

=

(20)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 39

Discussions

„ Implementation of FIR and IIR systems

„ Use signal block diagram flow graph representation to show the computational structures

„ Although two structures may have equivalent input- output charateristics for infinite-precision

represenations of coefficients and variables, they may have dramatically different behaviour when the numerical precision is limited.

Summary

„

Block diagram representation of computational structures

„

Signal flow graph description

„

Basic structures for IIR systems

„

Transposed forms

„

Basic structures for FIR systems

(21)

Digital Signal Processing, VI, Zheng-Hua Tan, 2006 41

Course at a glance

Discrete-time signals and systems

Fourier-domain representation

DFT/FFT

System analysis

Filter design

z-transform MM1

MM2

MM9, MM10 MM3

MM6

MM4

MM7, MM8 Sampling and

reconstruction MM5

System structure System

Referensi

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