Lec. 6: Folding & Interpolating ADCs

Lec. 6:

Folding & Interpolating ADCs

Lecturer: Hooman Farkhani

Department of Electrical Engineering Islamic Azad University of Najafabad Feb. 2016.

Email: H_farkhani@yahoo.com

In The Name of Almighty

Folding ADC

لدبم رد اهتیب دادعت شیازفا اب اهرگ هسیاقم دادعت ییامن شیازفا لکشم ندومن فرطرب روظنم هب • Flash

،

یدورو ندرک ات کینکت زا Folding(

) دوش یم هدافتسا .

هدیا • و کی یاج هب عجرم ژاتلو نیدنچ اب یدورو هسیاقم یارب رگ هسیاقم کی زا هدافتسا راتخاس نیا یلصا

عجرم ژاتل (

شلف راتخاس )

دشاب یم .

طسوت یدورو لانگیس ،فده نیا هب یبایتسد یارب Folding prea

mplifiers ات صخشم دادعت هب

Fold( )

دوش یم .

،دوش یم اهرگ هسیاقم دادعت هجوت لباق شهاک بجوم لمع نیا • یارب شلف لدبم هکیلاح رد هکیروط هب

تقد 4 هب تیب 15

لدبم ،دراد زاین رگ هسیاقم folded

( ندروخ ات دادعت اب 2

تیب

= 4 ) هب طقف 6

ددع هسیاقم

تسا دنمزاین رگ .

Folding ADC

شزرارپ تیب ود نییعت یارب رگ هسیاقم هس MSB(

) ، ( یدومع طوطخ )

هسیاقم هس و یارب رگ­

Signal Folding

• Analog pre-processing

→ folding amplifier

• Folding factor (F) is equal to the number of folded segments.

Segment indicator (log₂(F) bits)

Fine quantization N-log₂(F) bits V_FS

0 2^N-1

…

V_i D_o

1 2 3 4 5 6 7 8

Folding ADC Architecture

• The fine ADC performs amplitude quantization on the folded signal.

• The coarse ADC differentiates which segment V_in resides in.

…

2ⁿ¹ Sub-Ranges

Folding ADC Example: 6-Bit

• Coarse ADC determines segment, fine ADC determines level within segment

• Folding factor (F^F) quantifies number of folder output segments [B. Murmann]

Folding Amplifier

Example: 2-Bit Folding Circuit

Zero-Crossing Detection

• Only detect zero-crossings instead of fine amplitude quantization

→ insensitive to folder nonlinearities.

• P parallel folding amplifiers are required.

F = 3, P = 4

V_i V_o

0

Offset Parallel Folding

• Total # of zero-crossings = Total # of preamps = P*F

• Parallel folding saves the # of comparators, but not the # of preamps

→ still large C .

F = 3, P = 4

Reference Ladder

Folder 2 V2

Folder 1 V1

Vi

VR

Folder 3 V3

Folder 4 V4

Vi

0

Vi

0

Vi

0

Vi

0

c

c

c

c

Folding ADC

یاهرگ هسیاقم هکییاجنآ زا ،درکلمع تعرس رظن هطقن زا 

و LSB یم لمع نامزمه MSB

اذل ،دننک­

لدبم درکلمع تعرس Folding

هباشم دناوت یم Flash

دشاب . یلاغشا حطس و ناوت فرصم شهاک اب

یاهلدبم Folding

هب تبسن لدبم

شلف ات نشولوزر ، 10

تسا یزاس هدایپ لباق تیب .

Pros

 Folding reduces the comparator number by the folding factor F, while the number of preamps remains the same.

Cons

 Multiple differential pairs in the folder increases the output loading.

Interpolating ADC

Idea:

– Interpolation between preamp outputs

• Reduces number of preamps

– Reduced input capacitance

– Reduced area, power dissipation

• Same number of latches

• Important “side-benefit”

– Decreased sensitivity to preamp offset

• Improved DNL

Interpolation

Uniformly spaced zero-crossings in flash ADCs

… …

V_i

V_R¹

VR2

V_R³

Vo1

Vo2

V_o³

V_o¹ V_o² V_o³

V_R¹ V_R² V_R³

Ref: R. van de Grift, I. W. J. M. Rutten, and M. van der Veen, "An 8-bit video ADC incorporating folding and interpolation techniques," IEEE Journal of Solid-State Circuits, vol. 22, pp. 944-953, issue 6, 1987.

Resistive Interpolation

• Intermediate zero-crossings are recovered by interpolation.

• DNL is improved by voltage interpolation.

• Requires overlapped linear regions b/t adjacent preamps.

V_o¹ V_o² V_o³

V_R¹ V_R² V_R³

… …

V_i

V_R¹

V_R³

V_o¹

V_o²

V_o³

Interpolation Nonlinearity

• Nonlinear TF of preamps cause errors in the interpolated zero-crossings.

• Interpolation nonlinearity directly translates into DNL and INL.

• Impedance mismatch due to interpolation also causes dynamic errors.

V_A

VB/4+VA*3/4 VA/2+VB/2 VB*3/4+VA/4

V_B

A

B

A

B

Capacitive Interpolation

K. Kusumoto, JSSC, Dec. 1993

Current Interpolation

Less accurate then voltage interpolation due to mismatch of current mirrors

Ref: M. Steyaert, R. Roovers, and J. Craninckx, "100 MHz 8 bit CMOS interpolating A/D converter," in Proceedings of IEEE Custom Integrated Circuits Conference, 1993, pp. 28.1.1-28.1.4.

Features of Interpolation

• Reduces the total number of preamps by the interpolation factor.

• Total number of latches stay the same.

• Reduces the total input capacitance (larger input BW).

• More area- and power-efficient than straight flash ADC.

• Voltage interpolation improves DNL.

• Subject to preamp nonlinearities.

• For interpolation factors >2, amplifier nonlinearity can limit the precision of zero crossings

– See e.g. Van de Plassche, p.121

Folding & Interpolating ADC: Example

[Murmann]

Folding & Interpolating ADCs (Recent Years):

Reference /Date

Technology (nm)

Resoluti on (Bit)

Speed (Gs/s)

Supply (V)

Power (mW)

ERBW

(GHz) ENOB (Bit) FOM (pJ/step)

[JSCC 2009]

Bob Verbrugen

90n 5 1.75 1 2.2mW 0.787 @DC:

4.7 0.16

[JSCC 2010]

Nakajima 90n 6 2.7 1 50mW N.A. 5.28 0.47

[JSCC 2009]

C.Taft 180n 10 1 1.8 1200mW N.A. 9.06 2.24

[ISSCC 2004]

C.Taft

180n 8 1.6 1.8 1200mW N.A. 7.26 4.89

References



Professor Boris Murmann Course slides 2012, Stanford University- EE315B course



Professor Y. Chiu course slides, Fall 2014.