• Tidak ada hasil yang ditemukan

7. Control System Design by the Root-Locus Method

N/A
N/A
Protected

Academic year: 2024

Membagikan "7. Control System Design by the Root-Locus Method"

Copied!
32
0
0

Teks penuh

(1)

System Control

Professor Kyongsu Yi

©2014 VDCL

Vehicle Dynamics and Control Laboratory Seoul National University

7. Control System Design by

the Root-Locus Method

(2)

Control system design

• Control System Design ; to perform specific tasks

• requirements ; performance specifications

- accuracy (steady state error)

- relative stability ( , damping ratio)

- speed of response ( , , : natural frequency)

• Given purpose  precise performance specifications  an optimal control system

• Controller ;

- digital controller , in many cases - microprocessor based controller - software; control algorithm

- hydraulic pneumatic

electronic (analog) mechanical

ζ

T e

ζωnt ωn
(3)

Design procedure

Yes

Given purpose for given system

Modeling

Design controller

Digital simulation

Evaluation

Prototype test / Gain tuning

END

1) Build up  test month to years Suspension

- spring, damper - tune the parameter

- test/evaluation (road tests)

2) Lab tests (simulator) week to months

3) Computer simulation (software) day to weeks / test 검증 (vehicle test/final tuning)

48개월 개발기간 ; 80년대 초반

36개월 80년대 말

30개월 90년대 초반

24개월 2000년대

자동차

(4)

Preliminary Design Considerations

• Root – Locus approach ; - graphical method

- gain or parameter variations

• Effect of the addition of poles ; less stable

• Effect of the addition of zeros ; more stable

× σ jω

× σ jω

× × σ

jω

× ×

× σ jω

× ×

× σ jω

× ×

× σ jω

× ×

× σ jω

× ×

× σ jω

× ×

(5)

Lead/Lag Compensation

1

( ) 1

c c

s T G s K

s α T

= +

+

(6)

1 ( )

( ) 1

o

c i

E s K s T

E s s

α T

= +

+

Lead/Lag Compensation

1 1 2 2 4 1 3 2 c

T R C T R C K R C

R C α

=

=

=

(7)

Lead/Lag Compensation

1

( ) 1

c c

s T G s K

s αT

= +

+

When s= jω 1 1

( )

Gc j j j

T T

ω ω ω

α

= + +

Lead Compensator  Lag Compensator 

1 1

( ) 0 0 1 G jc

T T ω α

<α > < <

1 1

( ) 0 1 G jc

T T ω α

>α < <

σ jω

1

T

×

1 αT

σ

jω

1

T

×

1 αT

Lead Lag

(8)

Root Locus / Lead/Lag Compensator

• Root locus lead/lag compensator : powerful tool

when ; specification – time domain spec.

 • damping ratio • natural frequency

• dominant closed loop poles • rise time etc.

① Time domain spec

② unstable or

undesirable transient-response characteristics

 Lead Compensators ( relocate dominant closed loop poles)

(9)

0.5 2

2

n

Kv

ζ ω

=

=

=

Example

Ex.

(

4

)

( ) 2

G s = s s +

2

( ) 4

( ) 2 4

C s

R s = s s

+ + , closed loop poles : s= − ±1 3j

The static velocity error constant

0 2

0

( ) 1 ( )

1 ( )

1 1

( ) lim

1 ( )

1 1 1

lim 0.5

( ) 2

ss s

s v

E s R s

G s

e t s

G s s sG s K

 =

 +



 = +



= = = =



Desired : ωn =4,ζ =0.5 2 2 3

s j

⇒ = − ± σ

jω

2

×

×

3

current closed loop poles Root Locus

Real Axis

Imaginary Axis

-1 -0.8 -0.6 -0.4 -0.2 0

-5 -4 -3 -2 -1 0 1 2 3 4 5

System: sysT Gain: 0 Pole: -1 + 1.73i Damping: 0.5 Overshoot (%): 16.3 Frequency (rad/sec): 2

System: sysT Gain: 0 Pole: -1 - 1.73i Damping: 0.5 Overshoot (%): 16.3 Frequency (rad/sec): 2

(10)

Example

Desired : ωn =4,ζ =0.5 2 2 3

s j

⇒ = − ±

1) Angle of deficiency

φ

2 2 3

4 210

( 2) s j s s =− ± = −

+

1

30 , 30 , 0 1

1 s T K

s T

φ α

α

= = + = < <

+

Lead Compensator 2) Choose such that 1

αT 1 T

1 1 30 s T s αT

+ = +

가능한한

α

가크게 증가 (Good)

K

v

Text 방법 ploe = -5.4 zero = -2.9 =0.536

1 0.345 2.9

1 0.185 5.4

T αT

= =

= =

α

(11)

Example

Pole-zero location for large

α

0 2

0

1 1

lim 1 ( ) ( )

1 1

lim ( ) ( )

ss s

c

s

c v

e s

G s G s s

sG s G s K

= +

= =

0

0

lim ( ) ( ) 1 lim 4

1 2

2

v c

s

s

K sG s G s s T

K s

s T K

α α

=

= +

+ +

= ⋅ ⋅

(12)

Example

Lead Compensator : pole-zero selection for large

P

α

σ jω

×

15

4 D

P

15

C B

2 2 φ

φ

1

T 1

αT

: desired pole

2 2 3 j

− +

C D

: pole :

: zero : 1

T 1 αT

Lead Compensator

Fig 7-9 Ogata

(13)

Example

3) Magnitude Condition

2 2 3

2 2 3

2.9 4 ( ) ( )

5.4 ( 2)

1 ( ) ( ) 0

2.9 4

( ) ( ) 1

5.4 ( 2)

c c

c s j

c c

s j

G s G s K s

s s s G s G s

G s G s K s

s s s

=− +

=− +

= +

+ +

+ =

= = +

+ +

Lead Compensator 1

2.9 1 0.345 1

( ) 4.68 2.51

5.4 1 1 0.185 1

c c c

s s T Ts s

G s K K

s Ts s

s T

αα α

+ + + +

= = = =

+ + + +

Kc =4.68

Analog controller

2 4 1 1

1 3 2 2

( ) 1

( ) 1

o i

E s R R R C s E s R R R C s

= +

+

1 2

3

10 10

C C F

R k

µ

= =

 = Ω Arbitrarily chosen

Digital controller

1

1 1

1 2 2 2

( ) 0.185 1

, 0.185

c

u a

G s K

e s

u K e

u u u u u ae

u

= = +

+

=

= + + =

 >

(14)

Example

Root locus of the compensated system

× σ j ω

×  ×

− 5.4

− 2.9

− 2 0

2 2 3 j

• − +

2 2 3 j

• − −

( )

2.9 4

5.4 2

c

K s

s s s

+

+ +

Comparison of step responses • original system

• compensated system

Root Locus

Real Axis

Imaginary Axis

-6 -5 -4 -3 -2 -1 0

-15 -10 -5 0 5 10 15

System: sysDG Gain: 1.08 Pole: -2 - 3.54i Damping: 0.492 Overshoot (%): 17 Frequency (rad/sec): 4.07 System: sysDG

Gain: 1.09 Pole: -2 + 3.58i Damping: 0.489 Overshoot (%): 17.2 Frequency (rad/sec): 4.1

(15)

Example

Root locus of the compensated system

( )

2.9 4

5.4 2

c

K s

s s s

+

+ +

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

0 0.2 0.4 0.6 0.8 1 1.2 1.4

time [sec]

response

step response

uncompensated compensated

(16)

Example

4) Static velocity error constant ;

 가능한한 증가에기여 , lead Compensator로충분히증가하지못한 경우 Lag compensator v추가 Lead-Lag Compensator

K Kv

α

0 0 2 0

1 1 1 1 1

( ) lim ( ) lim lim

0.345 1 4

1 ( ) ( ) 1 ( ) ( ) ( ) ( )

2.51 0.185 1 ( 2) 1 0.1984

2.52 2

ss s s s

c c c

e t s R s s

G s G s G s G s s sG s G s s

s s s s

= = = =

+ + ++ +

= =

×

5.04 ( 2)

v v

K = old K =

(17)

The Procedure for design a Lead compensator

1) Performance Spec.

desired locations for the dominant closed-loop poles

2) Draw the root locus

(1) Check whether or not the gain adjustment alone satisfactory results (2) If not calculate the angle deficiency

φ

3)

dc gain ;

; compensate angle deficiency 1

( ) 1

1 1

c c c

s T Ts

G s K K

s Ts T

αα α

+ +

= =

+ +

Kcα ,T

α

4) Tune to locate the closed – loop poles at the desired locations ; as large as possible

,T α α

5) Tune from the magnitude condition Kc

(18)

Lag Compensation

1

( ) ˆ , 1

c c 1

s T G s K

s T

β β

= + >

+

① satisfactory transient response

② unsatisfactory steady state characteristics i) closed loop poles : no change

ii) open loop gain increase

Lag compensator

β >1

Procedure

1) Draw the root-locus plot for the uncompensated system  locate the dominant closed loop poles

2)

calculate 1

( ) 1

c c

s T G s K

s βT

= +

+

c( )

G s

3) Evaluate the particular static error constant specified ; The static velocity error constant

4) Determine pole and zero of the lag compensator s.t.

① the static error constant is sufficiently large ② without altering the original root loci.

5) Draw a new root-locus plot

6) Adjust from the magnitude condition Kˆc

1 1 1 s T

s βT +

+ Angle

pole, zero close together and near the origin of the s-plane

( ) 50 G sc

(19)

Lag Compensation

The static velocity gain ;

Uncompensated system

Compensated system

lim0 ( )

v s

K sG s

=

0 0

ˆv lim c( ) ( ) lim c( ) v ˆc v

s s

K sG s G s G s K K β K

= = = ⋅ ⋅

Increased by a factor of ˆc 1

factor K

β =

ˆc

K β

(20)

Example

Ex. ( )( )

( )( )

( ) 1.06

1 2

( ) 1.06

( ) 1 2 1.06

G s s s s

C s

R s s s s

= + +

= + + +

The dominant closed-loop poles ;

1

0.3307 0.5864 0.491

0.673 / sec 0.53sec

n v

s j

rad K

ζ ω

= − ±

=

=

=

Increase without change of the location of dominant poles Lag compensator Kv 5sec1

1) 1

( ) ˆ

c c 1

s T G s K

s βT

= +

+ ˆ ˆ

v c v

K =K βK

2) Let 10 , 1 0.05, 1 0.005

T T

β = = β =

ˆ 0.05

( ) 0.005

c c

G s K s s

= +

+

Angle contribution near a dominant closed loop poles

0.3307 0.5864

ˆ 0.05 4

0.005

c

s j

K s

s =− ±

+ +

No significant change

Root Locus

Real Axis

Imaginary Axis

-6 -5 -4 -3 -2 -1 0 1 2

-4 -3 -2 -1 0 1 2 3 4

System: sysT Gain: 0 Pole: -0.331 + 0.586i Damping: 0.491 Overshoot (%): 17 Frequency (rad/sec): 0.673

System: sysT Gain: 0 Pole: -0.331 - 0.586i Damping: 0.491 Overshoot (%): 17 Frequency (rad/sec): 0.673

(21)

Example

3) G s G sc( ) ( )=Kˆc ss++0.0050.05 s s

(

+1.061

)(

s+2

)

• dominant closed loop poles same damping ratio

s = − 0.31 ± j 0.55

4) Magnitude condition

( )( )

0.31 0.55

0.05 1.06

ˆ 1

0.005 1 2

c

s j

K s

s s s s =− ±

+ =

+ + +

ˆc 0.9656

K =

× × ×

× 0

o

<

<

Root Locus

Real Axis

Imaginary Axis

-6 -5 -4 -3 -2 -1 0 1 2

-4 -3 -2 -1 0 1 2 3 4

System: sysDG Gain: 1.01 Pole: -0.31 + 0.556i Damping: 0.487 Overshoot (%): 17.4 Frequency (rad/sec): 0.636

System: sysDG Gain: 1.01 Pole: -0.31 - 0.556i Damping: 0.487 Overshoot (%): 17.4 Frequency (rad/sec): 0.636

(22)

Example

Verification ;

( )( )

0 2

0

1

,

1 1 1

ˆ lim 1 ( ) ( ) ˆ lim ( ) ( )

0.05 1.06 0.9656

0.005 1 2

5.12 sec

s c

v

v c

s

v old

s G s G s s K

K sG s G s s

s s s

βK

= +

=

= +

+ + +

= 

5)

s

3

= − 2.326 s

4

= − 0.0549

A long tail of small amplitude

(23)

Example

0 5 10 15 20 25 30 35 40 45 50

0 5 10 15 20 25 30 35 40 45 50

time [sec]

response

ramp response

uncompensated compensated

0 5 10 15 20 25 30 35 40 45 50

0 0.2 0.4 0.6 0.8 1 1.2 1.4

time [sec]

response

step response

uncompensated compensated

(24)

Lag-Lead Compensation

Lead compensator  speeds up, increase the stability

Lag compensator improves the steady state accuracy but reduce the speed

Lag-Lead compensators

Design procedure

1) Design lead compensator to relocate the dominant poles 2) Design lag compensator to improve the s.s. gain

1 2

1 2

1 1

1 1

( ) 1

c c

Lead Lag

s s

T T

G s K

s s

T T

γ β

γ

β

> >

 +  + 

  

  

=     +      +   

(25)

Lag-Lead Compensation

Spec. 1) dominant poles

2) (steady state velocity error constant) Kv Step 1. Lead Compensator

1) choose desired poles 2) angle condition

determine the angle deficiency

3) magnitude condition

( ) ( )

1

1

1

1

1

( ) 180 2 1

c

s s

s T

K G s k

s T γ

=

+

= +

+

s1

φ

( )

1

1

1

1

1

180 2 1 ( )

s s

s T

k G s

s T γ φ

=

+

= = + −

+

(infinitely many ) ; choose one γ, T

1 1

1

1

( ) 1

c

s T

K G s

s T γ +

= +

Kc

(26)

Step 2. Lag Compensator, spec

1)

2) choose such that i)

ii)

Kv

1 2

0 0 0

1 2

1 1

lim ( ) ( ) lim ( ) lim ( )

v c c 1 c

s s s

s s

T T

K sG s G s sK G s sK G s

s s

T T

β

γ γ

β

 +  + 

  

  

= = =

 +  + 

  

  

β

T2

Lag-Lead Compensation

2

2

1 1 1 s T s βT

+

+ 

2

2

1

5 0

1 s T s βT

+

− < <

+



(27)

Example

Ex

(

4

)

( ) 0.5

G s = s s +

The closed-loop poles ;

1

0.25 1.9843 0.125

2 / sec 8sec

n v

s j

rad K

ζ ω

= − ±

=

=

= Desired spec : 0.5

5 80

n

Kv

ζ ω

=

=

=

Lead – Lag compensator

1 2

1 2

1 1

( ) , 1, 1

c c

1

s s

T T

G s K

s s

T T

γ β

γ

β

 +  + 

  

  

= > >

 +  + 

  

  

(28)

Example

Step 1. Lead Compensator 1) choose desired poles 2) angle condition

the angle deficiency = 55˚

choose , such that pole-zero cancelation happens

let

angle condition

3) magnitude condition

1 2.50 4.33

s = − ± j

(

40.5

)

s s1 235

s s = = −

+

( )

( ) ( ) 180 2 1

G sc + G s = − k+

T1

1 1

1 0.5 2

s s T

+T = + =

(

1

) (

1

)

10.04

0.5 0.5 55

s s

γ

γ

=

+ + + =

( )

1

0.5 4

5.021 0.5 1

6.26

c

s s c

K s

s s s

K

=

+ =

+ +

=

(29)

Example

Step 2. Lag Compensator

1)

2) choose such that i)

ii)

( ) ( )

0 0

0

lim ( ) ( ) lim ( )

lim 6.26 4 4.988 80

10.04 0.5 16.04

v c c

s s

s

K sG s G s sK G s

s s s

β γ

β β

β

= =

= = =

+

⇒ =

T2

1

2

2

1 1 1

s s

s T s βT =

+

+ 

2

2

2 2

1

5 0

1

5 5

s T

s T

T let T

β +

− < <

+

⇒ ≥ ⇒ =

1 1

5 ( ) 6.26 2

10.04 1

2 16.04 5

25.04( 0.2) ( ) ( )

( 5.02)( 0.01247)

c

c

s s G s

s s

G s G s s

s s s

 

 +   + 

 

=    

 

 +  +

   × 

= +

+ +

(30)

Example

Root locus of the compensated system

×

σ jω

×

×

Root Locus

Real Axis

Imaginary Axis

-6 -5 -4 -3 -2 -1 0

-0.25 -0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0.2 0.25

System: sysDG Gain: 0 Pole: -5.02 Damping: 1 Overshoot (%): 0 Frequency (rad/sec): 5.02

System: sysDG Gain: 0 Pole: -0.0125 Damping: 1 Overshoot (%): 0 Frequency (rad/sec): 0.0125

System: sysDG Gain: 0 Pole: 0 Damping: -1 Overshoot (%): 0 Frequency (rad/sec): 0

(31)

Example

0 1 2 3 4 5 6 7 8 9 10

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8

time [sec]

response

step response

uncompensated compensated

0 1 2 3 4 5 6 7 8 9 10

0 1 2 3 4 5 6 7 8 9 10

time [sec]

response

ramp response

uncompensated compensated

(32)

End of lecture note 7

Referensi

Dokumen terkait