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O S C S

Chapter 19.

MODERN FET STRUCTURES

Sung June Kimg [email protected] http://helios.snu.ac.krp

(2)

CONTENTS CONTENTS

Small-Dimension Effects

Select Structure Survey

MODERN FET STRUCTURES

(3)

Small-Dimension Effects

To achieve higher speeds and increased

packing densities FET device structures

packing densities, FET device structures

have become smaller and smaller.

(4)

Departure from long-channel behavior p g

Significant upward slant in the post pinch-off portions of the ID - VD

p

300

200 250

VG=2.6 V

V 2 4 V

µA]

150

200 V

G=2.4 V

VG=2.2 V

Current [µ

50 100

VG 2.2 V

VG=2.0 V

Drain C

L=0.6 µm

0 1 2 3 4

0

Drain Voltage [V]

MODERN FET STRUCTURES

(5)

In short-channel devices, V

T

becomes a

function of the gate dimension and the

function of the gate dimension and the

applied biases.

(6)

Threshold Voltage Modification Threshold Voltage Modification

Short-channel

|VT| monotonically decreases with decreasing L.

decreasing L.

The source and drain assist in depleting the region under the gateless gate

the region under the gate. less gate charge for inversion VT

MODERN FET STRUCTURES

(7)

) channel long

( V )

channel short

( V

VT = T T

First order quantitative expression

) Q

Q C (

1

) g

( )

(

BL BS

T T

T

= , QBS : QB for short-channel

Q Q f l h l

Co QBL : QB for long-channel

2W

W r

N

+

= 1

r 1 2W L

r C

W qN

j j T

o T

A [ homework ]

Examing VT / VT(long channel), short-

h l ff t d d b d i

channel effects are decreased by reducing xo, reducing rj, and increasing NA.

(8)

Narrow channel (skip) ( p)

|VT| monotonically increases with decreasing Z. ( Opposite to the L-dependence)

Z. ( Opposite to the L dependence)

The gate-controlled depletion region extends to the side lying in part outside the Z-width of to the side, lying in part outside the Z-width of the gate; that is, the effective charge /cm2

being balanced by the gate charge↑ ⌫ VTbeing balanced by the gate charge↑ ⌫ VT

MODERN FET STRUCTURES

(9)

If the lateral regions are assumed to beIf the lateral regions are assumed to be quarter-cylinders of radius WT

L W ZLW

N π 2

ZL

L 2W

ZLW qN

) width narrow

( Q

2 T T

A

B

+

=

Z W 1 2

W

qNA T π T

⎛ +

=

(narrow width) qN W W

V A T π T

=

( )

Z 2 width C

narrow V

o

T =

(10)

Parasitic BJT Action Parasitic BJT Action

MOSFET bears a physical resemblance to a lateral BJT

Punch-through g

The depletion regions around the source and drain to touch.

to touc

The gate loses control of the subgate region and the ID flows beneath the surface through the

the I flows beneath the surface through the touching depletion regions.

MODERN FET STRUCTURES

(11)

Punch-through can be suppressed by increasing NA and decreasing the depletion widths.g p

increasing parasitic capacitances.

perform a deep-ion implantation to selectively increase the doping of the subgate region.

increase the doping of the subgate region.

(12)

Carrier multiplication and regenerative feedback

I h t h l d i th i lti li ti

In short-channel devices, the carrier multiplication coupled with regenerative feedback can dramatically increase ID and places a reduced limit on the

increase ID and places a reduced limit on the maximum VD.

The added electrons drift into the drain. The source

MODERN FET STRUCTURES

e added e ect o s d t to t e d a e sou ce PN junction is forward biased.

(13)

Hot-Carrier Effects Hot Carrier Effects

Oxide charging ( charge injection and )

trapping in the oxide )

In the vicinity of the drain, some of carriers gain a sufficient amount of energy to surmount the Si-

SiO2 barrier. A charge build-up within the oxide

A larger percentage of the gated region is affected in the smaller devices.

Significant changes in VT and gm.

Oxide charging limits the useful “life” of a device.g g

To minimize hot-carrier effects, the LDD ( Lightly Doped Drain ) structure is used

Doped Drain ) structure is used.

(14)

Velocity saturation Velocity saturation

The carrier drift velocities inside Si at T=300K approach a maximum value of 7

when the electric fields are large.

sec /

cm 10

vdsat7

g

IDsat is significantly reduced. Approximately,

dsat T

G o

Dsat ZC (V V )v

I ≅ −

( )

( ) l h l

channel -

short

;

2 T G

Dsat

V V

I

V V

I ∝ −

MODERN FET STRUCTURES

(

G T

)

2

; long - channel

Dsat

V V

I ∝ −

(15)

(a) Experimental (b) Theoretical (a) Experimental

characteristics

(b) Theoretical

characteristics including velocity saturation

velocity saturation

(c) Theoretical

characteristics ignoring velocity saturation

(16)

Ballistic Transport

If very small dimension structures have L< l ( the average distance between scattering ( the average distance between scattering events ), a large percentage of the carriers

t l f th t th d i ith t

travel from the source to the drain without experiencing a single scattering event.

It can lead to super-fast devices.

vdsat

>

carriers of

velocity average

Qthe

MODERN FET STRUCTURES

(17)

Select Structure Survey

LDD (Li htl D d D i ) T i t

LDD (Lightly Doped Drain) Transistors

The reduced dimension devices are more susceptible to hot-carrier effects.

Lightly doped drain region (n- region) betweenLightly doped drain region (n- region) between

the end of the channel and the drain

Electric field The voltage drop in the n- region lowers the maximum

Carrier injection into the oxide O id h i

Oxide charging

(18)

DMOS

MODERN FET STRUCTURES

(19)

Buried-Channel MOSFET

(20)

SiGe Devices

MODERN FET STRUCTURES

(21)

SOI Structure

(22)

MODFET (HEMT)

MODERN FET STRUCTURES

(23)

MODFET, PHEMT

Referensi

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