Voltage Levels and the Static Discipline

Chap. 5 The Digital Abstraction

Voltage Levels and the Static Discipline

Analog Signal Processing

Noise Problem

Digital System: Noise immunity !!

Value Discretization

 What about 2.5 V ?

Forbidden Region

 Where is the noise margin?

Actual Value Discretization

 Noise margin

IH OH

OL IL

V V

NM

V V

NM









1 0

Static Discipline

 If inputs to a digital system meet valid input

thresholds, the system guarantees that its outputs will meet valid output thresholds.

Conclusion

 Value discretization

 Noise margin

 Static discipline

Chap. 6 The MOSFET Switches

MOSFET and Switch(S) Model Static Analysis Using S Model

SR Model of MOSFET Static Analysis

Switch Logic

 Key: switch device

Logic Inverter

Example

 1. Find the logic of this circuit.

 2. Draw the following logic circuit:

) ( B C A

Y  

MOSFET

 Metal Oxide Semiconductor Field-Effect Transistor

Switch (S) Model of MOSFET

MOS Inverter

Voltage Transfer Characteristics

 Does it satisfy the following static discipline?

– (1) – (2)

V V

V V

V V

V

V_OH  4.5 , _OL  0.5 , _IH  4 , _IL  0.9 V V

V V

V V

V

V_OH  4 , _OL 1 , _IH  3.5 , _IL 1.5

Switch Resistor (SR) Model of MOSFET

 Better approximation

MOSFET Inverter: Revisted

Physical Structure of MOSFET

Regions of operation of NMOS transistor

2 2

) (

) 1

( ) (

,

T GS

A DS T

GS D

T GD

T GS

V V

K

V V V

V K i

V V

V V















] )

( 2 [

,

2 DS DS

T GS

D

T GD

T GS

V V

V V

K i

V V

V V











0 ,







D

T GD

T GS

i

V V

V V

I-V Characteristic of NMOS

) 2 (

1

L C W

K   _OX

Conductance parameter

W R L R_ON  _n

MOS Circuit Analysis



 k R_D 1

V V_GG  2.4

V V_DD 10



 0 RG

V mA K

V

V_T 1.4 , 10 /

Inverter Characteristics: SR Model











 V V V R k R k

V_S 5 , _T 1 , _L 14 , _ON 1

Example 6.5

 Determine W/L for correct inverter operation











 V V V R k R k

V_S 5 , _T 1 , _L 10 , _n 5

Example 6.6

 To satisfy the following static discipline redesign the inverter.











 V V V R k R k

V_S 5 , _T 1 , _L 10 , _n 5

Static Analysis of NAND Gate: SR Model











 V V V R k R k

V_S 5 , _T 1 , _L 14 , _ON 1

Signal Restoration and Gain

 Buffer restores the signal level (example)

Gain =

V

v_O 1 ^B

I

V

v_O 1.6 v_O 1V

Noise 0.6 V

V V

V V

V V

V

V_IL  2 , _IH  3 , _OL 1 , _OH  4

IL IH

OL OH

V V

V V





Buffer Voltage Transfer Characteristics (VTC)

VOL

VOH

VIL V_IH vO

vI

Inverter VTC

VOL

VOH

VIL V_IH vO

vI

vo

DD

OH V

V 

 0 VOL

2

DD IH

IL

V V

V   v^I

Ideal VTC

Conclusion

 MOSFET and S Model

 MOSFET and SR Model

 MOSFET Analysis

 Signal Restoration and Gain