Channel equalization techniques for non-volatile memristor memories
Item Type Conference Paper
Authors Naous, Rawan;Zidan, Mohammed A.;Salem, Ahmed Sultan;Salama, Khaled N.
Citation Naous, R., Zidan, M.A., Sultan, A. and Salama, K.N., 2016, March.
Channel equalization techniques for non-volatile memristor
memories. In 2016 Annual Conference on Information Science and Systems (CISS) (pp. 111-116). IEEE.
Eprint version Post-print
DOI 10.1109/CISS.2016.7460486
Publisher Institute of Electrical and Electronics Engineers (IEEE)
Journal 2016 Annual Conference on Information Science and Systems (CISS)
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Channel Equalization Techniques for Non-Volatile Memristor Memories
Rawan Naous∗, Mohammed Affan Zidan†, Ahmed Sultan∗, and Khaled Nabil Salama∗
∗King Abdullah University of Science and Technology, Saudi Arabia,{rawan.naous, ahmed.salem, khaled.salama}@kaust.edu.sa
†University of Michigan, USA,{[email protected]}
Abstract—Channel coding and information theoretic ap- proaches have been utilized in conventional non-volatile memories to overcome their inherent design limitations of leakage, coupling and refresh rates. However, the continuous scaling and integra- tion constraints set on the current devices directed the attention towards emerging memory technologies as suitable alternatives.
Memristive devices are prominent candidates to replace the conventional electronics due to its non-volatility and small feature size. Nonetheless, memristor-based memories still encounter an accuracy limitation throughout the read operation addressed as the sneak path phenomenon. The readout data is corrupted with added distortion that increases significantly the bit error rate and jeopardizes the reliability of the read operation. A novel technique is applied to alleviate this distorting effect where the communication channel model is proposed for the memory array.
Noise cancellation principles are applied with the aid of preset pilots to extract channel information and adjust the readout values accordingly. The proposed technique has the virtue of high speed, energy efficiency, and low complexity design while achieving high reliability and error-free decoding.
I. INTRODUCTION
Non-volatile memory systems are storage mediums that retain the data without the need of having an input bias. The physical properties of these systems make retrieving the saved data a distorting process and prone to errors. Particularly due to mechanisms such voltage drift, overwriting, or inter-cell coupling, the threshold between the high and low bit is not clear and affects the decoding operation. Communication and information theoretic principles have been employed into the non-volatile memory domain to enhance the reliability of the memory array. Error correcting schemes try to combat the charge drifting and enhance the error rate [1]–[3]. Alternatives such as low-density parity check (LDPC) decoding is applied with the aid of soft information to maximize the mutual information between the input and the output and enhance by that the accuracy of the read operation [4]. Rank modulation schemes address the writing asymmetry within memory where the relative charge among several cells is used to represent the information [5]. Moreover, dynamic threshold setting is employed in flash memories, where the threshold is not fixed, but rather recalculated at every read operation [6], [7]. These problems have become increasingly apparent in conventional designs due to the technology scaling [8] and integration requirements. It has mandated a shift towards emerging non- volatile memory technologies, such as memristors. However, information theoretic [9] and analytical [10] techniques are
Target cell Target cell
Sneak path
I
senseFig. 1: Sneak Path EffectSneak current phenomenon where the sense current is a combination of the target cell value with an additional sneak path current.
also applied as data distortion remains a reliability affecting parameter in the memory design.
The memristor is a two-terminal non-volatile memory device that undergoes a resistance change under an input excitation. It varies between a high conductive state RON
and high resistive state ROFF [11], [12]. The two boundary resistance values can be considered as digital high ‘1’ and low ‘0’ bits respectively [13]. Memristor-based memories are comprised of crossbar structures where the memristor lies at the intersection of two connecting nanowires [14]. Data is saved as resistance values across the memristor [15]. The most energy efficient approach to reading out from the memory is conducted through activating the corresponding word line and bit line of a particular cell while keeping the remaining lanes within the array floating. The voltage applied at the terminal of the memristor induces a current that is sensed to indicate the value of the saved data. Despite the appealing features of the crossbar, particularly concerning the activation, scaling, and density attainment, a limiting factor is faced throughout the read operation. Due to the nature of passive arrays, where no switching control is available at the terminals of the memory cell, once the reading voltage is applied, the
Zero
One
Zero One
(a) (b)
Fig. 2: Bits Distribution Illustration (a) The overlaping distributions for the high and low bits as a result of the sneak path distortion added. The inset of the figure represents the ideal read case where there is not added distortion. (b) The cell resistance seen at the read out operation. The actual cell resistance is put in parallel with the sneak path resistance affecting significantly the read out current
D
i-
+ S
iRead Operation
(Channel model)
+ Ŝ
iFig. 3: Signal Detection Model The sensed signal is com- posed of the original saved data with the sneak path current modeled as an added distortion parameter.
current is not confined to the cell of interest, but rather sneaks to the surrounding cells across the array and adds up to the actual cell data. Figure 1 shows the crossbar memory and the corresponding sneak current [15]–[18]. The sneak path phenomenon is then encountered, and the saved data within the memory will be read out with an added distortion parameter.
The accuracy of the data retrieval is then compromised with the applied reading technique. Thereby, a novel approach is proposed where the memory is dealt with as a communication channel with added distortion [19]. The saved data within the memory are the actual transmitted bits, and the data attained at the read out operation are the received bits. The sneak paths are thus the channel imposed distortion that needs to be estimated and subtracted from the received values for proper data detection.
A direct solution to the sneak path effect is by adding a selector device per cell [20]. Hence prioritizing the ac- curacy versus the density of the memory array. Alternative gateless approaches that target the sneak path problem could be split into analytical and circuit-based techniques. The former handles the array from a probabilistic perspective and imposes limitations on the distributions [9], [10], [21] and data to be saved within the array. On the other hand, the later adopts delay imposing [22], architectural [23], [24], and density compromising techniques [25]–[27] to enhance the read out operation accuracy. However, the proposed method builds on estimation principles that are well-established in
the communication field. Pilots are inserted into the array to extract the noise information and adjust the read out values accordingly [28]. The estimation principles and the readout technique are further illustrated in the following sections.
Circuit simulations for the memristor-based memory array show the efficiency of the applied technique with the improved read margins and the diminished bit error rates.
II. ESTIMATIONPRINCIPLES
The read operation conducted within the array results in a distribution of values for the high and low bit respectively.
Ideally, the two spectra would have sufficient separation to allow for accurate detection of the read bit. However, the added distortion within the array, which is primarily dependent on the sneak path effect, is modeled as a Gaussian noise added to the original signal [29]. The read values become dominated by the noise and the margins between the high and low bits almost diminish. This overlap increases the bit error rate drastically as the spectra are almost completely overlapping as shown in Figure 2a. The inset of Figure 2a represents the ideal case for the read out data where no sneak path effect is apparent. This overlap is due to the physical property of the crossbar structure and the reading techniques. Figure 2b shows the equivalent resistanceReqseen upon reading from a target cell. The sneak path is seen as a resistance in parallel with the target cell to be read and the total resistance seen at the reading terminals n1 andn2 is
Req=Rm//(R1+R2+R3)//(R4+R5+...)//...
Req=Rm//Rsp, Rsp=f(data) (1) whereRm is the actual cell value that needs to be retrieved, and Rsp is the sneak path resistance that is mainly data dependent. It is a function of the data patterns saved, as the high and low bit values, and consequently the resistances whether RON or ROFF affect the sensed current with a different weight and intensity.
During the read operation, the activated row and column of interest are the main factors affecting the sneak path. The noise is two-dimensional and shows a high correlation [29]
across these dimensions along with the target cell. The number of high bits along the vertical and horizontal dimensions is the principle contributor to the distortion undergone at the target cell read. The higher the number of high bits, the larger is the distortion imposed. The memory is then modeled as a channel with the saved data corresponding to the actual signal Si, the sneak path as the added distortion Di, and an estimated signalSˆi as depicted in Figure 3. For the distortion adjustment, having these parametersNc,j, corresponding to the number of high bits per column, andDmax,i as the maximum distortion within the row allows for the dynamic estimation of the distortion per cell Di,j. Thereby, we can formulate an equation for the distortion at target cell(i,j)as follows
Di,j=Dmax,i
Nc,j
NA
(2)
40 60 80 100 120
0 50 100 150 200 250 300
Sensed Current (µA)
Number of high bits Simulation Linear Fitting
Fig. 4: Linear Fitting Simulation of pilot cells across a complete row/column filled with ones for a 256k array. A linear function is present between the pilots and the number of ones along the corresponding dimension.
where Dmax,i corresponds to the maximum distortion that could be encountered within the row. This maximum value is seen in a cell that lies in an all-ones column. Thus, preset cells are used to extract the required information for the estimation process. The first row and column of the memory array are allocated for pilots with high bit value. For estimating the maximum distortion Dmax,i, the row pilot lying on the same row of the target cell is used. The corresponding distortion is the difference between the read out value for the pilot Pi
and the saved dataIhigh. The second parameter required for the estimation is the number of high bits per columnNc,j. For that, a hypothesized relation is formulation between the readout value of the pilot on top of each column and the number of high bits. A linear relationship is found as
Pc,j=αNc,j+β (3)
where the parameters α and β are obtained from an offline fitting performed prior to the start of the reading operation.
The fitting process remains valid for different distributions and patterns saved within the array. Thus, the offline formulation is required only once for a particular array size. Figure 4 represents the simulation results for a 256kbarray and shows the linear dependence of the readout values of the pilots and the number of high bits per column.
The estimation scheme was applied on a 512x512 array with pilots induced at the first row and column. The pilots were set to a high bit value and used for the estimation processes described earlier. Reading out 100 samples from random locations within the array shows the predominance of the distortion on the read out values. The margin between the high and low bits is completely collapsed with no clear
0 1 2
0 20 40 60 80 100
Normalized Current
Bits Readout Signal input
0 1
0 20 40 60 80 100
Normalized Current
Bits Estimated Distortion
0 1
0 20 40 60 80 100
Normalized Current
Bits Input Signal Estimated Signal
(a)
(b)
(c)
Fig. 5: Estimation Signals A Simulation for a 256kb array filled with random data of high and low bits. The primary row and column are filled with ‘1’s. A sample of 100 points was chosen from different locations across the array. a) Readout values that hold the original values compounded with the added distortion. b) Distortion parameters extracted per cell.
c) The estimated signal after removal of the distortion and its mapping to the original data. Subtracting the estimated distortion from the sensed data allows the adjusted signals to represent the actual data accurately.
separation to ensure accurate bit decoding. Figure 5a depicts the readout values along with the actual input values saved in the array. The data shown is normalized with respect to the ideal high bit. The sneak path effect is apparent making the levels of readout data almost to double that of the input data.
Nonetheless, applying the estimation scheme proposed and provides an estimate of the noise parameter per cell as shown in Figure 5b. The adjusted values after the removal of the estimated distortion are shown in Figure 5c. The adjustment allowed for the readout values to be shifted back to the range of the input values and a clear distinction between the high and low bits is possible leading to an error-free detection process.
III. PILOT-ASSISTEDREADOUTSCHEME
Pilots in communication terms are preset channel slots used to get information about the channel [19]. In a similar sense, pilots are inserted in the array at preset locations to provide an estimate of the distortion imposed by the channel throughout the read operation. We suggested this technique earlier in [29]
as a possible solution to the sneak path problem but without analyzing or providing the optimum setting for the allocation
P
1P
2P
3… … P
n-2P
n-1P
nP
21 0 0 0 1 0 1
P
30 1 0 0 0 0 1
⁞ ⁞ ⁞ ⁞ ⁞ ⁞ ⁞ ⁞
⁞ ⁞ ⁞ ⁞ ⁞ ⁞ ⁞ ⁞
P
n-20 0 0 1 0 1 1
P
n-10 1 1 0 0 0 1
P
n0 1 1 0 1 1 0
Fig. 6: Pilots in Memory An example of the allocation of pilot cells at the primary row and column of the memory array.
The actual data is saved as binary values of ‘1’ or ‘0’ at the remaining cells within the array.
of the pilot cells nor the estimation principles to be applied.
In the following subsections, the pilot-assisted read operation is further elaborated along with the simulation results for the memory array. Moreover, in [30] we introduced the notion of dummy bits to provide an adaptive threshold technique for connected terminals reading mode.
A. Read Operation
Incorporating the estimation scheme into the read operation within the array is a multi-step process. As dynamic signal adjustment is required prior to decoding the target cell value to a ‘1’ or ‘0’ respectively. To that end, a three steps process is required
1) Read the row pilotPRi and extract the row distortion.
2) Read the column pilot PCj and extract the number of high bits.
3) Read the Target cellSi,j and adjust it according to the estimated distortion.
We apply a threshold to Sˆi,j. This is equal to Si,j minus Dˆi,j, which is the estimated sneak path distortion.
Dˆi,j = (Pr,i−Ihigh)Pc,j−β αNA
(4) In comparison to the state of the art architectural techniques, the number of needed reading steps per cell is equivalent to the minimum required. However, this is valid while adopting an entirely random reading approach in the memory. However, once fetching data out of memory, entire blocks are taken at a time, and complete words or lines are read sequentially. A concept referred to as locality of reference is employed and reduces the number of required readings. As an entire row is
Fig. 7:NIST Data SetA 256kb sample snapshot of the actual memory dumps (NIST images) for the simulations performed with the pilot-assisted readout operation. Array sizes ranged from64x64up to512x512.
read in sequence, the row pilot reading is then shared with all the data cells within the same row. This continuous read eliminates the need to extract the maximum distortionDmax,i
for the every target cell along the same horizontal dimension.
However, this distortion still needs to be scaled down with the number of high bits along the vertical dimension. Thus, the column pilotsPc,j are required per target cell. Consequently, an average of two reads per cell is needed to get an estimate of the data stored. A faster read operation is thus attained with the applied scheme at a higher energy efficiency.
B. Simulation and Results
The testing and simulations were performed using a circuit- based simulator (HSPICE) to get a more realistic insight into the behavior of the system. However, in order to cater for the large memory sizes and the different patterns and data types to be saved within the array, a python script was used in order to generate the spice netlists and simulate the complete array iteratively [24]. The script offered a lot of flexibility in terms of the testing sizes, patterns, interconnections and modeling parameters, whether for the non-idealites of the circuit or the memristor characteristics. The model for the memristor used corresponds to real devices reported by HP for memory application [22], [31].
I=kon/of fsinh(αV) (5)
wherekon/of f andαstand for the ON/OFF state constants for the memristor device andV corresponds to the input voltage.
The circuit structure was completely simulated including the interconnect wires. A value of 10Ω was used as wire resis-
(a)
11
Zero One
(b)
Fig. 8: Bits Margins. Simulation for a 256kb array filled with NIST data images. The parameters for the non-linear memristor device used are:α=3V−1,kon= 10N,Kof f = 10P, Rcb=10Ω. (a) Data distributions prior to estimation show an overlap between the high and low bits(b) Split margins for the high and low bit after the estimation process. It allows for the accurate detection and distinction of the bits ’0’ and ’1’
respectively.
tance to account for the worst case scenario of the material characteristics of the crossbar.
Extensive sets of simulations were performed to test the proposed technique. As the sneak path effect is mainly data dependent, all standard test patterns were simulated, such as interleaved rows, interleaved column, checkered, random, all ones, all zeros, ....). Furthermore, these data sets were simulated over several array sizes as well, showing the effect of the array size on degrading the decoding process. The pilot scheme was able to enhance the reading process and allow for error free decoding. As a further validation step, and considering real life scenarios, actual memory dumps (NIST data images [32]) were used as the input data and the complete array was then simulated and read out from several random locations across the memory. Sizes up to 512x512
0 2 4 6 8 10 12 14
0 1 4 16 64 256 1,024
Density Loss (%)
Array Size (Kb)
Fig. 9:Array DensityThe density loss with the added pilots with respect to the array size. The loss is almost negligible (less than 1%) for practical array sizes of 256kb and higher.
array were used to validate the proposed scheme. Figure 7 shows a snapshot of 4 samples used for the simulation of a 256kbarray. The read values prior to any estimation are shown in Figure 8a. As depicted, the margins for the high and low bits are completely overlapped resulting in significant bit error rates. Alternatively, once distortion estimation is applied, the ones and zeros values are completely separated as depicted in Figure 8b. This channel equalization approach leads to error- free decoding for the read out data. An enhancement of110%
in the read margin is attained at the mere expense of two reserved lines in the memory array. A negligible density loss of less than 1% for practical sized array aids in establishing the accuracy, speed, and simple design.
Overall, a comprehensive technique is proposed that offers the flexibility of circuit-based approaches in allowing any data distribution and memory structure while originating from an analytical perspective. It doesn’t impose any restrictions on the size of the array, where restrictions up to 16kb were reported [10], nor limits the amount of information that could be saved, up to2nlognfor a square array of(n,n)as compared to alternative information theoretic approaches. Figure 9 shows the density loss attained with the allocation of the pilot cells.
As only two lines of data are reserved for the pilots, a negligible loss of less than 1% is encountered with practical array sizes.
IV. CONCLUSION
A communication-inspired approach is adopted in the read operation of emerging non-volatile memristor-based memory.
It builds upon the use of preset pilots at the primary horizontal and vertical dimensions of the array to accommodate the two-dimensional nature of the noise imposed. The a priori information aided in extracting the distortion parameters per cell and consequently alleviating the sneak path effect. A novel solution addressing the different design challenges is proposed offering enhancements on several aspects of speed, accuracy, design simplicity, and power efficiency.
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