05 Serial Sinkron SPI I2C

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Serial Sinkron

SPI & I2C Interface

Teknik Antarmuka Komputer

(TKE 4145)

Eka Maulana

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Antarmuka Serial Sinkron



I

2

C

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Outline

• _{What is SPI?}

• _{SPI Confiuration}

• _{SPI Operation}

• _{Master Slave Setup}

• _{SPI Transactions}

• _{SPI Peripheral Types}

• _{SPI and Microcontrollers}

• _ESBUS

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SPI

(Serial Peripheral

Interface)

• Developed by Motorola

•Also known as MicroWire (National

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SPI Configraaion

• Primarily used for serial

communication

between a host

processor and

with the master beini

the host

microcontroller for

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SPI Operation

• _{For SPI, there are Serial Clocks (SCLK), Chip}

Select lines (CS), Serial Data In (SDI) and Serial

Data Out( SDO)

• There is only one master, there number of

slaves depends on the number of chip select

lines of the master.

• _{Synchronous operation, latch on risini or fallini}

edie of clock, SDI on risini edie, SDO on fallini

edie

• _{Operates in 1 to 2 MHz ranie}

• Master sends out clocks and chip selects.

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Master Slave Setup

• _{In this setup, there are 3 slave devices. The}

SDO lines are tied toiether to the SDI line of the

master.

• The master determines which chip it is talkini

to by the CS lines. For the slaves that are not

beini talked to, the data output ioes to a Hi Z

state

• _{Multiple Independent}

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Master Slave Setup

Multiple slave cascaded

• _{In this example, each slave is cascaded so}

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SPI Peripheral Types

• Converters (ADC, DAC)

• _{Memories (EEPROM, RAM’s,Flash)}

• _{Sensors (Temperature, Humidity,}

Pressure)

• _{Real Time Clocks}

• _{Misc- Potentiometers, LCD controllers,}

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Peripherals

• Vendors that make these peripherals :

• _{Atmel –EEPROM, Dii. POT’s}

• _{Infneon- Pressure Sensors, Humidity}

Sensors

• _{Maxim- ADC, DAC, UART,}

• _{TI- DSP’s, ADC, DAC}

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SPI and Microcontrollers

• Motorola 68HC12 Has SPI built in

hardware. Easy to inteirate. See EE583

• Intel 8051 Dependini on Models, Most

Cyinal products have I

2

C and some have

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PIM_9C32

Block Diagram

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68HCS12 SPI0 Si g n al s

Pin SPI0 signal Name PM2 MISO Master-In-Slave-Out PM3 MOSI Master-Out-Slave-In PM4 SCK Serial Clock

MOSI MISO MISO MOSI

SCK

SS _SS

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Initializini SPI2

 Pin 12 of PORTD is connected to the memory chip select (CS): #defne CSEE _RD12 // select line for Serial EEPROM

#defne TCSEE _TRISD12 // tris control for CSEE pin

 Peripheral initialization: // 1. init the SPI peripheral

TCSEE = 0; // make SSEE pin output

CSEE = 1; // de-select the Serial EEPROM SPI2CON1 = SPI_MASTER; // select mode

SPI2STAT = SPI_ENABLE; // enable the peripheral

 Where:

#defne SPI_MASTER 0x0120 // 8-bit master mode, CKE=1, CKP =0 #defne SPI_ENABLE 0x8000 // enable SPI port, clear status

 A small function that will be used to transfer data to and from the serial EEPROM device: // send one byte of data and receive one back at the same time

int WriteSPI2( int data) {

SPI2BUF = data; // write to bufer for TX

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The 25LC256 Serial

EEPROM

// 25LC256 Serial EEPROM commands

#defne SEE_WRSR 1 // write status reiister

#defne SEE_WRITE 2 // write command

#defne SEE_READ 3 // read command

#defne SEE_WDI 4 // write disable

#defne SEE_STAT 5 // read status reiister

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25LC256 Status Reiister

// 2. Check the Serial EEPROM status

CSEE = 0; // select the Serial EEPROM writeSPI2( SEE_STAT); // send a READ STATUS COMMAND i = writeSPI2( 0); // send/receive

CSEE = 1; // deselect, terminate command

// 2.1 send a Write Enable command

CSEE = 0; // select the Serial EEPROM WriteSPI2( SEE_WEN); // write enable command

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Writini to the EEPROM

// send a Write command

CSEE = 0; // select the Serial EEPROM

// wait until any work in progress is completed

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Readini from the EEPROM

// perform a read sequence

CSEE = 0; // select the Serial EEPROM WriteSPI2( SEE_READ); // read command

WriteSPI2( addr_MSB); // address MSB first

WriteSPI2( addr_LSB); // address LSB (word aligned) data = WriteSPI2( 0); // send dummy, read msb

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I2C Interface Examples

A few examples of devices usini the I2_{C interface :}

 1Mbit Serial EEPROMS: 24xx1025

 18-bit delta siima ADCs: MCP3421

 16-bit delta siima ADCs: MCP3425

 12-bit SAR ADCs:MCP3221

 12-bit D/A: MCP4725

 Inteirated Temperature Sensor (+/-0.5C): MCP9803

 I/O Expander 8/16-bit: MCP23016/MCP2308

Consider additionally:

 Battery iauies

 Audio codecs

 GPS receivers

 LCD displays controllers

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I2C Data Transfer Rules

Two simple rules dictate how to operate from here:



When the SCL line is low, and only at this time, the SDA line can change.



_{When the SCL line is high, the SDA line status indicates the value of a bit.}

Two exceptions to rule 1 create special conditions that are used to delimit the

beginning and end of each

transaction

between two devices on the bus. When

SCL is high:

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The 24LC00 Serial EEPROM

I

2

C has been for years the favorite choice for serial EEPROM users

and manufacturers for two reasons:



Only two pins (I/Os) are required to communicate with the

device, enablini the embedded control desiiner to use very low

pin count (inexpensive) microcontrollers.



Just four pads (areas of contacts on the chip) are required for a

Serial EEPROM device. Two provide the power supply and the

remainini two are the I

2

C lines. This reduces the silicon area

overhead due to the contacts on a typically very small device --

hence the hiih impact/cost of the pads.

In practice most I

2

C serial EEPROMs have at least a ffth

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The SEE Grammar

Usini the followini simple notation:

 S = START sequence

 P = STOP sequence

 A/N = Acknowledie bit

 0xXX= data byte (hex notation)

 0bXXXXXXXX =data byte (in binary notation)

 and usini brackets () to indicate parts of the conversation produced by a slave we can represent a typical I2_{C protocol messaie in a compact notation}

Here is an example of a read command sequence for a 24LC00 (128 bit) SEE:

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A Write Example

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Initializini the I2C module

void InitSEE( long fcy)

// fcy = processor operating frequency in Hz (system clock) { // Configure I2C for 7 bit address mode 100kHz

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Sendini the Address

int addressSEE( long add)

// send the address selection command // repeat if SEE busy

{

int cmd;

// 1. Form SEE command + address msb (3) cmd= 0xA0|((add>>7)&0xE);

// 2. WRITE(!) the Address msb MasterWriteI2C1( add); IdleI2C1();

// 4. exit returning the cmd byte return cmd;

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Writini a 16-bit value

void iWriteSEE( long add, int v) // SEE write command sequence { MasterWriteI2C1( v&0xFF); IdleI2C1();

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Readini a 16-bit value

int iReadSEE( long add)

// random access read command sequence {

MasterWriteI2C1( cmd+READ_CMD);

IdleI2C1();

// 3. stream data in (will continue until NACK is sent) r= MasterReadI2C1( );

AckI2C1(); IdleI2C1();

r|= (MasterReadI2C1()<<8);

// 4. terminate read sequence (send NACK then STOP)

NotAckI2C1(); IdleI2C1(); StopI2C1(); IdleI2C1();

return r;

} // iReadSEE

S 0b01010000 (A)

ByteAddress

(A) P

S 0b0101000

1 (A) (DataLSB)

[A]

(Data MSB) NP

Address Selection

Data Read

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Notes for the PIC MCU

Experts

In addition to the SPI options available on most PIC microcontroller (ofered by the SSP and MSSP modules), such as:

_{Selectable clock polarity} Selectable clock edie

_{Master or Slave mode operation}

The PIC24 SPI interface module adds several new capabilities, includini:

_{A 16-bit transfer mode}

Data input samplini phase selection

_{Framed transmission mode}

Frame synch pulse control (polarity and edie selectable)

_{Enhanced Mode (8 deep transmit and receive FIFOs)}

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Tips and Tricks

Safety measures suiiested to reduce the risk of SEE data

corruption:



Ensure adequate power supply decouplini (a capacitor) is

provided close to the memory device.



A pull up resistor (10k Ohm) is provided on the Chip Select

line, to avoid foatini durini the microcontroller power up

and reset.



An additional pull down resistor (10k Ohm) can be provided

on the SCK clock line to avoid clockini of the peripheral

durini boundary scan and other board testini procedures.



_{Verify clean and fast power-up and down slope are provided}

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Tips and Tricks

A number of software methods can be employed to prevent a proiram bui miiht triiier the write routine:

Avoid readini and especially updatini the NVM content riiht after power up. Allow a few milliseconds for the power supply to stabilize (application

dependent).

Add a software write-enable fai, and demand that the callini application set the fai before callini the write routine, possibly after verifyini some

essential application specifc entry condition.

Add a stack level counter; each function in the stack of calls implemented by the library should increments the counter upon entry and decrement it on exit. The write routine should refuse to perform if the counter is not at the expected level.

Some refuse to use the NVM memory locations correspondini to the frst address (0x0000) and/or the last address (0xff) believini they could be more likely to be the subject to corruption.