Chapter IV: CoPc microstructures based OFETs with higher carrier mobility…
4.3 Results and Discussions
4.3.1 CoPc Microstructure Growth on Various Substrates
In this section, we summarize the FESEM results of CoPc wire like microstructures grown on different substrates. For the fabrication of OFETs based on the CoPc wires as active channel, we need to improve the length of the wires as long as possible such that a better connection between source and drain through the wires can be made. In order to achieve this, we have tested with several substrates and different growth temperatures to optimize the growth of CoPc 1D structure formation.
CoPc Growth on Glass Substrate: Figure 4.2 shows the FESEM images of thin strip like microstructures grown on ordinary glass substrates with different substrate temperatures, such as 130 °C, 200 °C and 270 °C respectively. In all the cases, growth time was fixed to 10 min with argon gas flow rate of 100 sccm. We have observed the formation of CoPc thin 1D strips with average size is about 1 µm at 130 °C growth temperature. As the growth temperature increases, strips grow to form CoPc 2D sheets together with long and thick strips as shown in Figure 4.2 (b &c). However, the maximum length of these sheet observed is about 3 μm at 270 °C growth temperature.
Figure 4.2: FESEM images of CoPc microstructures on glass substrates grown at substrate temperatures (a) 130 °C, (b) 200 °C and (c) 270 °C.
68 Chapter IV
CoPc Growth on Mica Substrate: In the process of finding appropriate 1D structures of CoPc for OFETs fabrication, we have used muscovite mica (KAl2(AlSi3)O10(OH)2) as another substrate of choice, since the freshly cleaved mica form atomically cleaned mica (001) surfaces. In such case, the diffusion of the molecules will be influenced by the surface structures of the mica (001), which is essentially pseudo hexagonal 2D surface lattice [39].
Though, mica (001) surface has three fold symmetry, no structure formation is observed which follow the symmetry of the underlying mica surfaces. Moreover, we have observed the formation of unidirectional CoPc long strips, which are attached with the substrates as shown in Figure 4.3. As the growth temperature increases, the length of the strips are also increased unidirectional (Figure 4.3 (a-c)). This clearly confirms that the formation of these microstructures has less dependency on the surface structures. However, mica surfaces found to influence the growth of the CoPc to form very long strips. Since, the strips grow onto the surface and are attached with the substrates; it would be difficult to transfer the strips from mica substrates to the active channel of the devices.
Figure 4.3: FESEM images of CoPc microstructures on mica substrate grown at various substrate temperatures (a) 130 °C, (b) 200 °C and (c) 270 °C.
CoPc Growth on Metallic Surfaces: In order to explore the effect of metal surface on the growth of CoPc microstructures, we have used metal films as the surface of interest. We have grown about 100 – 120 nm thick Ag, Al and Au films on glass substrates and were used for the growth of CoPc films. Representative FESEM images of the CoPc films grown at 130 °C, 200 °C and 270 °C substrate temperature are shown in Figure 4.4. The growth time for all the samples was kept 10 min. Figure 4.4 (a – c) show the morphology of CoPc films grown on Al/glass surfaces. Formation of micron size strips was observed. As the growth temperature increased, the size of the strips increase and are tending to form flat 2D CoPc strips as observed in case of glass substrates. However, the size of the strips is much smaller than the
CoPc microstructures based OFETs with higher carrier mobility 69
2D strips observed in case of glass. In case of Ag/glass surfaces, we observed needle like structures formation. Sub-micron size crystal formation is observed as the growth temperature increased to 270 °C as shown in Figure 4.4 (d – f). In case of Au/glass surfaces, CoPc islands formation is observed on a wetting layer. As the growth temperature increases, the islands increase their sizes (see Figure 4.2(c)).
Figure 4.4: Representative FESEM images of CoPc microstructures on (a-c) Ag/Glass, (d-f) Al/Glass and (g-i) Au/Glass surfaces at different substrate temperatures 130 °C, 200 °C and 270 °C respectively.
Metal nanoparticles are reported to show highly catalytic properties and Au nanoparticles were exhaustively used to initiate organic wires growth [40-46]. We have also tested with Au nanoparticle to initiate CoPc wire formation. Au nanoparticles were grown in glass substrates using thermal evaporation followed by rapid thermal annealing. Typical FESEM image is shown in Figure 4.5(a). The formation of CoPc nanowires is observed as shown in Figure 4.6(b–c). However, the average size of the wires is about 300 nm. None of these microstructures grown on metal surfaces are suitable for the fabrication of CoPc wire based
70 Chapter IV
OFETs. Since in our methodology, we require to transfer the wires to channel. These wires are relatively smaller in size.
Figure 4.5: (a) FESEM image of Au nano-particle template, (b) Nanowires growth on template and its zoomed image (c).
Micron wire Growth on SiO2 Substrate:
Figure 4.6: FESEM images of micron wires grown on SiO2 substrate with different synthesis time 10 min (a-c) and 20 min (d-f) at various substrate temperatures 130 °C, 200 °C and 270°C.
CoPc microstructures based OFETs with higher carrier mobility 71
In addition to glass and metal surfaces, we have used SiO2 surfaces for the growth of CoPc microstructures. The substrate temperatures were varied to 130, 200 and 270 °C during the growth and CoPc molecules were grown for 10 min and 20 min. FESEM images of CoPc microstructures grown on SiO2 surfaces are shown in Figure 4.6. We have observed the formation of nanostrips and nanowires at 130 °C substrate temperature for 10 min deposition time as shown in Figure 4.6(a). As the substrate temperature increases to 200 °C and 270 °C, we observed the formation of big crystals, microstripes and microwires, which are shown in the Figure 4.6(b) & (c). The typical length of the microstrips at 20 min growth time are about
~100 µm which are not clearly visible in the FESEM images shown in Figure 4.6(f) as only a section of the strips are exposed to the surface. These microstrips were removed from the substrates into ethanol solution and then transferred on the active channel of OFETs fabricated on glass substrates. Figure 4.7(a) shows the optical micrograph of the CoPc strips as active channel of the devices. The source and drain contacts are clearly visible. The dimension of active channel is about 50 µm. The average length of the micro strips is confirmed by optical micrograph as shown in Figure 4.7(b).
Figure 4.7: (a) Optical micrograph of CoPc wire based transistor with representation of source – drain electrodes and channel; (b) Magnified image CoPc wires in the channel.
II. FT-IR Results:
CoPc molecules were thermally evaporated in 400°C to grow the microstrips which were used for the fabrication of OFETs. In order to confirm that there was no decomposition of the molecules, we have analyzed the strips using FT-IR and compared the results with the source materials. Figure 4.8 shows the FT-IR results taken from the micro strips and the powder
72 Chapter IV
CoPc molecules. The five characteristic IR bands observed in case of CoPc at 731, 782, 877, 915, and 1290 cm-1 are similar in both the cases, indicating that CoPc molecules do not undergo any decomposition or other chemical reactions during the growth process.
Figure 4.8: FTIR spectrogram of plain CoPc wires and its source powder with representing of significant peak positions.
III. UV-Vis. Results:
In order to study the optical response of the CoPc microstrips, we have performed UV- Vis. absorption study on the strips. The absorption spectra are given in the Figure 4.9. The tensile stress produced due to the constraint imposed by the substrate temperature, may affect the electronic structure and thereby result in new absorption spectra. The optical band gap for the as-deposited nanostrips with 20 min growth time was found to increase with substrate temperature. Anderson et al. have reported that the central metal atom of the phthalocyanines influences the optical absorption spectrum. Yamashita et al. [47] have observed that the Q- band absorption of CoPc shifts towards longer wavelengths when deposition temperatures are increased. It is the significance of α-phase and for CoPc nanowires, this phase shows two absorption maxima at the Q-band with wavelengths of 625 nm and 705 nm. The two maxima peaks are separated by 82 nm as shown in Figure 4.9. As the substrate temperature increased
to 27 temp witho activi α to β incre forma
Figur temp
IV.
T meas its m tetrag comp
C 70 ºC, the erature from out any shif
ity [48], and β-phase by asing substr ation of larg
re 4.9: Abs eratures 130
XRD & T To reveal t
urements w microwires de
gonal α-pha paring both t
CoPc micro higher ener m 130 ºC to
ft, but the p d is in good heat-treatme rate tempera ge-size micro
sorption spec 0 °C, 200 °C
TEM Result the crystal
ere perform eposited on ase CoPc st
the XRD pa
ostructure rgy peak w o 270 ºC, th
eak at 625 agreement w ent at a tem ature, the B-b owires at hig
ctra for Cob and 270 °C
ts:
structure ed. Figure 4
SiO2 substr tructure, wh atterns, it is
es based OF was shifted he observed
nm has shif with the earl mperature of band is sligh gher growth t
balt phthaloc with its ban
of CoPc m 4.10 shows t
rate. All of hich agree w
clear that ex
FETs with slightly. Fo peaks locat fted. This re lier observat
approximate htly red-shif temperature
cyanine mic nd positions.
microstructu the XRD pa
the diffracti well with t xistence of
higher car or the incre
ed at 705 n esult is due tions of spec ely about 30 fted. This is
.
crowires at v
ures, the X attern of pow ion peaks ca the literatur
a single inte
rrier mobi ease in sub nm remains
to phase ch ctral change 00 °C [49].
attributed t
various subs
XRD and wdered CoPc
an be indexe res [50, 51]
ense peak cl
ility 73 strate
there hange from With to the
strate
TEM c and ed as ]. By learly
74 Chapter IV
represents the highly order molecular arrangement within the wires. The diffraction peaks were indexed with tetragonal α-phase of CoPc structure. It is apparent from the analysis that out-of-plane orientation of the wires grown on the substrate is along [100] crystallographic direction. Our results agree well with the existing literatures describing preferential growth direction of these molecules in thin films [50, 52]. The first order peak corresponds to an inter planer spacing of 1.23 nm. Corresponding second and third order diffractions peaks are also observed as shown in the inset of Figure 4.10. This clearly revealed the single crystal nature of the wires.
Figure 4.10: X-ray diffraction pattern of powdered CoPc and its microwires deposited on SiO2 substrate.
CoPc microstructures based OFETs with higher carrier mobility 75
It was shown also that the powder consists entirely of the polymorph, and with the appearance of additional peaks probably indicates the existence of a small proportion of different polymorph or impurities. The sharp diffraction peaks and the flat baseline of XRD curve indicate a perfect crystalline feature.
TEM planar view of a single wire is shown Figure 4.11(b). The crystalline nature of the wires was further confirmed by high-resolution transmission electron microscopy (HRTEM) as shown in Figure 4.11(c). The molecular planes within the wires are seen in HRTEM result.
The inter-planer spacing measured form HRTEM images are about 1.22 nm, which confirm the spacing observed from XRD measurement.
Figure 4.11: (a) SAED pattern of single CoPc wire, (b) TEM planar view of a single wire and (c) HRTEM image of single wire.
4.3.2 CoPc Micron-wires based OFET Fabrication
Efficient field-effect mechanism for OFETs can enhance the performance of the devices significantly by controlling the charge flow through the channel. We have optimized the device structure that ensures a better capacitive coupling between the gate and the channel through dielectric layer to enhance field-effect carrier mobility.
I. Optimization of Dielectric Layer Thickness
In our devices, we have used the dielectric layer as combination of Al2O3 and PVA. The total capacitance measured in Au/PVA-Al2O3/Al system largely depends on the capacitance arises from the geometric capacitance Cb due to dielectric layer in series with an effective interfacial capacitance Ci [30, 31]. The interfacial capacitance is associated with the interface states at the metal-insulator interfaces. The capacitance Cb can be written as Cb =kε0A d/ ,
76 Chapter IV
where k is dielectric constant and ε0 is the permittivity of free space. A is the capacitive area and d is the effective thickness of the dielectric layer. Here Cb arises due to combined layer of Al2O3 and PVA. We have assumed a single capacitance due to their comparable dielectric constant. The measured capacitance (Cm) is considered as a series combination of Cb and Ci. As a result, one can write the measure capacitance with simple relation [30].
0
1 1 1 1
m b i i
d
C = C + C = k ε A + C
--- (4.1) which can show a linear dependence of inverse capacitance with d with a non-zero intercept at d = 0. This dependency is verified and plotted in Figure 4.12(a). All the values of capacitance for different d were calculated for unit area. The value of k calculated from slope of linear fit, as shown in Figure 4.12(a), is 8.6 which is within the range of reported dielectric constant of Al2O3 and PVA materials. This value thus indicates good quality dielectric film obtained using organic-inorganic materials combination. From the zero thickness interception at inverse capacitance provides the value of Ci = 45 nF/cm2. The cross over thickness at which Cb = Ci occurs is dl = 40 nm. This provides the lower limit of the thickness of the dielectric layer that can be used for the devices for better capacitive coupling with the channel. At any thickness smaller than dl, the interface contribution dominates capacitive part of the dielectric materials. Therefore, thickness of the dielectric layer should be any thickness greater than dl. However, the capacitance is inversely proportional to the thickness of the dielectric layer. As a result, any higher d also minimizes the capacitance. In order to find out the optimized thickness of the dielectric materials for our devices, we measured the leakage current through the capacitance. Figure 4.12(b) shows the plot for leakage current, J vs d, which clearly shows that the leakage current significantly decreases with the thickness of the dielectric film and reached to the value of about ~10-8 A/cm2 at the thickness 75 nm. The leakage current is measured at the maximum gate operating voltage (-20 V) of the OFETs.Here, we have essentially varied the thickness of PVA layer on top of a 30 nm anodized Al2O3 film. We have selected final thickness of the dielectric layer as 75 nm for the fabrication of OFETs. This thickness includes 45 nm of PVA layer. 30 nm thickness of Al2O3
layer was chosen in order to keep the thickness of the PVA layer minimum. It is to be noted
CoPc microstructures based OFETs with higher carrier mobility 77
that without Al2O3 layer, the required thickness of PVA is about 1µm to achieve 10-8 A/cm2 leakage current.
Figure 4.12: Representative plots of (a) Variation of capacitance with thickness and (b) Leakage current variation with thickness of hybrid dielectric.
II. Transistor Parameter Extraction
In order to fabricate OFETs, the CoPc wires grown on silicon substrates were transfer into ethanol solution in which the wires are not soluble. The CoPc wires suspended solution was then dropped onto the PVA dielectric surfaces. Once the ethanol was evaporated, the wires were deposited onto the dielectric surfaces. Gold (Au) electrodes were deposited by thermal evaporation with shadow–mask of 50 µm channel length and 1mm channel width.
Figure 4.13(a) shows the typical design of OFET. Figure 4.13(b) shows an optical micrograph of the device top showing the source-drain contacts and the deposited CoPc wire mesh on the channel. The output and transfer characteristics curves for the multi-wires OFETs were collected in air using Keithley-4200 SCS parameter analyzer. The transfer characteristics in ambient exhibit a threshold voltage -7.8 V as shown in Figure 4.13(c-d).
The on/off ratio obtained from the devices is ~104. The maximum obtained carrier mobility (µFE) is 1.65 cm2/Vs and the average charge carrier mobility is 1.11 ± 0.20 cm2/Vs based on more than 20 test devices. While calculating the mobility, we assumed that the channel width is completely covered by CoPc wires as shown in Figure 4.13(b). However, effective width
78 Chapter IV
of the channel could be less than the actual channel width that we assumed in our calculations. Therefore, the actual mobility from these devices is expected to be more than the quoted value. It is to be noted that Yang et al observed the mobility 2.6×10-4 cm2/Vs for 50 ML thick CoPc thin film based OFETs [53].
Figure 4.13: (a) Typical design of an OFET, (b) optical micrograph of showing the channel containing CoPc wires. Bright parts are source and drain connection, (c) output characteristics and (d) transfer curve and plots of IDS1/2 vs VGS for CoPc wire based OFETs.
Zhang et al. demonstrated enhanced charge carrier mobility for thin film based transistors made of sandwiched CoPc and copper phthalocynine (CuPc) layers to 0.11 cm2/Vs. In both the cases, the used dielectric materials were inorganic materials. The enhanced mobility observed in our OFETs is due to single crystal wires, which are essentially free form grain boundaries. However, we have used large number of interconnected CoPc wire-mesh within the channel. As a result, junctions between wires may be considered as defect boundaries, which may reduce the mobility. Single wire OFETs could eliminate this effect. The enhanced mobility observed is largely contributed by field-effect mobility in our case. This comes essentially from the major fraction of wires, which have better capacitive coupling with gate
CoPc microstructures based OFETs with higher carrier mobility 79
and are directly in contact with the PVA surfaces. Highly smooth PVA surfaces results a better contact of the wires with the dielectric. Field-effect mobility was further improved by the appropriate selection of the dielectric materials and the thickness at which the leakage current is significantly low.
4.4 Summary & Conclusions
In this chapter we have investigated the 1D growth of CoPc microstructures. Studies on morphology of CoPc microstructures influenced by different surfaces like glass, mica, Ag/glass, Al/glass, Au/glass, Au nano-particle template and SiO2 were done. With the optimized parameters like flow rate of carrier gas, substrate temperature, substrate type and deposition time, we were able to grow long 1D microwires. To ensure the crystalline quality and wires purity, the experiments were performed by means of XRD, TEM, FTIR and UV- Vis. Selective wires with high crystallinity were used in OFET fabrication. We have observed significant enhancement of field-effect carrier mobility of CoPc wire based OFETs.
The enhanced mobility achieved by the combination of organic and inorganic materials as gate dielectric. At the same time, the proper selection of the thickness of the dielectric layers improves the capacitive coupling between channel and gate. In this case, the capacitance due to dielectric layer was dominated the contributions from interface capacitance. In order to identify the best process condition of OFET design, we varied the thickness of the dielectric layers combining with leakage current measurements and determined the thickness of the layer for better performance.
4.5 References
[1] M. Lloyd, Enhancing existing products with new technologies, Medical Dev. Tech., 18 (2007) 34-35.
[2] T.J. Shin, H. Yang, M.M. Ling, J. Locklin, L. Yang, B. Lee, M.E. Roberts, A.B. Mallik, Z. Bao, Tunable thin-film crystalline structures and field-effect mobility of oligofluorene- thiophene derivatives, Chem. Mater., 19 (2007) 5882-5889.