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Performance and Analysis with Power Quality improvement with Cascaded Multi-Level Inverter Fed BLDC Motor Drive

1N. Raveendra, ²V.Madhu Sudhan

1Dept. of Electrical & Electronics Engineering, Malla Reddy Engineering College for Women ,Hyderabad, TS, India.

2Dept. of Electrical & Electronics Engineering, KSRM COLLEGE OF ENGINEERING, KADAPA(Dt); AP, India.

Abstract- The multilevel inverters has become popular in recent years for high-power applications. Various topologies and modulation strategies have been investigated for utility and drive applications in the literature. The THD contents in output voltage of inverters is very significant index as the performance of drive depends very much on the quality of voltage applied to drive. The THD depends on the switching angles for different units of multilevel inverters. In this paper multilevel converter fed BLDC drive with different voltage levels are considered and simulation results are presented in terms of total harmonic distortion (THD) and dv/dt stress. The simulations have been carried out in MATLAB and Simulink.

Keywords- BLDC Drive, Cascaded H-bridge (CHB), Multilevel Inverter, LSPWM, PSPWM Modulation Scheme, THD.

I. INTRODUCTION

Brushless DC motors with trapezoidal Back-EMF have several inherent advantages. Most prominent among them are high efficiency and high power density due to the absence of field winding, in addition the absence of brushes leads to high reliability, low maintenance and high capability. However in a practical BLDC drive, significant torque pulsations may arise due to the back emf waveform departing from the ideal. As well as commutation torque ripple, pulse width modulation (PWM) switching. Torque ripple due to the current commutation is caused by the mismatches between the applied electromotive force and the phase currents with the motor electrical dynamics. It is one of the main drawbacks of BLDC drives. These torque ripples produces noise and degrade speed-control characteristics especially at low speed. Due the power electronic commutation, the usage of high frequency switching of power devices, Imperfections in the stator and the associated control system. The input supply voltage to the motor contains various harmonics components. During its operation, high frequency component present in the input voltage will cause Electromagnetic Interference (EMI) problem.

Fig. 1 BLDC Motor with Cascaded H-bridge MLI Nowadays researchers are trying to reduce the torque ripple and harmonic component in the BLDC motor.

An active topology to reduce the torque ripple is synchronous motor presented in [1]. This paper discusses the hysteresis voltage control method. The torque ripple is minimized using PWM switching is presented in paper [2], this scheme has been implemented using a PIC microcontroller to generate modified pulse width modulation (PWM) signals for driving power inverter bridge. In paper [3] the current controller method is used for reducing the torque ripple and harmonics. This method is based upon the generation of the quasi-square wave armature current.

To reduce torque ripple the indirect position detection is used in [4], it is based on the detection of the zero crossing points of the line voltage measured at the terminal of the motor. The proposed MLI fed BLDC drive is shows in Fig.1 to minimize the total harmonic distortion (THD) and dv/dt stress by using the cascaded H-bridge MLI proposed in this paper.

The various topologies are used for the multilevel inverters. Among this the most commonly used topologies are neutral-point-clamped (NPC), flying capacitors (capacitor clamped), and cascaded H-bridge (CHB) with separate dc sources. In addition, several modulation and control strategies have been developed or adopted for multilevel inverters including the following: multilevel sinusoidal pulse width modulation (SPWM).

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II. ABOUT CASCADED H-BRIDGE MLI TOPOLOGY

A three-phase structure of an m-level cascaded inverter is illustrated in Fig.2. Each separate dc source (SDCS) is connected to a single-phase full-bridge, or H-bridge, inverter. Each inverter level can generate three different voltage outputs, +Vdc, 0, and –Vdc by connecting the dc source to the ac output by different combinations of the four switches, S1, S2, S3, and S4.

To obtain +Vdc, switches S1 and S4 are turned on, whereas –Vdc can be obtained by turning on switches S2 and S3. By turning on S1 and S2 or S3 and S4, the output voltage is 0. The ac outputs of each of the different full-bridge inverter levels are connected in series such that the synthesized voltage waveform is the sum of the inverter outputs. The number of output phase voltage levels m in a cascade inverter is defined by m = 2s+1, where s is the number of separate dc sources. An example phase voltage waveform for an 11-level cascaded H-bridge inverter with 5 SDCSs and 5 full bridges is shown in Figure 3. The phase voltage van = va1 + va2 + va3+ va4 + va5.

For a stepped waveform such as the one depicted in Figure 3 with s steps, the Fourier Transform for this waveform follows:

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Fig.2. Three-phase structure of a multilevel cascaded H-bridges inverter

Fig.3. Output phase voltage waveform of an 11-level cascade inverter with 5 separate dc sources.

From (1), the magnitudes of the Fourier coefficients when normalized with respect to Vdc are as follows:

(2) The conducting angles, θ1, θ2, ..., θs, can be chosen such that the voltage total harmonic distortion is a minimum. Generally, these angles are chosen so that predominant lower frequency harmonics, 5th, 7th, 11th, and 13th, harmonics are eliminated.

III. BLDC MODEL

The BLDC motor is an AC synchronous motor with permanent magnets on the rotor (moving part) and windings on the stator (fix part). Permanent magnets create the rotor flux. The energized stator windings create electromagnet poles. The rotor (equivalent to a bar magnet) is attracted by the energized stator phase, generating a rotation. By using the appropriate sequence to supply the stator phases, a rotating field on the stator is created and maintained. This action of the rotor - chasing after the electromagnet poles on the stator - is the fundamental action used in synchronous permanent magnet motors. The lead between the rotor and the rotating field must be controlled to produce torque. This synchronization implies knowledge of the rotor position.

Fig.4: A 3-Phase Synchronous Motor with a Single Permanent Magnet Pair Pole Rotor

On the stator side, three phase motors are the most common. These offer a good compromise between precise control and the number of power electronic devices required to control the stator currents. For the rotor, a greater number of poles usually create a greater torque for the same level of current. On the other hand, by adding more magnets, a point is reached where, because of the space needed between magnets [10]

[12], the torque no longer increases. The manufacturing cost also increases with the number of poles. As a consequence, the number of poles is a compromise between cost, torque and volume.

The BLDC Motor Control:

The key to effective torque and speed control of a BLDC motor is based on relatively simple torque and

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Back EMF equations, which are similar to those of the DC motor. The Back EMF magnitude can be written as:

(3) And the torque term as

(4) Where N is the number of winding turns per phase, l is the length of the rotor, r is the internal radius of the rotor, B is the rotor magnet flux density, ω is the motor’s angular velocity, i is the phase current, L is the phase inductance, θ is the rotor position, R is the phase resistance.

IV.

SEVERAL MODULATION SCHEMES

Many PWM techniques were developed to control the power inverter gain, and tried to improve the inverter operation, based on minimum harmonic contents in the output voltage. They are quite popular in industrial applications. In that PSPWM and LSPWM methods are merely preferred by many industrial applications.

A. Phase Shifted Pulse Width Modulation Scheme (PSPWM)

Phase shifted PWM (PS-PWM) is used with cascaded H-bridge (CHB) and flying capacitor (FC) inverters, since each cell is modulated independently using sinusoidal unipolar PWM and bipolar PWM, respectively, providing an even power distribution among the cells. A carrier phase shift of 180⁰/m for the CHB and of 360⁰/m for the FC is introduced across the cells to generate the stepped multilevel output waveform with lower distortion (where m is the number of cells). The difference between the phase shifts and the type of PWM (unipolar or bipolar) is because one CHB cell generates 3-level outputs, while one FC cell generates two level outputs and also used for many levels as shown in Fig.5.

Fig.5 PSPWM Scheme

B. Level Shifted PWM Scheme (LSPWM) Level shifted PWM (LS-PWM) is used for controlling voltage of a diode clamped multilevel inverter. The control principle of the level shifted SPWM is to use several triangular carrier signals keeping only one modulating sinusoidal signal. For a three level inverter two carriers and for a five level inverter, four triangular carriers are needed. In general if an m-level inverter is employed, (m-1) carriers are needed. The carriers have

the same frequency f_c and the same peak-to-peak amplitude A_C. The zero reference is placed in the middle of the carrier set. The modulating signal is a sinusoid of frequency f_m and amplitude A_m. At every instant, each carrier is compared with the modulating signal. Each comparison switches the switch "on" if the modulating signal is greater than the triangular carrier assigned to that switch.

Fig.6 LSPWM Scheme

V. MATLAB MODELING AND SIMULATION RESULTS

Here simulation is carried out in different cases, in that 1). Cascaded H-bridge five level Inverter Fed BLDC Motor Employing Phase shifted carrier PWM technique

2). Cascaded nine level H-bridge Multi level Inverter Fed BLDC Motor Employing phase shifted carrier PWM technique.

Case 1: Cascaded H-bridge Multi level Inverter Fed BLDC Motor Employing Phase shifted carrier PWM technique

Fig 7: Matlab/Simulink Circuit of the Phase Shifted MLI fed BLDC motor

Fig.7 shows the Matlab/simulink diagram of BLDC Motor which is fed from the Cascaded H-bridge Multi level Inverter Using phase shifted carrier PWM techniques.

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Fig.8 Phase Voltages of Phase Shifted Multi Level Inverter

The Fig.8 shows the three phase voltages of the MLI, which are displaced by 120 degrees apart.

Fig 9: Back Emf’s of the BLDC Motor

Fig.10. 3-Phase Stator Current’s of BLDC Motor (5- level)

Fig 11 Speed of the BLDC Motor

Fig.12 Electromagnetic Torque of the BLDC Motor Fig. 10, 11 and 12 represents the Back emf, speed and Electromagnetic torque of the BLDC motor respectively operated under Phase Shifted Modulation Scheme.

Fig 13 THD of the Phase Shifted MLI output Voltage Fig.13 shows the THD of the Cascaded H-bridge Multilevel Inverter Employing Phase shifted carrier PWM technique, attain 21.72% as a distorted value.

Case2: Cascaded nine-level H-bridge Multi level Inverter Fed BLDC Motor Employing phase shifted carrier PWM technique.

Fig 14: Matlab/Simulink Circuit of the nine level Phase Shifted MLI fed BLDC motor

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Fig 15: Phase Voltages of Phase Shifted Multi Level Inverter

Fig 16: Back Emf’s of the BLDC Motor

Fig.17. 3-Phase Stator Current’s of BLDC Motor (9- level)

Fig 18 Speed of the BLDC Motor

Fig 19 Electromagnetic Torque of the BLDC Motor Fig.16, 18, 19 represents the Back emf, speed and Electromagnetic torque of the BLDC motor respectively operated under Phase Shifted Modulation Scheme.

Fig 20: THD of the Various Level Shifted MLI output Voltage

Fig.20 THD of the Cascaded H-bridge Multilevel Inverter Employing Phase shifted carrier PWM technique attain 12.03%.

VI. CONCLUSIONS

The multilevel converters achieve high-voltage switching by means of a series of voltage steps, each of which lies within the ratings of the individual power devices. In this paper, a new inverter topology has been proposed which has superior features over conventional topologies in terms of the required power switches and isolated dc supplies, control requirements, cost, and reliability. This will add up to the efficiency of the converter as well as reducing the size and cost of the final prototype. The PSPWM control method is used to drive the inverter. The simulation results of the developed prototype for a nine-level inverter of the proposed topology are demonstrated in this paper. The results clearly show that the proposed topology can effectively work as a multilevel inverter with a reduced number of carriers for PWM, the proposed converter applied to BLDC motor drive to check the performance characteristics of drive.

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