I declare that this written submission represents my ideas in my own words, and where the ideas or words of others are included, I have adequately cited and referenced the original sources. I also declare that I have complied with all principles of academic honesty and integrity and have not misrepresented, fabricated or falsified any idea/data/fact/source in my submission. First of all, I want to thank God Almighty for keeping me in good health and for all the grace.
Ashudeb Dutta for his valuable guidance, consistent moral support and impetus that helped me in the achievement of my dissertation. I would like to thank my senior Pravanjan Patra Sir who guided me in my project and helped me understand many concepts. I would also like to thank my dear friends Prakash Kumar Lenka, Narendra Nath Ghosh and Pankaj Kumar Jha Sir for being there, both professionally and personally, at all times.
Taking an EKG, several leads combined with signals from different parts of the body (ie, from the right wrist and left wrist) are used to track the electrical activity of the heart. Therefore, we need to design a power line interference filter to avoid signal contamination.
Motivation
It consists of AFE, including instrumentation amplifiers, followed by two PGAs, a mixed-signal AGC and a 10-bit SAR ADC. The ECG acquisition board translates the body signal into six leads and processes the signal using a low-pass filter (LPF) and SAR ADC. The acquisition board consists of: an instrumentation amplifier, a high-pass filter, a 60 Hz notch filter and a common-level regulator.
Requirement for designing a Notch Filter
Design of Passive Notch Filter
Why do we need Active Notch Filter?
Active Notch Filter
Tow-Thomas Architecture
- Notch Frequency
- Notch Depth
- Quality Factor
Modelling of each block
Operation of circuit at lower frequencies
For lower frequencies, as we saw, the input is high-pass filtered by the 1st amplifier. When the loop gain goes to unity, it gives -3dB point for the lower cutoff frequency. As R1 is increased, the cutoff frequency can be shifted, but this leads to a decrease in peaking as the attenuation decreases.
Here the loop gain is found by applying a Vtest at the input to R4 and finding feedback at Vfeed.
Operation of circuit at higher frequencies
Gain: For any CMOS topology, the gain of the circuit is given by the product of its transconductance and the output resistance of the load structure. Common Mode Input Range: This is an important parameter at the input to the circuit. The saturation voltage of the load structure mainly defines the output swing of the amplifier.
Common Mode Rejection Ratio (CMRR): The common mode gain is given by the gain of the common mode input to the output. The common mode rejection ratio is the difference between the differential gain and the common gain. Rout is the output impedance and Cload is the output capacitance of the telescopic differential amplifier.
Non-dominant pole-: Non-dominant pole exists in the cascode node of the differential amplifier. To improve the gain of the differential amplifier, the transistors are cascoded, which further leads to the reduction of the oscillation of the output signal. Gmfc represents the transconductance and Routfc represents the output impedance of the folded OTA cascode.
The dominant pole is at the output node and the non-dominant pole is at the cascode node of the folded cascode OTA. The signal flowing through the current mirror node becomes larger compared to that of the RFC due to the increased impedance of the small signal path. The discharge current of the weak-inversion MOS is proportional to the exponential of the effective gate-source voltage.
59 To address this inefficiency, a modified FC is presented in Fig. The proposed changes are intended to use M3 and M4 as driving transistors. Putting all the values in the above equation, the transconductance of the input transistor is 1.05 mS. The notch gain decreases as the loop gain of the high-pass path reaches unity.
Optimizing R and C Values
OTA Terminology
Where 𝑓𝑢 represents the unity gain bandwidth and 𝑔𝑚 represents the transconductance of the circuit and 𝐶𝑙 represents the load capacitance. Higher PM values will allow the output signal to reach steady state without much ringing. The saturation voltage of the bias architecture, the saturation voltage and the voltage space 𝑉𝐺𝑆 of the transconductance structure determine the CMIR.
In general, the cascode structures result in low output swing as more number of transistors are stacked under each other and the 𝑉𝐷𝑆𝑠𝑎𝑡 subtracted from the 𝑉𝐷𝐷 provides the output voltage swing. 𝑂𝐷𝑅 = 𝑉𝐷𝐷− ∑ 𝑉𝐷𝑆𝑠𝑎𝑡𝑉𝑆𝑠𝑎𝑡 (3.5) Static Current consumption defines all the product of the current branch and the supply of the current specific branch. 3.6) The speed of an amplifier is dependent on the equivalent RC constant at the output node.
So it is a strong function of the internal capacitances and currents in the amplifier branches. The CMRR must be very high so that the cancellation of the signals is good.
Different OTA Configuration
Reduction in conduction efficiency and increase in drain-source saturation voltage are disadvantages of MOS compared to weak inversion. The lower cut-off frequency is equal to the UGB of the global gain of the low-pass filter loop.
Recycling folded cascode OTA
Improved Recycling folded cascode OTA
Comparison of all the OTA
Low compared to folded cascode OTA due to the current mirror node in the signal path. Gm/ID is the ratio obtained from full process characterization for NMOS and PMOS transistors. In saturation, there are three regions of operation that depend on the rms voltages applied to the gate of the transistor.
The transconductance of the 2nd stage should be 10 times higher compared to the transconductance of the 1st stage to have resistanceless compensation. By choosing the same operating range, the DC current through M3b is the same as that of M1a and is 8nA. 69 6.5 Relationship between closed-loop forward gain and notch depth with different values of q.
70 6.6 Relationship between Closed-Loop Front Path Gain and Notch Depth with Different Values of q. 71 6.7 Relation between forward path UGB loop gain and band drop for various values of q .
Application of OTA
Introduction
Different regions of operation
Performance Comparison among Different regions of operation
Different types of Model
Recently, one of the most commonly used architectures, whether a single stage or the first stage of multistage amplifiers, had been the folded cascode (FC) amplifier due to its high gain and reasonably large signal swing in the current and future low voltage CMOS processes. Since we are working in weak inversion, gm/ID is chosen to be very high, so the current consumption is very low and the parasitic capacitance is very high. The transconductance of M1a and M2a is assumed to be equal, so the current consumed by them is also the same.
By choosing the same 𝑔𝑚⁄𝐼𝐷 for M1a and M3a, the DC current required is three times the input, so the DC current is 24nA. Using KCL at the cascode junction, the current flowing in M1a is 8nA and the current flowing in M3a is 24nA, so the current flowing through M5 and M7 is 16nA. Since the path M2b, M11 and M3b act as a unity gain amplifier, the transconductance of M3b should be.
Since the current flowing through M5, M7 and M9 is the same, the current consumed by them is also the same 16nA. The gain of the OTA decreases with the increase of the channel inversion, since the channel inversion increases the gate-to-source voltage, leading to an increase in the drain-to-source potential, and the resistance becomes dependent on the drain-to-source potential, leading to a decrease in the gain of OTA. It can be seen that at the crossing point of low-pass loop gain and high-pass transfer function we get a notch.
Recycling Folded Cascode Amplifier
Two Stage Recycling Folded Cascode Amplifier
OTA Design requirements
OTA Design Parameter
Power Consumption of First Stage OTA
All transistors in the RFC OTA operate in a weak inversion region. It can also be observed that the lower passband and upper passband have zero dB gain up to the bandwidth requirement.
Recycling Folded Cascode
Design of RFC
