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Soft switching bidirectional DC–DC converter for ultracapacitor–batteries interface

Ehsan Adib

^*

, Hosein Farzanehfard

Department of Electrical and Computer Engineering, Isfahan University of Technology, Iran

a r t i c l e i n f o

Article history:

Received 21 October 2008

Received in revised form 28 June 2009 Accepted 20 July 2009

Available online 22 August 2009

Keywords:

Battery

DC–DC power converters Ultracapacitor

Soft switching

a b s t r a c t

In this paper a new soft switching bidirectional DC–DC converter is introduced which can be applied as the interface circuit between ultracapacitors and batteries or fuel cells. All semiconductor devices in the proposed converter are soft switched while the control circuit remains PWM. Due to achieved soft switching condition, the energy conversion through the proposed converter is highly efﬁcient. The proposed converter is analyzed and a prototype converter is implemented. The presented experimental results conﬁrm the theoretical analysis.

1. Introduction

The energy storage systems are designed to provide peak power demands. If only batteries or fuel cells are used in an energy storage system, their capacity should be over designed to provide the peak power stresses. By using ultracapacitor besides batteries or fuel cells, the peak power demands can be provided using ultracapacitors and therefore, the energy storage devices are designed to provide only the average power required. Therefore, by combining the ultracapacitors and batteries or fuel cells, the volume and cost of the energy storage elements can be decreased. The ultracapacitors are charged usually through the energy storage elements such as batteries and fuel cells when the power demand is low. At peak power, the stored energy in the ultracapacitor will support the energy storage devices to provide the required power.

Ultracapacitors are a new generation of capacitors that have extremely high capacity but the voltage they can tolerate is small.

Although ultracapacitors have higher power density than batteries, their energy density is much lower. In order to combine the ultracapacitors and energy storage elements such as batteries and fuel cells, a bidirectional interface circuit is required. The interface circuit charges the ultracapacitor at low power demands and discharges the ultracapacitor at peak power demands. DC–DC converters are vastly applied in industry as interface circuits [1–3]. Usually buck and boost converter is used as the interface

circuit of batteries and ultracapacitors[4,5]. The converter charges the ultracapacitors in buck mode since their voltage is low and discharges the ultracapacitors in boost mode to adapt the low capacitors voltage to higher voltage of batteries. In order to reduce the size and weight of this converter, high switching frequency is indispensable. However, at high frequencies the converter efficiency is reduced due to switching losses and thus, the energy is wasted while charging and discharging the ultracapacitors. Switch- ing losses are produced at switching instances where both the voltage across the switch and the current through the switch have considerable value. By limiting the current or voltage at switching instant, switching losses are eliminated which is called soft switching. Therefore, soft switching techniques can be applied to the interface circuit to eliminate the switching losses and improve the converter efficiency while decreasing the Electro Magnetic Interferences (EMI)[6–10]. The introduced soft switching interface circuit in[9]is a bidirectional isolated converter. In many applica- tions isolation is not necessary and only the total efficiency decreases due to isolation while no desirable benefit is achieved.

Also, isolation increases the converter volume and weight. A ZVT PWM buck and boost converter is introduced in[10], however, in this converter the control circuit is complicated and the auxiliary circuit is used twice in every switching cycle. In soft switching converters the switching losses are recovered using additional circuit elements. In other words, in soft switching converters especially in ZVT and ZCT type converters, although the conduction losses of the auxiliary circuit are added, but the switching losses are recovered. Since the conduction losses of the auxiliary circuit are much less than the switching losses, the efﬁciency increases using these techniques. In the converter of[10], the auxiliary circuit is applied two times in a switching cycle. This means that in the

doi:10.1016/j.enconman.2009.07.001

* Corresponding author. Address: Electrical and Computer Engineering Depart- ment, Isfahan University of Technology, Isfahan 84156, Iran. Tel.: +98 9133658147;

fax: +98 3113912451.

E-mail addresses: [email protected] (E. Adib), [email protected] (H.

Farzanehfard).

Contents lists available atScienceDirect

Energy Conversion and Management

j o u r n a l h o m e p a g e : w w w . e l s e v i e r . c o m / l o c a t e / e n c o n m a n

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converter of[10], the additional conduction losses are almost twice the proposed converter for recovering the same amount of switching losses. Therefore, the proposed converter has better efﬁciency than converter of[10]while the required control circuit for the auxiliary circuit is much simpler.

In this paper a soft switching PWM buck and boost converter is introduced which uses an auxiliary circuit only once at switching instant in each switching cycle. Therefore, the control circuit is simple and also the auxiliary circuit losses are low. The proposed converter is introduced and analyzed in Section2. Design considerations are discussed in Section3. In Section4, the experimental results are presented which conﬁrm the validity of theoretical analysis.

2. Circuit description

The proposed interface circuit is shown inFig. 1. The main bidirectional buck and boost converter is composed of two bidirectional switches S1 and S2 and ﬁlter inductor L. The auxiliary circuit is composed of a bidirectional switch Sa1, a unidirectional switch Sa2, two small resonant inductorsLrandLS, and a small resonant capacitorC_r. The auxiliary circuit provides the soft switching condition for S1 and S2 while its semiconductor devices are also soft switched. In order to simplify the theoretical analysis, it is assumed that all semiconductor devices are ideal. Also, inductor Lis large enough to assume its current is constant in a switching cycle. The converter operation is analyzed in both buck mode and boost mode.

2.1. Buck mode operation

The converter operation in buck mode is composed of six different operating intervals in a switching cycle. The converter theoretical waveforms are shown inFig. 2and equivalent circuit for each operating interval is shown inFig. 3. Before the ﬁrst interval it is assumed that Cr voltage is zero, D2 is conducting the current throughL(I0), and all other semiconductor devices are off.

Interval 1 [t₀t₁]: This interval starts by turning S₁ on and since D2is conducting, the battery voltage (Vbat) is place acrossLr

and its current increases linearly. Therefore, this switch turns on under zero current (ZC) condition.Lrcurrent equation during this interval is:

ILr¼Vbat

Lr

ðtt0Þ ð1Þ

At the end of this interval,Lrcurrent reachesI0and D2turns off under ZC condition.

Interval 2 [t1t2]: In this interval, energy is transferred from battery to ultracapacitor. Also, a resonance starts betweenLrand CrthroughDa1and thus,Cris charged to 2Vbat. The current equation forLrduring this interval is:

ILr¼I0þVbat

Z0

sinð

x

0ðtt1ÞÞ ð2Þ

where Z0¼

ffiffiffiffiffi Lr

Cr

s

;

x

0¼ 1

ffiffiffiffiffiffiffiffiffi LrCr

p ð3Þ

Interval 3 [t2t3]: In this interval, the energy is transferred from battery to ultracapacitor through S1and all other semiconductor devices are off.

Interval 4 [t3t4]: In this interval, Sa1is turned on and the dif- ference betweenCrvoltage and the battery voltage is placed across Lr. Therefore, the current throughLrand S1is reduced to zero. At the end of this interval S1is turned off under ZC condition.Lrcur- rent during this interval is:

ILr¼I0Vbat

Z0

sinð

x

0ðtt3ÞÞ ð4Þ

ZC condition for S1turn off is achieved ifVbat/Z0is greater or equal toI0. AssumingVbat/Z0is equal toI0,Crvoltage is equal toVbat

at the end of this interval.

Interval 5 [t4t5]: During this interval,Cris discharged byL current (I0) until its voltage is reduced to zero and diode D2is for- ward biased.

Interval 6 [t5t0+T]: Diode D2 starts to conduct under zero voltage (ZV) condition andLcurrent runs through this diode.

2.2. Boost mode operation

The converter operation in boost mode has eight distinct operating intervals in a switching cycle. The converter theoretical waveforms are shown inFig. 4and equivalent circuit for each operating interval is shown in Fig. 5. Before the ﬁrst interval it is assumed that D1is conducting the current throughLrandL(Iin) and all other semiconductor devices are off. Also, it is assumed that Crvoltage isVbat+Z0Iin.

Interval 1 [t0t1]: This interval starts by turning Sa1and Sa2on.

Since S_a2and D₁are on,V_batV_capis placed acrossL_Sand its current increases linearly toIinand D1current reduces fromIinto zero accordingly. Therefore, Sa2is turned on under ZC condition and at the end of this interval D1turns off under ZC condition.LScurrent equation during this interval is:

Lr

Vcap L

D1 Ls

Da1 Sa1

Sa2

Cr S2

S1 Vbat

D2

Fig. 1.Proposed soft switching interface circuit.

t

0

t

₁

t

₂

t

₃

t

₄

t

₅

1

Vg

S

1

VgSa

1

I

S 1

V

S

1

VSa

1

ISa

Vbat

0

0 Z

I +V^bat

I0

Vbat

Fig. 2.Converter theoretical waveforms in buck mode.

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ILs¼ðVbatVcapÞ LS

ðtt0Þ ð5Þ

Since the duration of this interval is small, it can be assumed thatCrvoltage is almost constant during this interval.

Interval 2 [t1t2]: In this interval a resonance occurs between C_r,L_randL_Sand thus,C_rdischarges in a resonance fashion.C_rvolt- age equation is:

VCr¼ ðVbatþZ0IinVcapÞcosð

x

1ðtt1Þ þVcap ð6Þ where

x

1¼ 1 ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi ðLrþLSÞCr

p ; Z1¼

ffiffiffiffiffiffiffiffiffiffiffiffiffiffi LrþLS

Cr

s

ð7Þ

Interval 3 [t2t3]: WhenCrvoltage reaches zero, D2starts to conduct under zero voltage condition andVcapis placed across series combination ofL_SandL_r. Thus, the current inL_SandL_rdecrease linearly toIinwhere D2turns off under ZC condition. During this interval S2is turned on under ZV condition.

Interval 4 [t₃t₄]:V_capis still acrossL_SandL_rand their current continues to decrease fromIinto zero and S2current increases from zero toIinaccordingly.Lrcurrent equation during this interval is:

ILr¼Iin Vcap

LrþLS

ðtt3Þ ð8Þ

Interval 5 [t4t5]: S2is on and energy is being stored inLsim- ilar to a regular boost converter. Duration of this interval (converter duty cycle) is determined by control circuit according to control strategy.

Ls

Lr Ls

Cr

D2

(c)

Lr Vbat

Da1 Vcap

L Vbat

Vbat

S1 Ls

D2

L

Vcap

Cr Ls

Sa1 Vbat

Cr

Vcap S1

(f)

Ls

(d)

S1 Cr

(b)

Sa1 Vbat

Lr

Vbat S1

Ls

(e)

L Cr

Lr

(a)

L Vcap

L Lr Lr

Cr L

Vcap Vcap

Fig. 3.Equivalent circuit for each operating interval of buck mode (a) [t0t1] (b) [t1t2] (c) [t2t3] (d) [t3t4] (e) [t4t5] (f) [t5t0+T].

in

bat Z I

V + ₀

I

in

cap in

bat Z I V

V + 0 −

1 0

Z V I Z I_in V^bat+ ⁱⁿ− ^cap

+ 2

Vg

S

2

VgSa

2

VS

2

I

S

2

V

Sa

2

I

Sa

t

0

t

₁

t

₂

t

₃

t

₄

t

₅

t

₆

t

₇

Fig. 4.Converter theoretical waveforms in boost mode.

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Interval 6 [t5t6]: S2 is turned off and L current chargesCr

through D_a1. SinceC_rvoltage changes linearly from zero toV_bat, thus, S2is turned off under ZV condition.Crvoltage during this interval is:

VCr¼I0

Cr

ðtt5Þ ð9Þ

Interval 7 [t6t7]: WhenCrvoltage reachesVbat, a resonance occurs betweenC_randL_r. Thus,L_rcurrent increases from zero to Iinin a resonance fashion. Also, Crvoltage increase from Vbat to Vbat+Z0Iin. The equations ofCrvoltage andLrcurrent during this interval are:

VCr¼VbatþZ0Iinsinð

x

0ðtt6ÞÞ ð10Þ

ILr¼Iinð1cosð

x

0ðtt6ÞÞ ð11Þ

Interval 8 [t7t0+T]: Diode D1 turns on under ZV condition and energy is transferred from ultracapacitors to batteries.

3. Design considerations

InductorLis designed like ﬁlter inductor of a regular PWM buck and boost converter. According to(4), in order to achieve ZC condition at S1turn off for the buck mode operation, the following condition should be achieved:

Vbat

Z0

PI0 max ð12Þ

whereI0max is the maximum ultracapacitors charging current in buck mode. In practice 20% over design is necessary, therefore:

Ls Ls D1

S2

Vbat

Cr

Lr Vbat

L Vcap

D1

(h)

Cr Sa1

Sa2

Ls

(g)

Cr

L

Ls Vbat

Lr

(f)

Vcap Sa1

Cr

Lr

Da1

Vbat

Vcap

(e)

L Ls

Sa1

L

Cr Vbat

Ls

(d)

D2

Vbat

Cr

Lr

(c)

Sa2 Sa2

Da1 Sa1

Vbat Vcap

L

Lr

(b)

L

Ls

Vcap

Vcap L

Sa2

Lr Lr

Vcap Vcap

(a)

Lr S2

L

Vbat

Ls

D1

Fig. 5.Equivalent circuit of each operating interval of boost mode (a) [t0t1] (b) [t1t2] (c) [t2t3] (d) [t3t4] (e) [t4t5] (f) [t5t6] (g) [t6t7] (h) [t7t0+T].

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Z06 Vbat

1:2I0 max

ð13Þ

LSprovides ZC condition for Sa2turn on andLrprovide ZC condition for S1turn on. Thus, their values can be calculated like any turn on snubber. By calculatingL_r, the value ofC_rcan be calculated using(13) and (3).

According to(6), in order to achieve ZV condition for S2turn on for the boost mode operation, the following condition should be achieved:

VbatþZ0Iin;minP2Vcap ð14Þ

whereIin,minis minimumLcurrent in boost mode. SinceVbatis usually more than twice the ultracapacitors voltage, the above condition is trivial.

4. Experimental results

In order to conﬁrm the validity of theoretical analysis, a prototype converter is implemented. The batteries voltage is 48 V and the ultracapacitors voltage is 24 V. The converter operating power is 100 W and its switching frequency is 100 kHz. According to design procedure, a 200 uH inductor is used forL, a 1.5 uH inductor is used forLr, a 1 uH inductor is used forLSand 18 nF capacitor is used forCr. IRF540 is used for all of the switches and for Sa2, a MUR460 is used as the series diode. The converter experimental results for buck mode are shown inFig. 6and boost mode experimental results are illustrated inFig. 7. According toFig. 6a, after the main switch S1is turned on, its voltage decreases to zero and then its current increases ﬁrst linearly toI0and then in a resonance Fig. 6.Experimental results of buck mode, voltage (top waveform) and current (bottom waveform) of (a) main switch S1(b) auxiliary switch Sa1(vertical scale 20 V/div or 4 A/

div, time scale 1us/div).

Fig. 7.Experimental results of boost mode, voltage (top waveform) and current (bottom waveform) of (a) main switch S2(b) auxiliary switch Sa2(vertical scale 20 V/div or 3 A/div, time scale 1 us/div).

94 93 92 91 90 89 95 96 97

20 40 60 80 100

power

efficiency

89 90 91 92 93 94 95 96 97

20 40 60 80 100

power

efficiency

Fig. 8.Converter efﬁciency curve (continuous line) versus hard switching counterpart (broken line) (a) buck mode (b) boost mode.

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fashion to its maximum value as it was predicted in the theoretical analysis. As it can be observed from the same figure, just before turning S1 off, its current has decreased to zero. Therefore, zero current switching condition is achieved for S₁ that confirms the theoretical analysis and also the achieved soft switching condition for the auxiliary switch is apparent inFig. 6b. As it can be observed inFig. 7a, the S₂voltage has decreased to zero and then this switch is turned on and the switch current increases toIin. Furthermore, when S2 is turned off, the voltage across it increases linearly to its final value as predicted in theoretical analysis. In addition, the presented experimental results inFig. 7b, justify theoretical analysis of the proposed converter. The converter efficiency curve in buck mode and boost mode is compared with hard switching converters inFig. 8.

5. Conclusions

In this paper a new soft switching buck and boost is introduced.

The soft switching is achieved for full load range while the control circuit remains PWM. The converter is analyzed and its different operating modes are presented. Design considerations are discussed and a laboratory prototype is implemented. The presented experimental results conﬁrm the validity of theoretical analysis.

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