In this thesis, two advanced three-port DAB converters, which are Two-inductor three-port DAB converter and Dual-transformer three-port DAB converter have been proposed to reduce the control complexity that the conventional converter has, and achieve higher power density and higher efficiency.
Elimination of the power coupling issue and reduction of circulating current in one port idling is theoretically analyzed and discussed in Two-inductor three-port DAB converter. The performance and the benefits are demonstrated with a 5-kW prototype Two-inductor three-port DAB converter. In the simulation and experimental results, the steady-state waveforms prove that the converter can transfer in any direction, the step-load response shows that the converter has a decoupled system without extra control and the one port idling waveforms denotes that it has reduced circulating current.
The operational principles and the absence of the power coupling issue of Dual-transformer three- port DAB converter are explained and the magnetizing inductance design methodology is also proposed to achieve the full ZVS operation. It has multiple transformer rather than a single transformer that the other converters stated above have. It may decrease the power density of the converter, but has higher expendability to connect more than three ports. By using a 3-kW prototype Dual-transformer three-port DAB converter, the performance and effectiveness of the converter are verified with the experimental steady-state operational waveforms and the dynamic response waveform. The full ZVS operation using the proposed magnetizing design method is also experimentally demonstrated with the turn-on transition waveforms.
A voltage balancer for bipolar LVDC distribution using Two-inductor three-port DAB converter is proposed to balance the bipolar voltage levels in case of the grid-tied voltage balancer failures. The voltage balancing operations and the current stress reduction are theoretically analyzed. The performance and validity of the proposed balancer is demonstrated with a 3-kW prototype. The experimental results denote that the converter balances each bus voltage under several load conditions, shows it independently regulate each bus without interference and shows it has reduced current stress compared with that of the conventional converter
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APPENDIX
A. Derivation of the neutral voltage v
nof the conventional three-port converter
Fig. A1. Equivalent circuit with the two sources v2 and v3 short
Fig. 2.3 illustrates the wye-connected equivalent circuit for conventional three-port DAB converter.
the neutral voltage vn can be derived by applying the principle of superposition. Fig. A1 shows the equivalent circuit with one voltage source v1 and the other two voltage sources v2 and v3 short. The neutral voltage vn seen from the voltage source v1 side is derived as below:
2 3 1
1 2 1 3 2 3
( t) ( t)
n
L L v
L L L L L L
v = + + (A1)
In the same manner, it can be applied to the other two ports. The neutral voltage vn seen from the other two ports are derived as follows:
1 3 2
1 2 1 3 2 3
( t) ( t)
n
L L v
L L L L L L
v = + + (A2) 1 2 3
1 2 1 3 2 3
( t) ( t)
n
L L v
L L L L L L
v = + + (A3)
The neutral voltage vn can be derived by summing the equations (A1), (A2) and (A3)
1 2 3 1 3 2 2 3 1
1 2 1 3 2 3
( t) ( t) ( t)
n( t)
L L v L L v L L v L L L L L L
v = + + + + (A4)
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B. Current margin consideration for ZVS operation
Current margin for the ZVS operation is practically required considering the output capacitance (Coss) of MOSFETs and the dead time. To charge the two output capacitance and discharge the rest of the two output capacitance, the magnitude of the charge Q is defined as below:
=4 oss
Q C V (B1)
Where V is the magnitude of the voltage applied across the output capacitance. The charge Q has to be provided by the inductor current. The charge Q can be derived in terms of the current and the time as follows:
1
1
'
=
LQ i t (B2)
Since the dead time ωtd set depending on the designer, that is between θ1 and θ’1 is relatively very short time. the inductor current iL can be considered as constant during the dead time. The equation (B2) can be re-expressed as below:
= L td
Q
i
(B3)Substituting (B1) into (B3), the practical current margin can be calculated as follows:
4
= oss
L d
C V
i t (B3)
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C. Estimated loss calculation
Losses in the proposed converter and the conventional converter are mainly categorized into two parts: power switch (MOSFET) losses and magnetic component losses. Parasitic losses are negligible (e.g. PCB conductive loss, capacitor ESR loss, and etc.).
1) MOSFET conduction loss: The conduction loss in the MOSFETs can be straightly calculated by the current flowing through the MOSFET with its on-resistance. The conduction loss in a full-bridge having four MOSFETs is calculated as in the equation (C1), and for a half-bridge organized by two MOSFETs, the conduction loss can be calculated as in the equation (C2).
_ ( )=4 2, ( ) sw con full ds RMS ds on
P I R (C1)
_ ( )=2 2, ( ) sw con half ds RMS ds on
P I R (C2)
Where, Ids,RMS is the RMS value of current conducting through the MOSFET. The RMS value of the MOSFET current and Rds(on) is the on-resistance of the MOSFET presented in the data sheet.
2) MOSFET switching loss: MOSFET switching loss consists of turn-on loss and turn-off loss. If zero voltage switching (ZVS) is achieved, turn-on loss can be significantly reduced. In the design parameters listed in the manuscript, the prototype is designed with nearly unity voltage gains, which ensure the ZVS operation in the DAB converter [25]. Therefore, turn-on loss can be neglectable. Turn- off loss is only considered and can be calculated as follows:
, 1
_
1
= 2
= N off j j
sw E N ds ds fall sw
sw off V I t f
P f (C3)
Where fsw is the switching frequency, Eoff,j (j is a MOSFET number in a bridge) is turn-off energy dissipation in a MOSFET during the MOSFET turn-off transient time, N is the number of MOSFETs in a port (e.g. N=4 for a full-bridge and N=2 for a half-bridge), Vds is the voltage before the MOSFET turns off, Ids is the current before the MOSFET turns off, and tfall is the MOSFET falling time.
3) Inductor and transformer winding loss: Winding losses can be calculated as below:
2,
2 AC wind ds RMS
P I R (C4)