LAB2 CPIT 210

LAB2 CPIT 210 Prepared by: Mohammed Ghazi

Computer Architecture CPIT 210 LAB 2 Manual

Prepared By:

Mohammed Ghazi Al-Obeidallah

malabaidallah@kau.edu.sa

LAB2 CPIT 210 Prepared by: Mohammed Ghazi

LAB 2 Outline:

1. Basic gates are discussed with students (AND, OR, NAND, NOR, INVERT) in the lab, each student will write their truth tables on his note book.

2. Students will learn how to work with Mulimedia Logic simulator, how to represent different circuit, and how to run the simulator.

3. Given any function, students will learn how to represent that function in P.O.S and S.O.P format.

4. Student should also know how to represent any circuit using some limited gates.

LAB 2 main Outcome:

1. At the end of lab a, students will be able to work with Mulimedia Logic simulator.

2. Students will know how to represent each function in S.O.P and P.O.S format.

LAB2 CPIT 210 Prepared by: Mohammed Ghazi

Q1]

Show a block diagram of a system using AND, OR, and NOT gates to implement the following function:

F=( A ( B + C )’ + B D E ) ( A’ + C E )

Q2]

Simply the following expression in:

(i) Sum of Product. (ii) Product of Sum.

a) X’ Z’ + Y’ Z’ + Y Z’ + X Y b) A C’ + B’ D’ + A’ C D + A B C D

Answer:

a) X’ Z’ + Y’ Z’ + Y Z’ + X Y

X Y Z F

0 0 0 1

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 1

1 0 1 0

1 1 0 1

1 1 1 1

S.O.P F= X’ Y’ Z’ + X’ Y Z’ + X Y’ Z’ + X Y Z’ + X Y Z

P.O.S  F= (X’ Y’ Z)’ . (X’ Y Z)’ .(X Y’ Z)’ = (X + Y + Z’) ( X+ Y’ + Z’) (X’ + Y + Z’) b) A C’ + B’ D’ + A’ C D + A B C D

A B C D F

0 0 0 0 1

0 0 0 1 0

0 0 1 0 1

0 0 1 1 1

0 1 0 0 0

0 1 0 1 0

0 1 1 0 0

0 1 1 1 1

1 0 0 0 1

1 0 0 1 1

1 0 1 0 1

1 0 1 1 0

1 1 0 0 1

1 1 0 1 1

1 1 1 0 0

LAB2 CPIT 210 Prepared by: Mohammed Ghazi

1 1 1 1 1

S.O.P F A’ B’ C’ D’ + A’ B’ C D’+ A’ B’ C D + A’ B C D + A B’ C’ D’ + A B’ C’ D + A B’ C D’ + A B C’ D’ + A B C’ D + ABCD

P.O.S F (A’ B’ C’ D)’ . (A’ B C’ D’)’ .(A’ B C’ D)’ (A’ B C D’)’ (A B’ C D)’ (A B C D’)’

=( A+B+C+D’) (A+B’+C+D) (A+B’+C+D’) (A+B’+C’+D) (A’+B+C’+D’) (A’+B’+C’+D)

Q3]

I) Design the following functions using only NAND gates : a) X Y’ + Y Z + X’ Y’ Z’

b) X’ Y + (X + Z’) (Y + Z)

II) Redesign the functions above using only NOR gates.

Answer

I) using only NAND gates.

a) ( X Y’ + Y Z + X’ Y’ Z’ )’ ‘

= ( ( X Y’ )’ . ( Y Z )’ . (X’ Y’ Z’)’ )’

b) X’ Y + (X + Z’) (Y + Z)

= ( X’ Y + (X + Z’) (Y + Z) )’ ‘

= ( (X’ Y)’ . ( (X + Z’) (Y + Z) )’ )’

= ( (X’ Y)’ . ( (X + Z’)’ ‘ (Y + Z)’ ‘ )’ )’

= ( (X’ Y)’ . ( (X’ . Z)’ (Y’ . Z) ‘ )’ )’

II) Using only NOR gates.

a) X Y’ + Y Z + X’ Y’ Z’

= ( X Y’ )’ ‘ + ( Y Z )’ ‘ + ( X’ Y’ Z’ )’ ‘

= ( ( X’ +Y )’ + ( Y’ + Z’ )’ + ( X+ Y+ Z )’ )’ ‘

b) X’ Y + (X + Z’) (Y + Z)

= (X’ Y)’ ‘ + ( (X + Z’) (Y + Z) )’ ’

= (X+ Y’)’ + ( (X + Z’)’+ (Y + Z)’ )’

= ( (X+ Y’)’ + ( (X + Z’)’+ (Y + Z)’ )’ ) ‘ ‘

Home work 2:

Consider the following circuit:

F= X'Y' +YZ'+XYZY'

1. Draw the circuit using the simulator.

2. Represent the circuit using P.O.S and draw it using the simulator.

3. Represent the circuit using S.O.P and draw it using the simulator.