Converter topology - fault analysis for conventional VSCs

CHAPTER 1: INTRODUCTION

3. CHAPTER 3: PROTECTION SCHEME FOR VSC-HVDC

3.2. DC fault response

3.2.1. Converter topology - fault analysis for conventional VSCs

The correct design of a protection scheme is only possible after a proper fault analysis study has been carried out. The critical parameter limits identified during these studies were later used as settings in the implemented DC protective switchgear (e.g. the critical time limits of a DC fault current were useful in the configuration of a DC CB’s speed requirements). In a conventional VSC-HVDC system a DC fault is usually known to occur in three different stages (although some literatures can expand the number of stages as in [154]). In these stages, ultimately, IGBTs are blocked and the AC grid will feed fault currents through the antiparallel diodes [13], [23]. A line-to-line fault as already mentioned poses the most serious threat for VSC systems.

During a DC fault, the blocking of IGBTs exposes diodes to overcurrent. Active power is reduced to zero while reactive power is left to flow from the AC side to the converter increasing the fault current due to the AC contribution [55]. This is possible through the freewheeling diodes and causes a severe voltage dip. It is expected that after the fault clearance the AC side converter switches will experience high inrush current while the DC-side works on rebuilding itself. The equivalent circuit is as shown in Figure 3-1, where Rc and Lc are the equivalent resistance and inductance respectively.

Figure 3-1: A two-level VSC-HVDC converter station following a cable-to-cable DC fault [55].

To analyse and understand the response of a DC for a VSC-HVDC network, the results obtained can be divided into three stages. In this section, the different stages of the DC fault are analysed individually, as it progresses.

3.2.1.1. Stage 1: Capacitor discharging stage

This is considered the natural response of the circuit and occurs immediately after the fault. As the name suggests, during this stage the DC-link capacitor is discharged.

35 Under the conditions

C

R_c2 L^c an equivalent circuit resulting from the fault is shown in Figure 3-2.

The solution of the second order circuit natural response results in equations (3-1) and (3-2) for DC-link voltage and cable current respectively.

Figure 3-2: Equivalent circuit for capacitor discharge stage during short-circuit fault [71].

Assuming that the fault occurs at time tt₀ and also that V_c (t₀)V₀ and I_cable(t₀)I₀, the DC bus voltage can be represented as [55]: -

) sin(

)

sin( ⁰

0

0 e t

C t I

V e

V ^t _n

n n

t n

DC 

 

 

 _{ }





 (3-1)

While the cable current is expressed as [55]: -

) sin(

)

sin( ⁰

0

0 e t

L t V

I e dt

CdV I

I ^t _n

c n n

t n DC

DC

cable 

 

 

 _{ }











 (3-2)

Where V_DC V_C DC voltage

V₀ and I₀ = Initial values of DC voltage and current respectively C = DC-link capacitance

R_c,L_c = cable resistance and inductance respectively I_cable= cable current

tan ¹( )



  ^ ⁿ and is defined as the systems phase angle

36

)²

(2 1

c c c

n L

R C

L 

 

₀  ² _n²

In a conventional VSC system, the DC-link capacitor qualifies as one of the highest contributors to the DC fault current magnitude in the initial stages of the DC fault [52], [62]. It is therefore important during the design of protection that the size of the capacitance used and their discharging rates are considered.

3.2.1.2. Stage 2: Freewheeling diode stage

The diode freewheel phase is also a natural response. It is initiated when the DC-link voltage has dropped to zero. In this phase, the cable current is transferred to the antiparallel diodes of the VSC. It can be solved using the equivalent circuit shown in Figure 3-3, where the cable has an initial current

' 0 0) (t I I_cable 

Figure 3-3: Equivalent circuit freewheeling diode stage during short-circuit fault [71].

As mentioned previously, as an initial condition, the DC bus voltage at this stage is expressed as [55]: -

0

 _C

DC V

V (3-3) While cable current becomes [55]: -

L t R

cable ^C

C

e I I

) ( ' 0

  (3-4)

Where the parameters used are as defined above.

3.2.1.3. Stage 3: AC grid current feeding stage

This part of the stage is known as the forced response stage. It can be solved using the equivalent circuit shown in Figure 3-4.

37 The IGBTs are blocked when the current through them rises above a threshold, however the DC voltage does not drop exactly to zero. Initially a three-phase short-circuit analysis is done. The following expressions can be deduced for both fault current and DC bus voltage.

Figure 3-4: Equivalent circuit AC grid current feeding stage during short-circuit fault [71].

The DC bus voltage can be represented as [55]: -

dt L dI I

R V

V_DC  _C 2 _{C cable} 2 _C ^cable (3-5) Cable current is given by [55]: -

) sin(

) sin(

)

sin( ₂ ^{/ 3 0} ₀ ⁴

1 C e t

e t e C

C t

C

I _n

n t g

n n

t t

g

cable 

 

 

 

   ^{ }  ^   ^

 (3-6)

Where C₁ I_m (1_g²L_cC)² _g(R_cC)²

(Phase-a grid current) i_ga I_g[sin(_gt_g0 )sin(_g0 )e^t]I_a1e^t,t₁t I_a1 i_ga(t₁)







 _g0  

1 ) (

tan ¹ ₂

DC c g

DC c g

C L

C R



 

 ^ 

( )

2

2 2

DC c DC c

m R C L C

I

C   







I_m I_a1 I_gsin(_g0 )

38 C₃ C₁sinC₂

 

 ^1cos

2

4 C C

C   _g

To calculate the fault current, contributions from both the converter and the AC side were considered. The common reaction of a VSC system when disrupted by DC-side faults is a sharp current rise and voltage dip. Results adapted from [154] for a 2 level VSC-HVDC system with a rated DC voltage of 10 kV are presented in Figure 3-5 and reveal the outputs characterising the cable current and the DC voltage during a short-circuit fault. The figure shows 4 stages instead of 3 as described above. Stage 1 shows results when the capacitor discharges whilst the diodes are turn off whilst stage 2 shows results of the capacitor discharge when diodes have been turned on (these two stages are normally grouped as the first stage and have been represented as such in the discussion). Stage 3 shows results when the inductors discharge through the diodes (this stage is represented as stage 2 in the explanation). Finally, stage 4 represents the AC grid feeding stage (i.e. represented as stage 3 in the explanation).

Figure 3-5: The fault characteristic of the VSC during a DC short-circuit fault [154].

39 Although the discussion of stages resulting from a DC fault can be represented a bit differently (i.e. as either 3 or 4 stages), a characteristic evident in all is the sharp rise in DC current. This is a value much higher than the DC CBs short-circuit capability of 9 kA [155]. It is important to note that even though the cable current rises very sharply during the capacitor discharge phase, the most critical phase for the system is the free-wheeling phase [156]. The IGBTs are blocked as soon as current through them rises above a specified threshold. Therefore, appropriate device protection measures should be considered.