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SEJARAH

MIKROPROSESOR

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Cikal Bakal Mikroprosesor

 1823 Baron Jons Jackob Berzelius discovers silicon (Si), which today is the

basic component of processors.

 1903 Nikola Tesla patents electrical logic circuits called "gates" or

"switches".

 1947 John Bardeen, Walter Brattain, and William Shockley invent the first

transistor at the Bell Laboratories on December 23, 1947.

 1958 The first integrated circuit is first developed by Robert Noyce of

Fairchild Semiconductor and Jack Kilby of Texas Instruments. The first IC was demonstrated on September 12, 1958.

 1960 IBM develops the first automatic mass-production facility for

transistors in New York.

 1968 Intel Corporation is founded by Robert Noyce and Gordon Moore.  1969 Advanced Micro Devices (AMD) is founded on May 1, 1969.

 1971 Intel with the help of Ted Hoff introduces the first microprocessor, the

Intel 4004 on November 15, 1971. The 4004 had 2,300 transistors,

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Intel 4004

Tahun 1971

Ted Hoff, Federico Faggin, Stan Mazor, Masatoshi

Shim

Data Spesifikasi:

Word width: 4-bit

2300 transistors

Clock: 108KHz/500/740

46 instructions

Registers: 16 x 4-bit

Stack: 12 x 4-bit

(4)

Intel 8008

Tahun 1972

Ted Hoff, Federico Faggin, Stan Mazor, Hal

Feeney

• Data

Word width: 8-bit

Clock: 800KHz

3500 transistors

48 instructions

Registers: 6 x 8-bit

Stack: 17 x 7-bit

(5)

Intel 8080

Tahun 1974

– Federico Faggin (then to zilog), Masatoshi Shima,

Stan Mazor

• Data

Word width: 8-bit

4500 transistors

Clock: 2M-3MHz

Address space: 64KB

Registers: 6 x 8-bit

IO ports, Stack pointer

(6)

Penggunaan Mikroprosesor Saat

Itu…

Intel 4004 dipakai pada mesin penghitung buscom.

Menjadi awal mula dimasukkannya kecerdasan buatan pada benda mati.

Intel 8008

Bill Gates muda dan Paul Allen coba mengembangkan bahasa

pemograman untuk chip tersebut,

Intel 8080

Menciptakan Pasar Mikroprosesor

Munculnya Mikroprosesor dari berbagai produsen

Motorola dengan tipe 6800 Signetic dengan tipe 2650Rokwell dengan PPS8 Zilog dengan tipe Z80

Digunakan untuk komputer

MITS Altair 8800Intel Intellec-8

The Motorola 68000, a 16/32-bit processor is released and is

later chosen as the processor for the Apple Macintosh and

(7)

Intel 8086

Tahun 1978

First x86 family microprocessor

Source compatibility with 80xx lines

Followers: 8088 (1979), 80186 (1982)

6-bit: all registers, internal and external

buses

29,000 transistors, 5MHz initially

20-bit address bus - 4MB address space

(8)

Intel 80286

Tahun 1982

134,000 transistors,

6M-8MHz initially (0.21 IPC)

10MHz

1.5MIPS

Designed for multi-tasking with MMU

(9)

Intel 80386

Tahun 1985

Chief architect: John H. Crawfor

Intel first X86 32-bit flat memory model – 4GB space

275 ribu transistor

80386 instruction set, programming model, and binary

encodings are the common denominator for all IA-32, i386, x86

Paging to support VM, hardware debugging, first use of

pipeline

Not necessarily a big performance improvement over 286275,000 transistors

12MHz initially, later 33MHz 11.4MIPS

• Andy Grove decided to single-source

producing 386

(10)

Penggunaan Mikroprosesor Saat

Itu…

IBM PC

PC/XT 8088, 1981PC/AT 80286, 1984

15 juta unit PC/AT dalam 6 tahun

Compaq:

first PC using 386, 1985

legitimize PC “clone” industry >> IBMAm486, 1992

SUN

(11)

Intel 80960/i960

Tahun 1985

Intel first RISC microprocessor

Best-selling embedded microcontroller at the time

After BiiN project, which was for end

high-reliability processor jointly with Siemens

Lead: Glenford Myers

Dropped after acquiring StrongARMin late 90’s

2013/02/10

Price/perf/power no longer competitive

(12)

Intel 80486

Tahun 1989

1,2 juta transistor

Atomic instructions

On-die 8KB SRAM cache

Tightly coupled pipelining: 1 IPC

50MHz 40MIPS on average and 50MIPS at peak

Integrated FPU (no longer need x87)

First chip exceeds 1M transistors

Gaming is critical

486 ended DOS games (Later, 3D ended 486)

More manufacturers,

AMD Am5x86,Cyrix Cx5x86,

(13)

Intel i860

Tahun 1989

Entirely new RISC microprocessor

VLIW and high-performance FP operations

32-bit ALU core, and 64-bit FPU (adder, multiplier, GPU)Register sets: 32 x 32-bit integer, 16 x 64-bit FP

GPU uses FP registers as 8 x 128-bit, with SIMD (Influenced

MMX)

64/128-bit buses, fetch 2 x 32-bit instructions

Dropped in mid-90’s

Compiler support was mission impossible

Context switch took 62 - 2000 cycles  Unacceptable for GPCPUIncompatible with X86, confusing the market with Intel 486 CISC

• Used in some parallel computers, graphic workstations

(14)

Intel Pentium

Intel Pentium, 1993

Pentium means “5”, because court disallowed numberbased trademarkLater “Pentium” was used in many Intel processors, no longer an

micro-architecture branding – vs. “Celeron”

P5 micro-architecture

1,3 juta transistor

First X86 superscalar micro-architecture

Dual integer pipelines, separate D/I caches, 64-bit external data-bus

60M-300MHz (75 MHz 126.5 MIPS)

60/66MHz 0.8um in 5v called “coffee warmer”

Competitors

X86: AMD K5/K6, Cyrix 6x86, etc.

Risc: M68060, PPC601, SPARC, MIPS, Alpha

• Pentium Overdrive pack

(15)

Intel Pentium Pro

Intel Pentium Pro, 1995

P6 (or i686), completely new apart from Pentium (P5)

• #transistors: Pentium 3.1M, Pentium MMX 4.5M,

Pentium Pro 5.5M

Out-of-order execution

Speculative execution, RISC-like micro-ops

Three pipelines, 2 integer, 1 fp

Innovative

on-package level-2 cache

• Manufacturing did allow on-die L2 cache

• Same CPU clock rate, non-blocking, SMP advantage

• Dies had to be bonded early  Low yield rate and high price

36-bit address bus (PAE). 16-bit performance was low

Performance better than best RISC with SPECint95,

(16)

AMD K5

Tahun 1996, AMD Original Design

Max. CPU clock rate 75 MHz to

133 MHz

FSB speeds 50 MHz to 66 MHz

Instruction set: IA-32/x86

1 L1 cache 8 KB + 16 KB (Data +

Instructions)

4.3 million Transistors in 500 or 350 nm

(17)

Intel P6

Pentium II, Tahun 1997

7.5M transistors

Slot replaced Socket with a daughterboard

Solved the issues of off-package L2 cache in PPro with half CPU

clock

Implemented MMX, improved 16-bit performance

Dikembangkan menjadi Celeron and Xeon, 1998

Celeron: no on-die L2-cache, 66MT/s FSBTo win low-end and to justify Xeon

Pentium II Xeon: L2-cache, 100MT/s, SMP

Pentium III, 1999

Introduced SSE for FP and vector processing

On-die L2 cache with .18um Coppermine

(18)

AMD K6

Available speeds: 166, 200 and 233 MHz

Front Side Bus: 66 MHz

L1 Cache: 32 + 32 kB (Data + Instructions)

Instruction set: MMX

8.8 million transistors in 0.35 micron

Release of the first chips: April 1997

K6-2

Instruction set: MMX, 3DNow!

Available speeds: 200, 233, 250, 266,

300, 333, 350 MHz

(19)

Intel Itanium

Tahun 1999

64-bit architecture

Originated from HP

EPIC: explicitly parallel instruction computing

1994, worked with Intel on IA-64, to release product in 1998

All believed EPIC would supplant RISC and CISC

Compaq and SGI gave up Alpha and MIPSMicrosoft and SUN etc developed OSes for it

• Data

Speculation, prediction, predication, and renaming

128 integer registers, 128 FP registers, 64 one-bit predicates, and eight branch registers

(20)

Intel P68

Intel Pentium 4, 2000

NetBurst microarchitecture

Pursue higher frequency, smaller IPC

Hyper Pipelined: 20-stage Willamette, 31-stage Prescott (vs. 10 in

P6)

Rapid Execution Engine: Two ALUs in the core are double-pumpedExecution Trace Cache, SSE2, L3-cache (Extreme Edition)

Hyper-Threading Technology

Prescott: 90nm, SSE3, HT, Intel-64 (64-bit), 2004

But performance worse than Northwood with similar clockDesigned to be 10GHz, only achieved 3.8GHz

TDP: Core-based:27W, Pentium 4 :115W, Pentium 4 M:88W

Abandoned in 2006:

High power consumption and heat intensity

(21)

AMD Opteron

First Release: April 22, 2003

First AMD 64-bit architecture

L1-Cache: 64 + 64 KB (Data + Instructions)

L2-Cache: 1024 KB, fullspeed

MMX, Extended 3DNow!, SSE, SSE2, AMD64

Socket 940, 800 MHz HyperTransport

Registered DDR SDRAM required, ECC possible

VCore: 1.50 V - 1.55 V

Max Power (TDP): 89 W

(22)

AMD Athlon64

First World X86/64 processor

L1-Cache: 64 + 64 KB (Data + Instructions)

L2-Cache: 1024 KB, fullspeed

MMX, Extended 3DNow!, SSE, SSE2, AMD64

Socket 940, 800 MHz HyperTransport (HT800)

Registered DDR-SDRAM required

VCore: 1.50/1.55 V

Power Consumption (TDP): 89 Watt max

(23)

Intel 64

Intel implementation of X86-64, the 64-bit extension of X86

ISA

AMD released spec in 2000, and first implementation in 2003, as a response to Itanium (was IA-64)

Intel adopted X86-64 due to AMD’s success over Itanium,

released first X86-64 processor in 2004

Different names: AMD64 (official AMD name), Intel 64 (official

Intel name), X86-64 or X64 (community names), etc.

Maintains 32-bit mode binary compatibility

• 64bit vs. 32bit

Bigger virtual space, wider operation, more registers

Not necessarily better performance, usually bigger code size

• X32: an ABI, not ISA, nor processor mode

(24)

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