\ * 1 T BRIDGE. Lampiran 1 Skema Rangkaian Gabungan Master. vcc VLCO GND. 10uH INDUCTOR 12V 2ENER R 100 R 12VR ZENER. .

(1)

VLCO GND

**\ * 1**

T BRIDGE

C '

V! VO

p^ 1(JU0uH1t)V

J

vcc

12V 2ENER

22

10uH INDUCTOR

660 R

12VR ZENER

. 12V j j l r Z6N6R

100 R

(OuH INDUCTOR

Lampiran 1

Skema Rangkaian Gabungan Master

(2)

Lanipiran 2

Skema Rangka: an Gabungan Slave

(3)

61 SOFTWARE UNTUK MASTER CONTROLLER

Org 50H Counter

Counter Counter Device_

_5ms _TimerO _Device Status Stack_Temp Alamat RS

DE_RE Jum1ah_

CheckJ Sw'rtchj Switch_

Device_

LCD

Device Status On Off ON OFF Failure PageDown Escape BackSpace Enter

Start:

Loop:

Org

Mov Lcall

Mov Lcall Inc Lcall Lcall

Ds Ds Ds Ds Ds Ds Bit Bit EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU EQU

000H

Stack_Temp,SP lnit_Hardware

DPTR,#PesanMenu_

KirimPesan LCD DPTR

Baris2 LCD KirimPesan LCD

1 1 1 1 1 1 P2.1 P1.0 03H 41H 42H 43H 41H 42H 43H 7AH 7BH 6BH 5AH

Utama

;Selanjutnya

;Main

;Turn OFF

;Turn ON

;Simpan Stack Pointer ke Stack Temporary

;lnisial Hardware

;Menu:

; Device Status

; - 1 . AII2. Slct

j

SaiahTekan_MenuUtama:

Jb INTO,* ;

Lcall AmbiiKarakter_Keyboard ;Tentukan All/Slct dari keyboard

;ALL Periksa Semua Status berurutan

Cjne A,#31 H,BukanPeriksa_SemuaStatus Lcall PeriksaSemua Status

;Selected, periksa channel pilihan BukanPeriksa_SemuaStatus:

Cjne A,#32H,SalahTekan_MenuUtama

(4)

Lcall PeriksaStatus_Piiihan Lcall Delay_1detik

Ajmp Start

62

PeriksaSemua_Status:

Mov Counter_Device,#31 H LoopPeriksa_SemuaStatus:

Lcall lnit_LCD

Lcall TampilkanDevice_Status Tunggu_Perintah:

Lcall AmbilPerintah_Keyboard Lcall Lakukan_Perintah Jnc Tunggu_Perintah

;Mulai dari device 1

;Tampilkan status slave

;Tunggu perintah dari keyboard

;Lakukan perintah

;Bukan Next atau Escape, tunggu

;Perintah selanjutnya

;Next! Device selanjutnya

;Deviceterakhir?

Inc Counter_Device Mov R7,Counter_Device

Cjne R7,#Jumlah_Device+31H LoopPeriksa_SemuaStatus; Bukan!

Lihat status

;Device

Ajmp PeriksaSemua_Status ;Kembali ke device 1 Lakukan_Perintah:

Cjne A,#Enter,BukanDevice_SwitchON ;

;ENTER: nyalakan device Lcail

Lcall Mov Cjne Lcall Mov Lcall Clr Ret Fai! ON:

Lcall Mov

Lcall Clr Ret

;BACKSPACE BukanDevice_

Cjne Lcall Lcall Mov Cjne Lcall Mov Lcall Clr

Turn_ON

AmbilDevice_Status A.Device Status A,#Device ON,Fail_ON lnit_LCD

DPTR,#Pesan_Sukses KirimPesan LCD C

lnit_LCD

DPTR,#Pesan_Error KirimPesan LCD C

: Device OFF .SwitchON:

A,#Backspace,BukanDv SwitchOFF Turn_OFF

Ambi!Device_Status A.Device Status

A,#Device OFF,Fail OFF lnit_LCD

DPTR,#Pesan_Sukses KirimPesan LCD C

;Kinm Perintah mengaktifkan

;Device

;Lihat status device

;Bila Tidak ON, maka device

;failure

;Bila ON maka device ON sukses

;

1

(5)

63

Ret Fail OFF:

Lcail Mov Lcall Clr Ret

lnit_LCD

DPTR,#Pesan_Error KirimPesan LCD C

;ESCAPE. Kembali ke menu utama BukanDv_SwitchOFF:

Cjne Ajmp Clr Ret

A,#Escape, BukanRetum Restart

C

;PG DN: Device Selanjutnya BukanReturn:

Cjne Setb Ret

Turn ON:

Lcall Setb Mov Lcall Mov Lcall Clr Ret Turn OFF:

Lcall Setb Mov Lcall Mov Lcail Clr Ret

PeriksaStatus Lcall "

Mov Lcall Jb

Lcall Mov

Lcatl Lcall Lcall Lcall Lcall

A,#Page Down,Tunggu Perintah C

Periksa Jalur DE_RE

A,Counter_Device Seria! Out

A,#Switch_ON Serial Out DE_RE

Periksa Jalur DE_RE

A,Counter_Device Serial Out

A,#Switch_OFF Serial Out DE_RE

Piiihan:

lnit_LCD

DPTR,#Pesan_Device KirimPesan LCD INTO,*

Ambi 1 Karakter_Keyboard Counter_Device,A

Kirim Karakter lnit_LCD

TampilkanDevice_Status AmbilPerintah_Keyboarcl Lakukan Perintah

(6)

64

Ret

TampilkanDevice_Status:

Mov Lcail Mov Lcall Mov Lcail Lcall Lcall Ret AmbilDevice

Lcall Setb Mov Lcall Mov Lcal!

Clr Tunggu ID:

Lcall Cjne Lcall Mov Cjne Mov Lcail Ret

DPTR,#Pesan_Device KirimPesanJ-CD A,Counter_Device Kirim Karakter ; A,#':'

Kirim_Karakter ; Ambi 1 De vice_Status Baris2_LCD

.Status:

Periksa Jalur

DE_RE ; A,Counter_Device Serial_Out

A,#Check_Status Serial Out

DE_RE

Serial_ln

A, Counter_Device, Tunggu..

Serial_ln

Device_Status,A

;Kinm Pesan Device ke LCD

i

;Kirim Nomor Device ke LCD

;Ambil Status Device

;Periksa jalur komunikasi

;Kirim Slave ID

;Kirim kode cek status

;

;Enable Receive

;Tunggu input dari slave

_ID ;Bukan respon dari slave yang dikirim, tunggu lagi

;Respon slave, ambil device .status

A,#Device ON.DeviceTidak ON ; DPTR,#Pesan_ON

KirimPesan_LCD

;Device ON, kirim pesan

;'ON' ke LCD

DeviceTidak_ON:

Cjne A,#Device_OFF,DeviceTidak_OFF Mov DPTR,#Pesan_OFF

Lcali KirimPesan_LCD Ret

DeviceTidak_OFF:

Mov DPTR,#Pesan_Failure Lcall KirimPesanjLCD Ret

Periksa_Jalur:

Push Mov Jalur_Sibuk:

Lcall Setb Periksa_RXD:

Jb Ajmp

TMOD TMOD,#21H

Reset_TimerO TRO

RXD,Periksa_TimerO Jalur Sibuk

;Timer 0 16 bit counter

;Tlmer 1 Serial Port

;Timer 0 aktif

;RXD tidak sibuk, pantau Timer 0

;RXD sibuk reset timer 0 dan tunggu

;RXD tidak sibuk

(7)

65

Periksa_TimerO:

Jbc TFO,Jalur_Bersih Ajmp Periksa_RXD Jalur_Bersih:

Clr TRO Pop TMOD Ret

Reset_TimerO:

Mov TH0,#00H Mov TLO,#OOH

Ret

;Timer 0 overlow, berarti jalur bersih

;Belum overflow, periksa jalur lagi

;Jalur bersih, matikan timer 0 dan

;kembali

AmbilPerintah_Keyboard:

Jb INTO,*

Lcall AmbilJKeyboard

Cjne A,#OEOH,BukanPgUpDn Jb INTO,*

Lcall Ambil_Keyboard Jb INTO,*

Lcall Ambil_Keyboard BukanPgUpDn:

Jb INTO,*

Lcall Ambil_Keyboard Jb INTO,*

Lcall Ambil_Keyboard Ret

Ambi I Karakter_Key board:

Push DPH Push DPL

;Tunggu clock dari keyboard

;Ambil data keyboard

;E0H, buang tiga scan code

;Buang Scan Code

;Ambil terakhir

;Simpan DPTR di Stack

LoopAmbil_KarakterKbd:

Mov DPTR,#AmbilKarakter_Selesai ;Simpan Label Ambil Karakter Push DPL ;selesai di Stack

Push DPH ; Jb INTO,*

Ljmp Keyboardjnterrupt

;Tunggu Clock Keyboard

;Lompat ke Keyboard Interrupt

AmbilKarakter_Selesai:

Jnc LoopAmbil_KarakterKbd Pop DPL

Pop DPH Ret

!nit_Keyboard:

Mov R0,#08H MOV !E,#80H Clr Shift_Flag SETB IE.0 RET

;Carry = 1 maka scan code

;karaktertelah diambil

;Ambil DPTR dari Stack

;Aktifkan Interrupt keyboard

;Matikan Shift Flag

(8)

66

Aimbil_Keyboard:

Push CLR JNB Mov

00H A INTO,*

R0,#08H Ambil Keyboard2:

JB MOV RR MOV JNB

Djnz Jb Jnb Jb Jnb Pop Setb Ret

INTO,*

C.P1.4 A A.7.C

INTO,*

RO.Ambil Keyboard2 INTO,*

INTO,*

OOH IE.0

Konversi_ScanCode Mov

Movc Ret Keyboard:

Clr Acall Cjne Jb Acall Ret AddrTable:

DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB

DPTR,#AddrTable ; A,@A+DPTR

IE.0

Ambil Keyboard

;Tunggu ada Interrupt keyboard

;Level high

;Ambil data dari P1.4 setiap

;kali interrupt keyboard transisi

;low

;Geser Acc A

;Simpan data di bit 7 Acc A

;Tunggu IntO high

;Lakukan 8x

;Buang Parity Bit

i

;Buang Stop Bit

Isi DPTR dengan alamat awal AddrTab

A,#OFOH,Kybd TidakLepas INTO,*

Ambil_Keyboard

00 0F9H 00

0F5H,0F3H,0F1H,0F2H, OOH

0FAH,0F8H,0F6H,0F4H 0C0H ;Tab (Special OOH

OOH

0C1H ;AltL (Special 0C2H ;ShiftL (Special OOH

0C3H ;CtrlL (Special

•q1"

00H,00H,00H 'zsaw2' OOH.OOH 'cxde43' 00H.00H

OFCH

Code)

Code) Code) Code

;Keyboard ditekan/dilepas

i

;Keyboard dilepas

;Function Key, FC = F12

;FA=F10

(9)

67

DB ' vftr5' DB OOH,OOH DB 'nbhgy6' DB OOH.OOH.OOH DB 'mju78' DB OOH.OOH

DB \kio09'

DB 00H.00H DB './l;p-'

DB OOH,OOH,OOH DB 2CH ; '

DB OOH DB '{=*

DB 0OH.0OH DB 0C5H DB 0C6H

DB OAH ;Enter DB ']'

DB OOH DB 'V

DB OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH DB 08H ;BackSpace

DB OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH DB ODH ;Esc

DB OOH

DB OFBH ; F u n c t i o n K e y F 1 1

DB OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH,OOH DB 0F7H ;Function Key

;Kembali ke posisi awal PosisiAwal_LCD:

Mov A,#02H Acall Kirim_Perintah Acall Deiay_LCD

Ret

KirimPesan_LCD:

Send_Loop:

Mov A,#00H Movc A,@A+Dptr Cjne A,#0FH,Send

Send:

Acall Kirim_Karakter Inc Dptr

Ajmp Send_Loop

lnit_LCD:

Setb RS Mov A,#30H Acall Kirim_Perintah Acall Delay_LCD

:Kirim 30H

(10)

68

Mov A,#30H

Acall Kirim_Perintah Acall Deiay_LCD

Mov Acal!

Acall Mov

Acall Acall Mov Acali Acall Mov Acali Acall Mov Acall Acall Mov Acall Acail Mov Acall Acall Mov Acall Acaii Ret Kirim_Perintah:

Mov Acali Acall Nop Ret Kirim_DataLCD

Swap Mov Nop Acall ret PulseE_Clock:

Push Mov Orl Mov Anl

A,#30H Kirim_Perintah Delay_LCD A,#20H

Kirim_Perintah Delay_LCD A,#2FH Kirim_Perintah Delay_LCD A,#08H Kirim_Perintah Delay_LCD A,#01H Kirim_Perintah

Delay_LCD A,#07H

Kirim_Perintah Delay_LCD A,#0EH Kirim_Perintah Delay_LCD A,#06H Kirim_Perintah De!ay_LCD

P2,#00H Kirim_DataLCD Kirim_DataLCD

A PO,A

PulseE_Clock

A A,#0A0H A,P2 P2,A A,#OFH

;Kirim 30H

;Send Init

;8x5 2lines

;Display ON

,Mode Increment Address

(11)

69

Mov P2,A Pop A Ret Kirim_Karakter:

Mov P2,#02H Acall Kirim_Datal_CD Acali Kirim_DataLCD Acail Delay_LCD Ret

Baris2_LCD:

Mov A,#0C0H Acall Kirim_Perintah Ret

Baris1_LCD:

Mov A,#02H Acall Kirim_Perintah Acall De!ay_LCD2

Ret Delay_LCD:

Push B Mov B,#06H Delay_LCD_Loop:

Push B

Acall Delay_LCD2 Pop B

Djnz B,Delay_LCD_Loop Pop B

Ret Delay_LCD2:

Mov B,#OFFH Djnz B,*

Ret Delay_1detik:

Mov Counter_5mS,#0200 Tunggu_1detik:

Acall Delay_5mS

Djnz Counter_5mS,Tunggu_1detik Ret

Delay_500mS:

Mov Counter_5mS,#0100 Tunggu_500mS:

Acall Delay_5mS

Djnz Counter_5mS,Tunggu_500mS Ret

Delay_100mS:

Mov Counter 5mS,#020

(12)

70

Init Hardware:

Mov Counter_TimerO,#OOH Clr

Clr Lcall Lcall Lcall Clr Ret lnit_Timer:

Mov Lcall Ret

DE_RE Shift_Flag lnit_Serial lnit_LCD lnit_Timer P1.5

TMOD,#21H Reset TimerO

;Receive RS485 Enable

;lnit Serial 9600 Bps

;lnitLCD

;inisial Timer

;Turn ON Backlight

Serial_ln:

Lcall Setb Clr Periksa Serial:

Reset_TimerO TRO

Rl

;Reset Timer 0

;Start Timer 0

;Clear Receive Flag

Jnb RI,Periksa_TimerO2 ;RI <> set-> periksa timer 0 Mov

Clr Mov

Lcall Ret

A,SBUF ;Ambil data serial TRO ;StopTimerO

Counter_TimerO,#OOH ; Reset Counter Overftow Timer 0 Reset_TimerO ;ResetTimerO

Periksa_TimerO2:

Jbc TF0,TannbahOverflow_Counter ;Timer 0 Overflow, Counter_timerO Ajmp Periksa_Serial

TambahOverflow_Counter:

Inc Counter_TimerO Mov R7,Counter_TimerO Cjne R7,#O20H,Periksa_Serial

;Komunikasi gagal

;Belum Overflow, periksa serial in

;Counter Timer 0 overflow 20x?

Restart:

Mov Clr Lcall Mov Lcall Mov Lcall Lcall Mov Lcall Lcall

Mov Mov Clr Subb

Counter Timer0,#00H TRO

lnit_LCD

DPTR,#Pesan_Device KirimPesan_LCD A, Counter_Device Kirim_Karakter Baris2_LCD

;Ya! Komunikasi gagal

;Stop Timer 0

;Kirim Pesan 'Device ... Kom Gagal

;ke LCD

f

i

DPTR,#PesanKomunikasi_Gagai ; KirimPesan_LCD

Delay_1detik

A,SP

B,Stack Temp C

A,B

;

;Delay 1 detik

;Ambil isi stack pointer

;Ambi! isi SP awal program yg disimpan

;di Stack Temp

(13)

71

Loop_Restart:

Pop B ;Lakukan Pop sebanyak SP-Stack_Temp Djnz A,Loop_Restart ;

Ajmp Start ;Loncat ke start

init_Serial:

MOV SCON,#52H ; Mode 1 Ren, Serial Mode 1 MOV TMOD,#20H ; T1 Mode 2

MOV TH1,#0FDH ; 9600 Baudrate MOV TCON,#040H ; T1 On, TO Off

MOV PCON,#00H ; RET

Serial_Out:

CLR Tl MOV SBUF.A JNB T l * RET Pesan_Device:

DB 'Device ',$0F PesanMenuJJtama:

DB 'Device Status',$OF DB ' 1 . All 2. Slct',$OF Pesan_

Pesan

Pesan_

ON:

DB OFF:

DB Failure:

~DB Switch:

"DB DB Error:

~DB

'ON',$0F

•OFF,$0F

'Failure',$OF

'CR:ON, BS:OFF',$0F 'ESCiBCK, TB:NXT,$0F

'Error',$OF Pesan_Sukses:

DB 'Sukses',$0F PesanKomunikasi_Gagal:

DB 'Kom Gagal'$0F

(14)

72 SOFTWARE UNTUK SLAVE

Org 50H Data

Counter_5ms KodeDevice_ON KodeDevice_OFF KodeDevice_Failure Check Status Switch ON Switch_OFF Ch1

CH2 SlaveJD

Ctrh Ctrl2 Det1 Det2

DE_RE Bit FlagDevice_OFF

Ds Ds EQU EQU EQU EQU EQU EQU EQU EQU EQU

Bit Bit Bit Bit T1 Bit

1 1 41H 42H 43H 41H 42H 43H 1H 2H 31H

P1.0 P1.2 P1.1 P1.3 0

;31H Slave I, 32 H Slave II, 33 H Slave

Org 000H Start:

Lcall lnit_Hardware Tunggu Perintah:

Lcall Cjne Lcall Cjne Acall Jb Ajmp

Serial_ln

A,#Slave_ID,Tunggu_Perintah SeriaHn

A,#Check_Status,BukanCheck_Status Periksa_Status

FlagDevice_OFF,SlaveDevice_OFF SlaveDevice ON

BukanCheck_Status:

Cjne A^SwitchJDN.Bukan^SwitchON Acall Turn_ON

Ajmp Tunggu_Perintah Bukan_SwitchON:

Cjne A,#S witch_O F F, Tunggu_Peri ntah Acall Turn_OFF

Ajmp Tunggu_Perintah SlaveDevice_ON:

Acall Laporan_ON Ajmp TungguJPerintah SlaveDevice OFF:

(15)

73

Acali Ajmp Periksa Status

Jb Clr Ret Periksa Det2:

Jb Clr Ret Device OFF:

Setb Ret

Turn ON:

Lcalt Acall Jnb C!r Setb Lcall Acall Jnb Setb Clr Lcall Acall Jnb Error:

Mov Lcall Ret Turn OFF:

Lcall Acall

Jb Setb Clr Lcall Acall Jb Clr Setb Lcall Acali

Jb Ajmp

Laporan_OFF Tunggu_Perintah

Det1,Periksa_Det2 FlagDevice_OFF

Det2,Device_OFF FlagDevice_OFF

FlagDevice_OFF

Delay_1 OOmS Periksa_Status

FlagDevice OFF.SudahTurn ON Ctrli

Ctr!2

Delay_100ms Periksa_Status

FlagDevice OFF.SudahTurn ON Ctrli

Ctrl2

FlagDevice_OFF,SudahTum_ON

Data,#KodeDevice_Failure Kirimdata_master

Delay_100mS Periksa_Status

FlagDevice OFF.SudahTurn OFF Ctrli

Ctrl2

Deiay_100ms Periksa_Status

FlagDevice OFF.SudahTurn OFF Ctrli

Ctri2

FlagDevice_OFF,SudahTurn_OFF Error

SudahTum OFF:

Acall Ret

Laporan_OFF

(16)

74

SudahTurn ON Acail Ret

Laporan_ON:

Mov Lcall Ret Laporan_OFF:

Mov Lcall Ret

lnit_Hardware:

Setb Setb Setb Setb Lcall Clr Ret

Init Serial:

MOV MOV MOV MOV MOV RET

Laporan_ON

Data,#KodeDevice_ON KirimData_Master

Data,#KodeDevice_OFF KirimData_Master

Ctrli ;Matikan Ctrl2 ;

Lampu

Det1 ;Detektor 1 sebagai input Det2 ;Detektor 2 sebagai input

Init Serial DE_RE

SCON,#52H TMOD,#20H TH1,#0FDH TCON,#040H

PCON,#OOH

KirimData Master:

Lcall Setb Mov

Lcall Mov Lcall Clr

Ret Serial Out:

CLR MOV JNB RET Serial In:

CLR JNB MOV

RET

Periksa Jalur DE RE A,#Slave_ID

Serial_Out A,Data

Serial Out DE_RE

Tl SBUF.A T!,*

Rl Rl,*

A.SBUF

Mode 1 Ren, Serial Mode 1 T1 Mode 2

9600 Baudrate T1 On, TO Off

(17)

75

Periksa_Jalur:

Push TMOD

Mov TMOD,#21 H ;Timer 0 16 bit counter

;Timer 1 Serial Port Jalur_Sibuk:

Lcall Reset_TimerO ;

Setb TRO ;Timer 0 aktif Periksa_RXD:

Jb RXD,Periksa_TimerO ;RXD tidak sibuk, pantau Timer 0 Ajmp Jalur_Sibuk ;RXDsibukresettimerOdantunggu

;RXDtidaksibuk Periksa_TimerO:

Jbc TFO,Jalur_Bersih ;Timer 0 overlow, berarti jalur bersih Ajmp Periksa_RXD ;Belum overflow, periksa jalur iagi Jalur_Bersih:

Clr TRO ;Jalur bersih, matikan timer 0 dan Pop TMOD ;kembati

Ret Reset_TimerO:

Mov TH0,#00H Mov TLO,#OOH

Ret Delay_1 detik:

Mov Counter_5mS,#0200 Tunggu_1detik:

Acall Delay_5mS

Djnz Counter_5mS,Tunggu_1detik Ret

Delay_500mS:

Acall Delay_5mS

Delay_100mS:

Acall Delay_5mS

Delay_75mS:

Acall Delay_5mS

(18)

76

Delay_5mS Push Mov Mov Mov Setb Tunggu 5mS:

Jbc Ajmp Sudah 5mS:

Clr Pop Ret

TMOD TMOD,#21H TH0,#0EDH TL0,#0FFH TRO

TF0,Sudah_5mS Tunggu_5mS

TRO TMOD

(19)

Lampiran 5

Tampak Depan Master

Tampak Belakang Master

(20)

Tampak Depan &lave

Tampak Belakang Slave

(21)

Features

• Compatible with MCS-51™ Products

• 4K Bytes of In-System Reprogrammable Flash Memory - Endurance: 1,000 Wrrte/Erase Cydes

• Fully Static Operation: 0 Hz to 24 MHz

• Three-tevel Program Memory Lock

• 128 x 8-bit Internal RAM

• 32 Programmable I/O Lines

• Two 16-bitTimer/Counters

• Six Interrupt Sources

• Programmable Serial Channel

• Low-power Idle and Power-down Modes

Description

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel's high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conven- tional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Hash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.

Pin Configurations

^PDIP

PU>C 1 P1.1 E 2

mcs

PWCS

PQFP/TQFP s<

w 3 ~

P1.5C P1.6 C 2

P1JSC7 P1.7C B HSTC9 10 11 12 13

(H5) P3.7 C XTAUI:

40 3VCC 39 ]PO.O(AD0l 38 1P0.1 (ADt) 37 1 P0J (AD2) 36 3 PO3 (AD3) 35 3 PO.'i (AD-1) 34 33 2 TO.6 (A06) 32 UP0.7(AD7}

31 3EM/PP 30 JALE/PHSB 2»

28 HP2-7(A15) 27 26 DP2i(AI3) 21 ]P2J(A11)

3 P2.1 (A9) 3P2.0(A8|

PLCC

(RXD) P3.0 C 5

(TXD) P3.1 C 7 (iNTB) P3.2 C 8 (INT1) P3.3 C 9 (TO) P 3 . 4 C

• * T • »-• * T- V U l l r f t ^ J

LJ iJ u LJ LJ LJ ITLI mT'LJ

<q N w r o O o T-, o* « —

Mk ^ft ^ ^ J ^V ^ V nT d.7 >«? M7

^ * Ci Oj D. £L D.

n n n

' © U) * P1.5C P1.6C P1.7C RSTC (RXD) P3.0 C

NCC

|TXD) P a i C (IMTO) P3.2 C 1MT1)P3JC

(T0)P3.4C (T1)P3.5C 7 6 9 10 11 12 13 14 15 16

CL fl. 2 > o. d a.

n n n n n n n

P3 cu «- >!j eo cy T -

^ r r T •«»•

o 0.n

39 38 37 36 35 34 33 32 31 30

s2 9

3 P 0 . 4 (AD4) 3 PO^ (AD5) 3 P0.6 (AD6) 1 P0.7 (AD7) 3 N C

D P2.6 (A14) 3 PEU5 (A13) U U U L J L J L J U U U L J L l

Q . Q - £ 2 : C > 0 . 0 . 0 . 0 . 0 . S S S ST

s. s. < < <

8-bit

Microcontroller with 4K Bytes

Flash AT89C51

R8V.O265G-O2/00

(22)

Block Diagram

GND

\LE/PROG EJ / V^{p p} RST

P0.0 - P0.7 P2.0 - P2.7

-H-m-H-i- nm-n

PORT 0 DRIVERS

RAM ADDR.

REGISTER RAM

PORT 2 DRIVERS

PORT 0 LATCH

B

REGISTER ACC

TMP2

PORT 2 LATCH

T i

FLASH

STACK POINTER

TMP1

ALU

PSW

TIMING AND CONTROL

INSTRUCnON REGISTER

INTERRUPT, SERIAL PORT, AND TIMER BLOCKS

PORT 1 LATCH

OSC

PORT 1 DRIVERS

PROGRAM ADDRESS REGISTER

BUFFER

PC INCREMENTER

PROGRAM

COUMTER 4 •

DPTR

PORT 3 LATCH

PORT 3 DRIVERS A ii A ik 4 ii • P1.0 - P1.7

nitm

P3.0 - P3.7

AT89C51

(23)

AT89C51

The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, on-chip osciilator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

Pin Description vcc

Supply voltage.

GND Ground.

PortO

Port 0 is an 8-bit open-drain bi-directional \IO port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high- impedance inputs.

Port 0 may also be configured to be the multiplexed low- order address/data bus during accesses to external program and data memory. In this mode PO has internal pullups.

Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. Extemal pullups are required during program verification.

Porti

Port 1 is an 8-bit bi-directional I/O port with intemal pullups.

The Port 1 output buffers can sink/source four TTL inputs.

When 1s are written to Port 1 pins they are puiled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled iow will source current (I,L) because of the internal pullups.

Port 1 also receives the low-order address bytes during Flash programming and verification.

Port2

Port 2 is an 8-bit bi-directional I/O port with internal pullups.

When 1s are written to Port 2 pins they are pulled high by the intemal pullups and can be used as inputs. As inputs,

Port 2 pins that are externally being pulled low will source current (I^IL) because of the intemal pullups.

Port 2 emits the high-order address byte during fetches from external program memory and during accesses to extemal data memory that use 16-bit addresses (MOVX @ DPTR). In this application, it uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ Rl), Port 2 emits the contents of the P2 Special Function Register.

Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

Port3

Port 3 is an 8-bit bi-directional I/O port with internal pullups.

When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are extematly being pulled low will source current (l^tL) because of the pullups.

Port 3 also serves the functions of various special features of the AT89C51 as listed below:

Port Pin P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7

Altemate Functions RXD (serial input port) TXD (serial output port) INTO (external interrupt 0) INT1 (external interrupt 1) T0 (timer 0 external input) T1 (timer 1 external input)

WR (external data memory wrile strobe) RD (extemal data memory read strobe)

Port 3 also receives some control signals for Flash programming and verification.

RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.

ALE/PROG

Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming.

In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE

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pulse is skipped during each access to external Data Memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

Program Store Enable is the read strobe to extemal program memory.

When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.

EA/VPP

External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.

Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.

EA should be strapped to Vc c for internal program executions.

This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-voltVpp.

XTAL1

lnput to the inverting oscillator amplifier and input to the internal dock operating circuit.

XTAL2

Output from the inverting oscillator amplifier.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be ieft

unconnected while XTAL1 is driven as shown in Figure 2.

There are no requirements on the duty cycle of the external clock signal, since the input to the intemal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.

Idle Mode

In idle mode, the CPU puts itself to sleep while all the on- chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.

It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to intemal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is temninated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

Figure 1. Oscillator Connections

XTAL2

XTAL1

GND

Note: C1,C2 =30pF± 10pFforCrystals

= 40 pF ± 10 pF for Ceramic Resonators

Status of External Pins During Idle and Power-down Modes

Mode Idle Idle Power-down Power-down

Program Memory Internal

External Internal External

ALE 1 1 0 0

PSEN 1 1 0 0

PORTO Data Float Data Float

PORT1 Data Data Data Data

PORT2 Data Address

Data Data

PORT3 Data Data Data Data

AT89C51

(25)

AT89C51

Figure 2. External Clock Drive Configuration

NC

EXTERNAL OSCILLATOR

SIGNAL

XTAL2

XTAL1

GND

Power-down Mode

In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instmction executed. The on-chip RAM and Special Function Regis-

Lock Bit Protection Modes

ters retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before Vc c

is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

Program Memory Lock Bits

On the chip are three lock bits which can be left unpro- grammed (U) or can be programmed (P) to obtain the additional features listed in the table below.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is pow- ered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is nec- essary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properiy.

Program Lock Bits

1 2

3 4

LB1 U P

P P

LB2 U U

P P

LB3 U U

u

p

Protectlon Type No program lock features

MOVC instructions executed from extemal program memory are disabled from fetching code bytes from internal memory, "EK is sampled and latched on reset, and further programming of the Flash is disabled

Same as mode 2, also verify is disabled

Same as mode 3, also external execution is disabled

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Programming the Flash

The AT89C51 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage (Vcc) program enable signa!. The low-voltage programming mode provides a convenient way to program the AT89C51 inside the users system, while the high-voltage programming mode is compatible with conventionat third- party Flash or EPROM programmers.

The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table.

Top-Side Mark

Signature

Vpp = 12V AT89C51 xxxx yyww (030H) = 1EH (031H) = 51H (032H) =F FH

VPP=5V AT89C51 xxxx-5 yyww (030H) = 1EH (031H)=51H (032H) = 05H The AT89C51 code memory array is programmed byte-by- byte in either programming mode. To program any non- blank byte in the on-chip Flash Mernory, \he entire memory must be erased using the Chip Erase Mode.

Programming Algorithm: Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table and Figure 3 and Figure 4. To program the AT89C51, take the following steps.

1. Input the desired memory location on the address lines.

2. Input the appropriate data byte on the data lines.

3. Activate the correct combination of controi signats.

4. Raise EA7vPP to 12V for the high-voltage programming mode.

5. Pulse ALE/PROG once to program a byte in the Rash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 1.5 ms.

Repeat steps 1 through 5, changing the address

and data for the entire array or until the end of the object file is reached.

Data Polling: The AT89C51 features Data Polling to indi- cate the end of a write cycie. During a write cycle, an attempted read of the last byte written will result in the com- plement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The lock bits cannot be verified directly. Verification of the lock bits is achieved by observing that their features are enabled.

Chip Erase: The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all "1"s. The chip erase operation must be executed before the code memory can be re-programmed.

Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows.

(030H) = 1EH indicates manufactured by Atmel (031H) = 51H indicates 89C51

(032H) = FFH indicates 12V programming (032H) = 05H indicates 5V programming

Programming Interface

Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self- timed and once initiated, will automatically time itself to completion.

All major programming vendors offer worldwide support for the Atmel microcontroller series. Please contact your local programming vendor for the appropriate software revision.

AT89C51

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AT89C51

Flash Programming Modes

Mode

Write Code Data

Read Code Data

Write Lock Bit-1

Bit-2

Bit-3

Chip Erase

Read Signature Byte

RST H

H H

H

PSEN L

L L

L

ALE/PROG

H

- ^ -

- ^

~ ^ ~

(1)

H

EA/Vpp H/12V

H H/12V

H/12V

H

P2.6 L

L H

H

L

P2.7 H

L H

H

L

P3.6 H

H H

L

H

L

P3.7 H

H H

L

L Note: 1. Chip Erase requires a 10 ms PROG pulse.

Figure 3. Programming the Flash

AT89C51 ADDR. AO - A7

OOOOH/OFFFH A8 - A11

SEE FLASH PROGRAMMING-

MODES TABLE

3-24 MHz_[_ J-

P1 vc c

P2.0 - P2.3 PO P2.6

P2.7 P3.6 P3.7 XTAL2

ALE

EA

XTAL1 GND

RST PSEN

+5V

PGM DATA

PROG

Figure 4. Verifying the Flash

AT89C51

+5V

o

ADDR. AO - A7 OOOOH/OFFFH

A8 - A11

SEE FLASH PROGRAMMING-

MODES TABLE

3-24 MHz

i

P1 vc c

P2.0 - P2.3 PO P2.6

P2.7 P3.6 P3.7 XTAL2

ALE

EA

XTAL1 GND

RST PSEN

PGM DATA

• (USE 10K PULLUPS)

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Flash Programming and Verification Waveforms - High-voltage Mode (V

p p

= 12V)

P1.0 - P1.7 P2.0 - P2.3

PORT 0

ALBPROG

EA/V_pp

(ENABLE) P3.4 (RDY/BSY)

W G L

/

PROGRAMMING ADDRESS

i

( DATA IN '}

\

^DVGL *GHDX

VP P j

* *EHSH

''GHBL *

•*—H

w

*GHSL

\LOGIC 1 LOGIC 0

tE L Q V_

>

BUSY

Vc

VER1FICATION ADDRESS _{_y}

s DATA OUT ,

1 K 1

* %HC5Z

' REACV

Flash Programming and Verification Waveforms - Low-voltage Mode (V

PP

= 5V)

P1.0 - P1.7 P2.0 - P2.3

PORT 0

ALE/PROG

EA/VPp

P2.7 (ENABLE)

P3.4 (RDY/BSY)

W G L

^SHGL

• '

PROGRAMMING ADDRESS ;

1

( DATA IN

4 — •

w w

* ^GLGH *"

/

* *EHSH

^GHBL *•

4 — •

VERIFICATION

w

LOGIC 1 LOGIC 0

<-

BUSY

V

^c

ADDRESS \ /

"* W Q V

C DATA OUT ^

•

-r

•" READY

AT89C51

(29)

AT89C51

Flash Programming and Verification Characteristics

TA = 0°C to 70°C, Symbol

1PP(1)

1/tcLCL W G L

*GHAX

*DVGL

WlDX

*EHSH

^SHGL

W

¹

»

*GLGH

*AVQV

*ELQV

^EHOZ

WiBL

Vcc = 5.0±10%

Parameter

Programming Enable Voltage Programming Enable Current Oscillator Frequency Address Setup Xo PROG Low Address Hold After PROG Data Setup to PROG Low Data Hold After PROG P2.7 (ENABLE) High to VP P

VP P Setup to PROG Low Vp p Hold Afler PROG PROG Width Address to Data Valid ENABLE Low to Data Valid Data Float After ENABLE PROG High to BUSY Low Byte Write Cycle Time

Min 11.5

3 4 8 tC L C L

48tcLCL 4 8 tC L C L

4 8 t cL C L

4 8 tC L C L

10 10 1

0

Max 12.5 1.0 24

110 4 8 tC L C L

4 8 tC L C L

1.0 2.0

Units

V mA WIHz

ps

ms Note: 1. Only used in 12-volt programming mode.

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Absolute Maximum Ratings*

Operating Temperature -55°Cto +125°C Storage Temperature -65°Cto+150°C Vottage on Any Pin

with Respect to Ground -1.0Vto+7.0V Maximum Operating Voltage 6.6V DC Output Current 15.0 mA

'NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absotute maximum rating conditions for extended periods may affect device reiiability.

DC Characteristics

TA = -40°C to 85°C, Vc c = 5.0V ± 20% (unless otherwise noted)

Symbol

v,L1 V,H VP H, V0L V0L1

V0H

VOHI

I|L

k

'u RRST C|O

loc

Parameter Input Low-vottage Input Low-voltage (EA) Input High-voltage Input High-voltage

Output Low-voltage01 (Ports 1,2,3) Output Low-voltage⁽¹⁾

(Port 0, ALE, PSEN)

Output High-voltage (Ports 1,2,3, ALE.PSEN)

Oirtptrt High-votage (Port 0 in External Bus Mode)

Logical 0 Input Current (Ports 1,2,3) Logical 1 to 0 Transition Current (Ports 1,2,3)

Input Leakage Current (Port 0, EA) Reset Pull-down Resistor Pin Capacitance

Power Supply Current

Power-down Mode(2)

Condition (Except EA)

(ExceptXTAL1,RST) (XTAL1,RST) I^{O L}= 1.6 mA

I^{O L} = 3.2 mA

IO H = -60 (JA, VGC = 5V ± 10%

I^{O H} = -25 (JA lO H = -10pA

I^{O H} = -800 pA, V^{c c} = 5V ± 10%

I^{O H} = -300 |iA IO H = -80 ixA V,N = 0.45V

V,^N = 2V, VCC = 5 V ± 1 0 %

0.45 < Vl N < Vc c

Test Freq. = 1 MHz, TA = 25°C ActiveMode, 12MHz IdleMode, 12MHz V^{c c} = 6V V^CC = 3V

Min -0.5 -0.5 0.2VCC+0.9

0.7 Vc c

2.4 0.75 Vc c

0.9 Vc c

2.4 0.75 Vo c

0.9 Vcc

50

Max 0.2 Vc c-0.1 0.2 Vc c - 0.3 Vcc+0.5 Vcc+0.5 0.45 0.45

-50

-650

±10 300 10 20 5 100 40

Units V V V V V V V V V V V V HA HA HA Kil PF mA mA MA HA Noies: 1. Under steady state (non-transient) conditions, IO|_ must be externally limited as follows:

Maximum IOL per port pin: 10 mA Maximum IOL per 8-brt port: Port 0:26 mA Ports1,2, 3:15mA

Maximum total lOL1br all output pins: 71 mA

If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions.

2. Minimum Vc c for Power-down is 2V.

10

AT89C51

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AT89C51

AC Characteristics

Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other outputs = 80 pF.

External

Symbot

1/tcLCL 'LHLL

*LLAX

laiv

'LLPL VLPH tpLIV

Wix WlZ VxAV WlV

'PLAZ

'RLRH

WwH

^RHDX 'RHOZ

^LLDV

WDV

*LLWL 'AVWL

*QVWX

lQVWH

lWHGX

'RLAZ

^WHLH

Program and Data Memory Characteristics

Parameter

Oscillator Frequency ALE Pulse Width

Address Valid to ALE Low Address Hold Afler ALE Low ALE Low to Valid Instruction In ALE Low to PSEN Low PSEN Pulse Width

PSEN Low to Valid Instruction In Input Instruction Hold After PSEN Input Instruction Float After PSEN PSENtoAddressValid

Address to Valid Instruction In PSEN Low to Address Float RD Pulse Width

WR Pulse Width RD Low to Valid Data In Data Hold After RD DataFloat AfterRD ALE Low to Valid Data In Address to Valid Data In ALE Low to RD or WR Low Address to W3 or WR Low Data Valid to WR Transition DataValidtoWRHigh DataHoldAfterWR RD Low to Address Float RD or WR High to ALE High

12 MHz Oscillator Min

127 43 48

43 205

0

75

400 400

0

200 203 23 433 33

43

Max

233

145

59

312 10

252

97 517 585 300

0 123

16 to 24 MHz Oscillator Min

0

2tCLCL-40 tcLCL'13 tcLCL-20

tCLCL"'l3 3 tC L C L- 2 0

0

t Q

^CLCL"0

6 tC L C U- 1 0 0 6 tC L C L- 1 0 0

0

3tcLCL"50 4t^{C L}CL-75 tcLCL-20 7 t^{C L C L}- 1 2 0

tcLCL-20

Max 24

4 t^{C L C L}- 6 5

3tcLCL-45

«CLCL-10

5 tCLCL"5 5

10

StcLCL'^O

2tcLCL'28 8 tC L C L- 1 5 0 9 tC L C L- 1 6 5

3 tC L C L +5 0

0

tcLCL+25

Units MHz

ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns

11

(32)

External Program Memory Read Cycle

ALE

PSEN

PORTO

PORT2

VHLL

lAVLL

lLLAX

lLLPL

A0-A7

*LUV 'PLIV

-HtPLPH

lPLAZ

WlZ

lPXIX

INSTR IN A0-A7

lAVIV

A8-A15 A8 - A15

External Data Memory Read Cycle

ALE

PSEN

RD

PORT 0

PORT 2

lAVLL"

lLLDV

lLLWL

^RLAZ

AO - A7 FROM Rl OR DPL,

SWWL

• t ,RLHH"

•AVDV

-t,_WHLH

RHDZ

- A7 FROM INSTR IN

P2.0 - P2.7 OR A8 - A15 FROM DPH X A8 - A1S FROM PCH

12

AT89C51

(33)

AT89C51

External Data Memory Write Cycle

ALE

PSEN

WR

PORT 0

PORT 2

lLHLL"~

'AVLL"

t,_LLWL

lLLAX

AO - A7 FROM Rl OR DPL

VWWL

•—W.WH "

V H L H

DATA OUT

lWHQX

>Q<AO - A7 FROM PCL>^INSTR IN

P2.0 - P2.7 OR A8 - A15 FROM DPH X A 8 - A 1 5 FROM PCH

External Clock Drive Waveforms

Vc c - 0.5V

0.45V

External Clock Drive

Symbol 1tcLCL

*CLCL

'cHCX

*CLCX

^CLCH

tcHCL

Parameter

Osciliator Frequency Clock Period High Time Low Time Rise Time Fall Time

Min 0 41.6

15 15

Max 24

20 20

Untts MHz

ns ns ns ns ns

13

(34)

Serial Port Timing: Shift Register Mode Test Conditions

(Vcc = 5.0 V + 20%; Load Capacitance = 80 pF)

Symbol

txLXL

*QVXH

txHQX

txHDX

^XHDV

Parameter

Serial Port Clock Cycle Time

Output Data Setup to Clock Rising Edge Output Data Hold After Clock Rising Edge Input Data Hoid After Ciock Rising Edge Clock Rising Edge to Input Data Valid

12 MHz Osc Min

1.0 700

50 0

Max

700

Variable Osclllator Min

12t^CLCL 10tCLCL-133

2tCLCL-H7 0

Max

10tCLCL-133

Units

MS ns ns ns ns

Shift Register Mode Timing Waveforms

INSTRUCTION ALE CLOCK

,WRITE TO SBUF, OUTPUT DATA

i CLEAR Rl ,

INPUT DATA SETI

AC Testing Input/Output Waveforms

(1)

Float Waveforms-

Vc c- 0.5V

0.45V

Vc c + 0.9V TEST POINTS

\ _ 0 . 2 V^,- 0.1 V

LOAD+

'LOAD Timing Reference

Points

/ VQ L+ 0.1 v

Note: 1. AC Inputs during testing are driven at Vc c - 0.5V fora logic 1 and 0.45V for a logic 0. Timing measurements are made a\ V!H min. for a logic 1 and VIL max. for a logic 0.

Note: 1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when 100 mV change from the loaded VOH/VOL level occurs.

14

AT89C51

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AT89C51

Ordering

Speed (MHz) 12

16

20

24

Information

Power Supply 5V ± 20%

5V + 20%

5V ± 20%

Ordering Code AT89C51-12AC AT89C51-12JC AT89C51-12PC AT89C51-12OC AT89C51-12A1 AT89C51-12J1 AT89C51-12PI AT89C51-12QI AT89C51-16AC AT89C51-16JC AT89C51-16PC AT89C51-16QC AT89C51-16A!

AT89C51-16JI AT89C51-16PI AT89C51-16QI AT89C51-20AC AT89C51-20JC AT89C51-20PC AT89C51-20QC AT89C51-20AI AT89C51-20JI AT89C51-20PI AT89C51-2OQ1 AT89C51-24AC AT89C51-24JC AT89C51-24PC AT89C51-24QC AT89C51-24Ai AT89C51-24JI AT89C51-24PI AT89C51-24QI

Package 44A 44J 40P6 44Q 44A 44J 40P6 44Q 44A 44J 40P6 44Q 44A 44J 40P6 44Q 44A 44J 40P6 44Q 44A 44J 40P6 44Q 44A 44J 40P6 44Q 44A 44J 40P6 44Q

Operation Range Commercial (0°C to 70°C)

Industriai {-40°C to 85°C)

Commercial (0°C to 70°C)

Industrial (-40°C to 85°C)

Commercial (0°Cto70°C)

Industrial (-40°Cto85°C)

Commercial (0°C to 70°C)

Industrial (-40°C to 85°C)

Package Type 44A

44J 40P6 44Q

44-lead, Thin Plastic Gull Wing Quad Flatpack (TQFP) 44-lead, Plastic J-leaded Chip Carrier (PLCC)

40-lead, 0.600' Wide, Plastic Dual Inline Package (PDIP) 44-lead, Plastic Gull Wing Quad Flatpack (PQFP)

15

(36)

Packaging Information

44A, 44-lead, Thin (1.0 mm) Plastic Gufl Wing Quad Flatpack (TQFP)

Dimensions in MUIimeters and (Inches)*

JEDEC STANDARD MS-026 ACB

PIN 11D —

0.80(0X31) BSC -

H "4 ~7C/f\ ACQ\ " ^ ^1.75(0.468)

10.10(0394) 9.90(0.386)

1.20(0.047) MAX 0.20(.008)

0.75(0.030) 0.15 0.45(0.018) 0.05(0.002) "

Controlling dimension: millimeters

44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters)

JEDEG STANDARD MS-018 AC

.045(1.14) X 45" PIN NO. 1 ,IDENT1FY

.026(.660) i C J-c

T

^c

.050(1JS7)TYP'

j . 656(16.7),

.045(1.14) X 3 o ; - 4S; m a ( - 3 0 5 )

.008U03)

3.650(16.5)SQ

.695(17.7), .685(17.4)SQ

\ .500(12.7) REFSQ

.630(16.0) if .590(15.0)

•021 (.533) .013(^30)

•043(1.09)

"" .020(.508)

• 120(^05)

"* .090(2.29) .180(4.57) .165(4.19)

.022(^59) X 45" MAX (3X)

40P6, 40-lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)

Dimensions in Inches and (Millimeters)

44Q, 44-lead, Plastic Quad Flat Package (PQFP) Dimensions in Millimeters and (Inches)*

JEDEC STANDARD MS-022 AB

2.07(52.6) 2.04(51.8) '

PIN 1 ID — ,

0.80 (0,031) BSC -

, 13.45 ( p 12.95 (0306)

0.50 (0.020) 0.35 (0.014)

.110(2.79) .090(2.29)

•012(305) .008(^03)

h

•065(1.65) .041(1.04)

.014(.356)

•630(16.0)

r

•690(17.5)

".610(15.5)

2^45 (0.096) MAX

<— 0.25 (0.010) MAX

Controlling dimension: millimeters