IV. Impact of ionizing irradiation on 1/f noise
4.3 Conclusions
In this chapter, the influence of ionizing irradiation on 1/f noise was discussed. 1/f noise was analyzed for room temperature and for cryogenic and elevated temperatures. Large increases are observed in post-irradiation low-frequency noise, accompanied by prominent random-telegraph noise. The gate-voltage dependence of the noise indicates that the defect-energy distributions of as-processed bulk devices considered in this study generally increase towards the conduction band, while that of as-processed SOI devices generally increase towards midgap, the summary of β is provided in Table II. The low-frequency noise in the bulk devices is attributed to oxygen vacancies in the gate dielectric and H+ shutting in the near-interfacial oxides. For the SOI devices, significant contributions from defects in the buried oxide are also evident. These results provide insight into the nature, density, and energy distributions of defects in highly-scaled, as- processed and irradiated, bulk and SOI devices.
35
TABLEII
AVERAGE Β VALUES FOR SOI AND BULK FINFETS
SOI FinFETs
Fin width, nm 10 20 40
Pre-rad 2.6±0.4 3.0±0.5 3.2±0.2
Post-rad 2.4±0.6 2.9±0.8 4.05±0.03
BULK FinFETs
Fin width, nm 10 20 40
Pre-rad 1.3±0.5 2.0±0.6 1.3±0.1
Post-rad 2.3±0.2 1.6±0.3 2.4±0.1
36 CONCLUSIONS
Highly-scaled bulk and SOI FinFETs demonstrate enhanced degradation under ionizing irradiation due to increased leakages and the greater effects of single prominent defects.
Net positive oxide-trap charge in the BOX and interface and border traps in the gate dielectric are found to contribute to threshold voltage shifts for SOI devices. Trapped charges in the STI have the most significant effects on the TID response for bulk devices. Similar trends with fin width are observed in both bulk and SOI devices as found in longer-channel devices, with enhanced charge trapping in the shortest- and narrowest-channel devices for bulk FinFETs, and in the shortest and widest-channel devices for SOI FinFETs.
Large increases are observed in post-irradiation low-frequency noise, accompanied by random-telegraph noise. The random telegraph noise results from the generation of individual/small numbers of defects, which have greater relative effects on smaller devices than larger devices. The gate-voltage dependence of the noise is consistent with non-uniform defect- energy distribution, specifically, it indicates that the defect-energy distributions of as-processed bulk devices considered in this study generally increase towards the conduction band, while that of as-processed SOI devices generally increase towards midgap. The low-frequency noise in these devices is attributed to oxygen vacancies in the gate dielectric and H+ shutting in the near- interfacial oxide.
FinFET technology is an intermediate step on the road to microelectronics miniaturization.
At the scale of devices studied in this work it slowly loses the benefits of enhanced gate control due to fringing fields caused by small dimensions, band-to-band tunneling caused by radiation- induced charge, and the increased impact of single defects in the near interfacial region due to narrow and short channel effects. It requires further advancements to better withstand TID exposure for 30-nm devices or it will be replaced by more promising technological solutions.
37 REFERENCES
[1] D. M. Fleetwood et al., “Low-frequency noise and defects in copper and ruthenium resistors,” Appl. Phys.
Lett., vol. 114, no. 2, May 2019.
[2] P. Wang et al., “1/f noise in as-processed and proton-irradiated AlGaN/GaN HEMTs due to carrier number fluctuations,” IEEE Trans. Nucl. Sci., vol. 64, no. 1, pp. 181–189, Jan. 2017.
[3] L. K. J. Vandamme, R. Alabedra, and M. Zommiti, “1/f noise as a reliability estimation for solar cells,”
Solid State Electron., vol. 26, no. 7, pp. 671–674, 1983.
[4] A. A. Balandin, “Review of the low-frequency 1/f noise in graphene devices,” Nat. Nanotechnol., vol. 8, no.
8, p. 549, 2013.
[5] P. Wang et al., “Radiation-induced charge trapping and low-frequency noise of graphene transistors,” IEEE Trans. Nucl. Sci., vol. 65, no. 1, pp. 156–163, 2017.
[6] D. M. Fleetwood, “1/f noise and defects in microelectronic materials and devices,” IEEE Trans. Nucl. Sci., vol. 62, no. 4, pp. 1462–1486, Aug. 2015.
[7] P. V. V. Jayaweera, A. G. U. Perera, and K. Tennakone, “Why Gratzel’s cell works so well,” Inorganica Chim. Acta, vol. 361, no. 3, pp. 707–711, 2008.
[8] Y. M. Ding, D. D. Misra, and P. Srinivasan, “Flicker noise performance on thick and thin oxide finfets,”
IEEE Trans. Electron Devices, vol. 64, no. 5, pp. 2321–2325, 2017.
[9] E. Simoen, R. Ritzenthaler, T. Schram, H. Arimura, N. Horiguchi, and C. Claeys, “On the low-frequency noise of high-κ gate stacks: what did we learn?,” 2018 14th IEEE Int. Conf. Solid-State Integr. Circuit Technol. ICSICT 2018 - Proc., no. 1, pp. 1–4, 2018.
[10] Z. Çelik-Butler and M. Ye, “Prediction of electromigration failure in W/Al-Cu multilayered metallizations by 1/f noise measurements,” Solid State Electron., vol. 35, no. 9, pp. 1209–1212, 1992.
[11] L. K. J. Vandamme, “Noise as a diagnostic tool for quality and reliability of electronic devices,” IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 2176–2187, 1994.
[12] S. Beyne, K. Croes, I. De Wolf, and Z. Tokei, “1/f noise measurements for faster evaluation of electromigration in advanced microelectronics interconnections,” J. Appl. Phys., vol. 119, no. 18, 2016.
[13] E. G. Ioannidis, S. Haendler, J. P. Manceau, C. A. Dimitriadis, and G. Ghibaudo, “Impact of dynamic variability on the operation of CMOS inverter,” Electron. Lett., vol. 49, no. 19, pp. 1214–1216, 2013.
[14] J. H. Scofield and D. M. Fleetwood, “Physical basis for nondestructive tests of MOS radiation hardness,”
IEEE Trans. Nucl. Sci., vol. 38, no. 6, pp. 1567–1577, Dec. 1991.
[15] C. D. Liang et al., “Defects and low-frequency noise in irradiated black phosphorus MOSFETs with HfO2
gate dielectrics,” IEEE Trans. Nucl. Sci., vol. 65, no. 6, pp. 1227–1238, Jun. 2018.
[16] D. M. Fleetwood, “Border traps and bias-temperature instabilities in MOS devices,” Microelectron. Reliab., vol. 80, no. 1, pp. 266–277, Jan. 2018.
[17] D. M. Fleetwood, “Evolution of total ionizing dose effects in MOS devices with Moore’s law scaling,”
IEEE Trans. Nucl. Sci., vol. 65, no. 8, pp. 1465–1481, Aug. 2018.
[18] F. Faccio and C. Giovanni, “Radiation-induced edge effects in deep submicron CMOS transistors,” IEEE Trans. Nucl. Sci., vol. 52, no. 6, pp. 2413–2420, 2005.
[19] D. Hisamoto et al., “Folded-channel MOSFET for deep-sub-tenth micron era,” Tech. Dig. - Int. Electron Devices Meet., no. May 2015, pp. 1032–1034, 1998.
[20] D. Hisamoto et al., “FinFET - a self-aligned double-gate MOSFET scalable to 20 nm,” IEEE Trans.
Electron Devices, vol. 47, no. 12, pp. 2320–2325, 2000.
[21] E. J. Nowak, I. Aller, T. Ludwig, and K. Kim, “Turning silicon on its edge,” IEEE Circuits Devices Mag., 2004.
[22] H. Kawasaki et al., “Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond,” 2009 IEEE Int. Electron Devices Meet., pp. 289–292, 2009.
[23] M. Ichihashi, Y. Woo, M. Ahosan, U. Karim, V. Joshi, and D. Burnett, “10t differential-signal SRAM design in a 14-nm FinFET technology for high-speed application,” in 2018 31st IEEE International System- on-Chip Conference, 2018, pp. 322–325.
[24] W. Shin, S. Callender, S. Pellerano, C. Hull, and I. Labs, “A compact 75 GHz LNA with 20 dB gain and 4 dB noise figure in 22nm FinFET CMOS technology,” 2018 IEEE Radio Freq. Integr. Circuits Symp., pp.
284–287, 2018.
[25] M. Gaillardin, P. Paillet, V. Ferlet-Cavrois, O. Faynot, C. Jahan, and S. Cristoloveanu, “Total ionizing dose
38
effects on triple-gate FETs,” IEEE Trans. Nucl. Sci., vol. 53, no. 6, pp. 3158–3165, Dec. 2006.
[26] F. El Mamouni et al., “Fin-width dependence of ionizing radiation-induced subthreshold-swing degradation in 100-nm-gate-length FinFETs,” IEEE Trans. Nucl. Sci., vol. 56, no. 6, pp. 3250–3255, 2009.
[27] J. Riffaud et al., “Investigations on the geometry effects and bias configuration on the TID response of nMOS SOI tri-gate nanowire field-effect transistors,” IEEE Trans. Nucl. Sci., vol. 65, no. 1, pp. 39–45, 2018.
[28] I. Chatterjee, “Geometric dependence of the total ionizing dose response of FinFETs,” Vanderbilt Univ., 2014.
[29] J. J. Song et al., “Fin width and bias dependence of the response of triple-gate MOSFETs to total dose irradiation,” IEEE Trans. Nucl. Sci., vol. 58, no. 6, pp. 2871–2875, 2011.
[30] J. P. Colinge et al., “Radiation dose effects in trigate SOI MOS transistors,” IEEE Trans. Nucl. Sci., vol. 53, no. 6, pp. 3237–3241, 2006.
[31] E. Simoen et al., “Radiation effects in advanced multiple gate and silicon-on-insulator transistors,” IEEE Trans. Nucl. Sci., vol. 60, no. 3, pp. 1970–1991, 2013.
[32] M. Gaillardin, P. Paillet, V. Ferlet-Cavrois, S. Cristoloveanu, O. Faynot, and C. Jahan, “High tolerance to total ionizing dose of Ω -shaped gate field-effect transistors,” Appl. Phys. Lett., vol. 88, no. 22, p. article no.
223511, 2006.
[33] I. S. Esqueda et al., “Modeling of ionizing radiation-induced degradation in multiple gate field effect transistors,” Proc. Eur. Conf. Radiat. its Eff. Components Syst. RADECS, vol. 58, no. 2, pp. 2–6, Apr. 2009.
[34] I. Chatterjee et al., “Geometry dependence of total-dose effects in bulk FinFETs,” IEEE Trans. Nucl. Sci., vol. 61, no. 6, pp. 2951–2958, 2014.
[35] S. Put, E. Simoen, N. Collaert, C. Claeys, M. Van Uffelen, and P. Leroux, “Geometry and strain dependence of the proton radiation behavior of MuGFET devices,” IEEE Trans. Nucl. Sci., vol. 54, no. 6, pp. 2227–
2232, 2007.
[36] S. Put, E. Simoen, M. Jurczak, M. Van Uffelen, P. Leroux, and C. Claeys, “Influence of fin width on the total dose behavior of p-channel bulk MuGFETs,” IEEE Electron Device Lett., vol. 31, no. 3, pp. 243–245, 2010.
[37] V. Kilchytska et al., “Total-dose effects caused by high-tnergy neutrons and gamma-rays in multiple-mate FETs,” IEEE Trans. Nucl. Sci., vol. 57, no. 4, pp. 1764–1770, Aug. 2010.
[38] P. G. D. Agopian, J. A. Martino, D. Kobayashi, E. Simoen, and C. Claeys, “Impact of proton irradiation on strained triple gate SOI p- and n-MOSFETs,” in 2011 12th European Conference on Radiation and Its Effects on Components and Systems, pp. 7–10.
[39] F. El-Mamouni et al., “Heavy-ion-induced current transients in bulk and SOI FinFETs,” IEEE Trans. Nucl.
Sci., vol. 59, no. 6, pp. 2674–2681, 2012.
[40] I. Chatterjee, E. X. Zhang, B. L. Bhuva, and D. M. Fleetwood, “Length and fin number dependence of ionizing radiation-induced degradation in bulk finFETs,” 2013 IEEE Int. Reliab. Phys. Symp., p. SE.8.1- SE.8.6, 2013.
[41] G. X. Duan et al., “Bias dependence of total tonizing dose effects in SiGe-MOS FinFETs,” IEEE Trans.
Nucl. Sci., vol. 61, no. 6, pp. 2834–2838, 2014.
[42] E. X. Zhang et al., “Total ionizing dose effects on strained Ge pMOS FinFETs on bulk Si,” IEEE Trans.
Nucl. Sci., vol. 64, no. 1, pp. 226–232, 2017.
[43] J. Riffaud et al., “TID response of pMOS nanowire field-effect transistors: geometry and bias dependence,”
IEEE Trans. Nucl. Sci., vol. 65, no. 8, pp. 1525–1531, 2018.
[44] H. Hughes et al., “Total ionizing dose radiation effects on 14 nm FinFET and SOI UTBB technologies,” in IEEE Radiation Effects Data Workshop, 2015.
[45] M. P. King et al., “Analysis of TID process, peometry, and bias bondition dependence in 14-nm FinFETs and implications for RF and SRAM performance,” IEEE Trans. Nucl. Sci., vol. 64, no. 1, pp. 285–292, Jan.
2017.
[46] M. G. C. De Andrade, J. A. Martino, M. Aoulaiche, N. Collaert, E. Simoen, and C. Claeys, “Investigation of Bulk and DTMOS triple-gate devices under 60 MeV proton irradiation,” Microelectron. Reliab., vol. 54, no.
11, pp. 2349–2354, 2014.
[47] E. Simoen et al., “Study of neutron irradiation effects on SOI and strained SOI MuGFETs assessed by low- frequency noise,” ECS Trans., vol. 31, no. 1, pp. 43–50, Oct. 2010.
[48] J. B. Johnson, “The schottky effect in low frequency circuit,” Phys. Rev, vol. 26, pp. 71–85, 1925.
[49] A. L. McWhorter, “1/f noise and germanium surface properties,” in Semiconductor Surface Physics,
39
Philadelphia, PA, USA: Univ. Pennsylvania Press, 1957, pp. 207–228.
[50] P. Dutta and P. M. Horn, “Low-frequency fluctuations in solids: 1/f noise,” Rev. Mod. Phys., vol. 53, pp.
497–516, 1981.
[51] D. M. Fleetwood, P. S. Winokur, R. A. Reber, T. L. Meisenheimer, J. R. Schwank, M. R. Shaneyfelt,
“Effects of oxide traps, interface traps, and ‘border traps’ on metal-oxide-semiconductor devices,” J. Appl.
Phys., vol. 73, no. 10, pp. 5058–5074, 1993.
[52] S. Christensson, I. Lundström, and C. Svensson, “Low frequency noise in MOS transistors - I,” Solid State Electron., vol. 11, no. 9, pp. 797–812, 1968.
[53] M. J. Kirton and M. J. Uren, “Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/ƒ) noise,” Adv. Phys., vol. 38, no. 4, pp. 367–468, 1989.
[54] J. H. Scofield and D. M. Fleetwood, “Evidence that similar point defects cause 1/f noise and radiation- induced-hole trapping in MOS transisotrs,” Phys. Rev. Lett., vol. 64, no. 5, pp. 579–582, 1990.
[55] “Low-Frequency Electronic Noise Measurements.” [Online]. Available:
https://balandingroup.ucr.edu/noise_room.html.
[56] N. Haartman and M. Östling, Low-frequency noise in advanced MOS devices. Springer Science & Business Media, 2007.
[57] H. Xiong, “Low frequency noise and charge trapping in MOSFETs,” Vanderbilt University, 2004.
[58] D. M. Fleetwood et al., “Unified model of hole trapping, 1/f noise, and thermally stimulated current in MOS devices,” IEEE Tran. Nucl. Sci., vol. 49, no. 6, pp. 2674–2683, Dec. 2002.
[59] G. X. Duan et al., “Effects of negative-bias-temperature-instability on low-frequency noise in SiGe pMOSFETs,” IEEE Trans. Device Mater. Reliab., vol. 16, no. 4, pp. 541–548, 2016.
[60] F. B. McLean, T. R. Oldham, and T. R. Oldham., “Basic mechanisms of radiation effects in electronic materials and devices.,” Harry Diam. Lab. Tech. Rep., no. HDL-TR-2129, 1987.
[61] M. R. Shaneyfelt, J. R. Schwank, D. M. Fleetwood, K. L. Hughes, G. L. Hash, and M. P. Connors,
“Interface-trap buildup rated in wet and dry oxides,” IEEE Tran. Nucl. Sci., vol. 39, no. 6, pp. 2244–2251, 1992.
[62] M. Gaillardin, “Process variations and radiation effects in advanced transistors,” in 2018 IEEE NSREC Short Course Notebook, 2018, pp. 139–185.
[63] J. R. Schwank et al., “Radiation effects in MOS oxides,” IEEE Trans. Nucl. Sci., vol. 55, no. 4, pp. 1833–
1853, 2008.
[64] D. M. Fleetwood, “Total ionizing dose effects in MOS and low-dose-rate-sensitive linear-bipolar devices,”
IEEE Trans. Nucl. Sci., vol. 60, no. 3, pp. 1706–1730, 2013.
[65] P. S. Winokur, J. R. Schwank, P. J. McWhorter, D. C. Turpin, and P. V. Dressendorfer, “Correlating the radiation response of MOS capacitors and transistors,” IEEE Trans. Nucl. Sci., vol. 31, no. 6, pp. 1453–
1460, 1984.
[66] D. M. Fleetwood, T. L. Meisenheimer, and J. H. Scofield, “1/f noise and radiation effects in MOS devices,”
IEEE Trans. Electron Devices, vol. 41, no. 11, pp. 1953–1964, 1994.
[67] H. D. Xiong, D. M. Fleetwood, B. K. Choi, and A. L. Sternberg, “Temperature dependence and irradiation response of 1/f-noise in MOSFETs,” IEEE Trans. Nucl. Sci., vol. 49 I, no. 6, pp. 2718–2723, 2002.
[68] T. L. Meisenheimer, D. M. Fleetwood, M. R. Shaneyfelt, and L. C. Riewe, “1/f noise in n- and p-channel MOS devices through irradiation and annealing,” IEEE Trans. Nucl. Sci., vol. 38, no. 6, pp. 1297–1303, Dec. 1991.
[69] E. Simoen et al., “Short-channel radiation effect in 60 MeV proton irradiated 0.13 μm CMOS transistors,”
IEEE Trans. Nucl. Sci., vol. 50, no. 6 II, pp. 2426–2432, 2003.
[70] J. H. Scofield, T. P. Doerr, and D. M. Fleetwood, “Correlation between preirradiation 1/f noise and postirradiation oxide-trapped charge in MOS transistors,” IEEE Tran. Nucl. Sci., vol. 36, no. 6, pp. 1946–
1953, 1989.
[71] T. L. Meisenheimer and D. M. Fleetwood, “Effect of radiation-induced charge on 1/f noise in MOS devices,” IEEE Trans. Nucl. Sci., vol. 37, no. 6, pp. 1696–1702, Dec. 1990.
[72] R. D. Black, P. J. Restle, and M. B. Weissman, “Hall effect, anisotropy, and temperature-dependence measurements of 1/f noise in silicon on sapphire,” Phys. Rev. B, vol. 28, no. 4, pp. 1935–1943, 1983.
[73] C. X. Zhang et al., “Temperature dependence and postirradiation annealing response of the 1/f noise of 4H- SiC MOSFETs,” IEEE Trans. Electron Devices, vol. 60, no. 7, pp. 2361–2367, 2013.
[74] “About imec.” [Online]. Available: https://www.imec-int.com/en/about-us.
[75] T. Chiarella et al., “Benchmarking SOI and bulk FinFET alternatives for planar CMOS scaling succession,”