Chapter 3 Analysis of Data-Dependent Jitter 46
3.5 Markov Sampling of Threshold Crossing Times
3.5.1 Time Domain: Cycle-to-Cycle Behavior
The Markov model is particularly useful for calculating cycle-to-cycle and long term jitter behavior of DDJ. Since the data sequence is not periodic, such as a clock, we define cycle-to-nthcycle jitter from (2.43) as the difference in the threshold crossing time deviations of adjacent transitions. Since transitions occur randomly, two transitions may be separated by an n bit interval. Nevertheless, transition sensitive circuits are unaware of the number of bit intervals that have passed. Therefore,
. (3.33)
The variance of the cycle-to-nthcycle jitter is
Figure 3.17 The state space progression for the threshold crossing times where k = 3. The fast events are highlighted in dark blue while the slow states are highlighted in light blue.
P = pT
∆tc[nT] = tc[(m+n)T]–tc[mT]
. (3.34) This variance can be calculated using the state transition notation. We are interested in conditioning the variance on the number of bit intervals that will pass. Therefore we want to find the difference in threshold crossing times:
, (3.35)
where ti and tj are the adjacent threshold crossing times for states i and j conditioned over an n bit interval. We can easily determine whether ti leads to tj by examining . How- ever this will calculate all the transitions that occur in the n bit interval. Instead, this calculation should calculate only the adjacent transitions. Therefore, the dynamics must be filtered to stop the progression of states that have reached a transition. We construct a tran- sition halting matrix, , based on two conditions: i) Hi is zero for any Si that is not an element of Sc and ii) Hi,j is zero for any state Sj that is an element of Sc. All other elements are one. The first condition ensures that we do not find transitions for states that did not initially have transitions, while the second condition stops the state progression once we reach a transition. Therefore, the transition from Si to Sj is captured by
, (3.36)
where the operation, T.H, is the element-by-element array multiplication and HT is a nor- mal matrix multiplication. Now that the state progression for the cycle-to-nthcycle behavior is described, we can calculate the mean:
, (3.37)
σcc2 [ ]n = E[∆tc2[nT]]–(E[∆tc[nT]])2
∆tc[nT] = (tj–ti) n
Ti jn,
H
C
T0 for n = 0 T1 for n = 1 T.HT for n = 2 T.HT.HT for n = 3 T.HT.HT.HT… for higher n
⎩⎪
⎪⎪
⎨⎪
⎪⎪
⎧
=
E t[( j–ti) n] E E t[ [( j–ti) n S, i]] Pr S[ ]i (E C[ i jn, ti]–ti)
i
∑
= =
where Pr[Si] is the probability operator and, for uncoded data, is p. Finally, the cycle-to-nthcycle variance is
. (3.38)
This calculation is easily performed for the analytic expressions for the threshold crossing time in (3.8) and tabulated in Appendix A. Consequently, we can plot the cycle-to-cycle behavior for n bit periods. If we want to make the same calculation for only rising (or fall- ing) edges, the transition halting matrix is modified to stop only states that progress from one rising edge to another.
Finally, the total cycle-to-cycle behavior can be calculated from the cycle-to-nthcycle variance. The total cycle-to-cycle behavior just averages the probability of a transition after n periods. Therefore,
. (3.39)
3.5.1.1 Rising and Falling Edge Sensitivity
In Figure 3.18 the cycle-to-nth cycle variance and total cycle-to-cycle behavior is demonstrated for rising and falling edges. The variance is zero for zero bit lag and increases to a maximum value after the first period. This occurs since it is probable that we move directly from a slow transition into a fast transition. After a two bit interval, the variance drops to about half the value. This occurs since it becomes likely that we move from a slow transition to a slow transition. For higher intervals the variance flattens out.
The effect of an offset voltage threshold is also shown and causes a uniform shift in the variance. The total cycle-to-cycle variance is plotted across a large range of bandwidths and is compared to the variance of the absolute jitter. Notably, the voltage threshold offset does not affect the behavior significantly at low bandwidths, where the DDJ is a stronger effect than DCD, but at higher bandwidths the DCD creates a jitter floor.
σcc2 [ ]n p (E C[ i jn, ti]–ti)2
i
∑
p2 (E C[ i jn, ti]–ti)i
⎝
∑
⎠⎜ ⎟
⎛ ⎞2
–
=
σcc2 pnσcc2 [ ]n
n =0
∑
∞=
3.5.1.2 Rising Edge Sensitivity
In Figure 3.19 the variances are demonstrated for rising edge sensitivity. Since a rising edge cannot be followed by a rising edge, the one bit interval does not have a cycle-to-cycle contribution. After two bit intervals the variance is small because the data sequence that has two rising edges in this interval is progressing from a fast transition to
Figure 3.18 The cycle-to-nth cycle and cycle-to-cycle behavior of the first-order response with and without a voltage threshold offset.
Figure 3.19 The cycle-to-nth cycle and cycle-to-cycle behavior of the first-order response for rising edge sensitivity
another fast transition. The variance is maximum for the third bit interval and reaches a fixed value at greater bit intervals. The final value for the cycle-to-nth cycle variance is roughly half of the jitter for the rising and falling edge sensitivity. Plotting the total cycle-to-cycle behavior demonstrates similar behavior to the earlier situation in Figure 3.18. However, this time the behavior is not sensitive to the voltage threshold offset.