A second approach to patterning the VLS substrates used micro-transfer molding imprint lithography.[103, 107] In this technique, a PDMS stamp is used to directly transfer a pat- tern into a sol-gel material coating on the Si substrate. The solvent phase of the sol-gel is absorbed by the polymer stamp, creating the inverse pattern of the stamp on the Si sur- face. The PDMS stamps used consisted of two layers of PDMS with different formulations to prevent deformation of the PDMS during pattern transfer. The most commonly used formulation of PDMS (Sylgard 184) has a high compressibility, which can lead to deforma- tion of the stamp, resulting in poor pattern transfer for small, high aspect-ratio features.
Combining a flexible base layer with a thin, rigid top layer can improve the pattern transfer fidelity for small features.[108]
Figure 7.2. Optical microscope images of SiO2on Si patterned with HF etching using micro-contact stamps.
A: Sample patterned without mineral oil, B: Sample patterned with mineral oil, C: Uneven etching on sample patterned with mineral oil, D: Example of pattern defect where the stamp shifted slightly during etching
Master fabrication
The rigid master for the stamps was fabricated using the same method as for traditional wire growth (Section 2.2). A positive photoresist (Shipley 1813) was spun onto a Si wafer coated with a layer of thermal oxide and patterned using optical photolithography. The exposed SiO2 layer was then etched with buffered HF, and the photoresist was removed with acetone. Before casting the PDMS stamp, the master was silanized with tri-methyl- chlorosilane (TMCS) to prevent adhesion between the PDMS and the Si master.
Stamp fabrication
A bilayer PDMS stamp was created to combine a rigid stamping interface with a flexible substrate for more conformal patterning.[108] The high gel-strength PDMS layer was cre- ated by combining vinylmethylsiloxane copolymer, platinum-divinyltetramethyldisiloxane complex in xylene, vinyl modified Q silica resin (50% in xylene) and 1,3,5,7-tetravinyl-
PDMS Stamp Sol-gel coated wafer
VLS Wire Growth Electrodeposit Cu
Dilute HF etch Stamping
Figure 7.3. A master was prepared using lithography, and then used to make a PDMS stamp. The stamp was pressed into sol-gel spun onto a wafer while the sol-gel cured. The patterned substrate can then be used to electrodeposit Cu and grow VLS wires.
1,3,5,7-tetramethylcyclotetrasiloxane.[109] The components were mixed in a Thinky Con- ditioning Mixer (Phoenix Equipment Inc.) for 1 min, defoamed for 1 min and allowed to degas for 2 min. The hydride functional polydimethylsiloxane was added, and then mixed and defoamed for an additional 1 min each. The PDMS was then degassed for 8 min and then spin-coated onto the master at 500 rpm for 60 s and allowed to pre-cure for 10 min at 55 ◦C. The thickness of this the high gel-strength PDMS film on a planar control sample was measured to be 26µm using contact profilometry.
The second PDMS layer was fabricated using Sylgard 184 PDMS mixed in a 10:1 ratio between monomer and curing agent. The PDMS mixture was mixed for 1 min, defoamed for 5 min, and then poured onto the master in a plastic petri dish to a total height of∼ 5 mm. The stamp and master were degassed cured at 80◦C for 12–24 h, and the stamp was then carefully peeled from the master. Each master can be used to make many duplicate stamps, and each stamp can be used repeatedly, making this technique easily scalable.
Stamping
A sol-gel material was spun onto degenerately doped Si (111) wafer using the following recipe: 1. Spin at 100 rpm for 5 sec while sol-gel is applied. 2. Spin at 200 rpm and close lid. 3. Spin at 400 rpm for 10 sec to achieve desired sol-gel thickness. 4. Spin at 1000 rpm for 1 sec to remove edge bead. 5. Open lid and spin at 200 rpm until color bands appear.
6. Spin at 1000 rpm to dry until uniform color seen across majority of wafer. The stamp was then pressed by hand into the sol-gel layer and allowed to cure at room temperature for 1 hour. The resulting sol gel layer was∼ 200 nm thick (Fig 7.4A).
In order to keep the sol-gel pattern uniform over large areas, the master was designed
Figure 7.4. Left: AFM image of 3 x 7µm sol-gel pattern. Right: SEM image of 10 x 20µm pattern with PDMS pillar heights>>sol-gel thickness, resulting in the sol-gel forming a ring around each of the stamp posts, but not creating a continuous film
so that the pillars in the resulting stamp were of a similar height to the thickness of the sol- gel. If the pillars are too tall, air bubbles can be trapped between the stamp and the wafer, leading to non-uniformities in the solgel pattern (Fig. 7.4B). The optimized stamp/sol-gel system produced uniform patterning over areas greater than 20 cm−2.
The sol-gel layer etches much faster than thermally grown oxide layers, but by using very dilute HF solutions we were able to remove thin layers of sol-gel from the samples without destroying the pattern. To remove any residual sol gel or native from the Si surface before electrodepositing the VLS catalyst, the samples were dipped in 1% HF for 5–10 s.
Temperature stability
To confirm the patterned sol-gel would maintain pattern fidelity during the VLS growth process, patterned substrates were annealed under N2 at various times as temperatures, as well as under VLS growth conditions. Figure 7.5 shows SEM images of the patterned substrates before annealing and after annealing under growth conditions (H2 with SiCl4
during the growth of another sample). The diameters of the holes were increased slightly, possibly due to densification of the SiO2matrix, and a small amount of conformal Si growth was observed, likely due to Cu contamination from the reactor.
The ability to use wet chemical processing to remove residual sol-gel and native oxide
Figure 7.5. SEM image of patterned sol gel. Left: Before annealing, Right: After annealing at 1000◦C in H2 and SiCl4 for 20 min
from the exposed Si, as well as the temperature/chemical stability of the sol-gel pattern, motivated continued investigation of this soft-lithography technique to pattern VLS growth substrates.