THE SINGLE-PHASE AC VOLTAGE CONTROLLER

AC Voltage Controllers

5.2 THE SINGLE-PHASE AC VOLTAGE CONTROLLER

C H A P T E R 5

171

172 C H A P T E R 5 AC Voltage Controllers

The principle of operation for a single-phase ac voltage controller using phase control is quite similar to that of the controlled half-wave rectifier of Sec. 3.9.

Here, load current contains both positive and negative half-cycles. An analysis identical to that done for the controlled half-wave rectifier can be done on a half- cycle for the voltage controller. Then, by symmetry, the result can be extrapo- lated to describe the operation for the entire period.

(b) (a)

v_s v_o

i_o S₂ R

+ +

− −

v_sw

+ −

S₁

0 α

v_s i_o

π + α

π 2π ωt

v_o

0 α

π + α

π 2π ωt

v_sw

0 α

π + α

π 2π ωt

Figure 5-1 (a) Single-phase ac voltage controller with a resistive load; (b) Waveforms.

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5.2 The Single-Phase AC Voltage Controller 173

Some basic observations about the circuit of Fig. 5-1aare as follows:

1. The SCRs cannot conduct simultaneously.

2. The load voltage is the same as the source voltage when either SCR is on.

The load voltage is zero when both SCRs are off.

3. The switch voltage v_swis zero when either SCR is on and is equal to the source voltage when neither is on.

4. The average current in the source and load is zero if the SCRs are on for equal time intervals. The average current in each SCR is not zero because of unidirectional SCR current.

5. The rms current in each SCR is times the rms load current if the SCRs are on for equal time intervals. (Refer to Chap. 2.)1/12

For the circuit of Fig. 5-1a, S₁conducts if a gate signal is applied during the positive half-cycle of the source. Just as in the case of the SCR in the controlled half-wave rectifier, S₁conducts until the current in it reaches zero. Where this cir- cuit differs from the controlled half-wave rectifier is when the source is in its neg- ative half-cycle. A gate signal is applied to S₂during the negative half-cycle of the source, providing a path for negative load current. If the gate signal for S₂is a half period later than that of S₁, analysis for the negative half-cycle is identical to that for the positive half, except for algebraic sign for the voltage and current.

Single-Phase Controller with a Resistive Load

Figure 5-1b shows the voltage waveforms for a single-phase phase-controlled voltage controller with a resistive load. These are the types of waveforms that exist in a common incandescent light-dimmer circuit. Let the source voltage be

(5-1) Output voltage is

(5-2) The rms load voltage is determined by taking advantage of positive and neg- ative symmetry of the voltage waveform, necessitating evaluation of only a half- period of the waveform:

(5-3) Note that for 0, the load voltage is a sinusoid that has the same rms value as the source. Normalized rms load voltage is plotted as a function of in Fig. 5-2.

The rms current in the load and the source is

(5-4) I_o,rmsV_o,rms

R

V_o,rmsA

1 1

[V_msin(t)]²d(t) V_m

12A1

sin(2) 2 vo(t)b^V0 ^{m sin t for} otherwise ^{t and t 2}

v_s(t)V_msint

174 C H A P T E R 5 AC Voltage Controllers

and the power factor of the load is

(5-5) Note that pf 1 for 0, which is the same as for an uncontrolled resistive load, and the power factor for 0 is less than 1.

The average source current is zero because of half-wave symmetry. The average SCR current is

(5-6) Since each SCR carries one-half of the line current, the rms current in each SCR is

(5-7) ISCR,rmsIo,rms

12 ISCR,avg 1

23

Vmsin(t)

R d(t) Vm

2R (1cos) pfA1

sin(2) 2 Vm

12A1

(sin2) 2 Vm>12 pfP

S P

Vs,rms Is,rms V²o,rms >R

Vs,rms(Vo,rms>R)Vo, rms

Vs,rms 1.0

0.8

0.6

0.4

0.2

0.00 40 80 120 160

Normalized rms Output Voltage

Delay Angle (Degrees) Single-phase Voltage Controller

Figure 5-2 Normalized rms load voltage vs. delay angle for a single-phase ac voltage controller with a resistive load.

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5.2 The Single-Phase AC Voltage Controller 175

Since the source and load current is nonsinusoidal, harmonic distortion is a consideration when designing and applying ac voltage controllers. Only odd har- monics exist in the line current because the waveform has half-wave symmetry.

Harmonic currents are derived from the defining Fourier equations in Chap. 2.

Normalized harmonic content of the line currents vs. is shown in Fig. 5-3. Base current is source voltage divided by resistance, which is the current for 0.

Single-Phase Controller with a Resistive Load

The single-phase ac voltage controller of Fig. 5-1ahas a 120-V rms 60-Hz source. The load resistance is 15 . Determine (a) the delay angle required to deliver 500 W to the load, (b) the rms source current, (c) the rms and average currents in the SCRs, (d) the power factor, and (e) the total harmonic distortion (THD) of the source current.

■ Solution

(a) The required rms voltage to deliver 500 W to a 15-load is

V_o,rms1PR2(500)(15)86.6 V PV²o,rms

R 0.0 0

0.2 0.4 0.6 0.8 1.0

C_n

n = 1

Delay Angle (Degrees) Harmonics, Single-phase Controller

n = 3

n = 5 n = 7

40 80 120 160

Figure 5-3 Normalized harmonic content vs. delay angle for a single-phase ac voltage controller with a resistive load; Cnis the normalized amplitude. (See Chap. 2.)

EXAMPLE 5-1

176 C H A P T E R 5 AC Voltage Controllers

The relationship between output voltage and delay angle is described by Eq. (5-3) and Fig. 5-2. From Fig. 5-2, the delay angle required to obtain a normalized output of 86.6/120 0.72 is approximately 90. A more precise solution is obtained from the numerical solution for in Eq. (5-3), expressed as

which yields

(b) Source rms current is

(c) SCR currents are determined from Eqs. (5-6) and (5-7),

(d) The power factor is

which could also be computed from Eq. (5-5).

(e) Base rms current is

The rms value of the current’s fundamental frequency is determined from C₁in the graph of Fig. 5-3.

The THD is computed from Eq. (2-68),

THD2I²_rmsI²_{1, rms}

I1,rms 25.77²4.9²

4.9 0.6363%

C1 L 0.61QI1,rmsC1Ibase(0.61)(8.0)4.9 A IbaseVs,rms

R 120

15 8.0 A pfP

S 500

(120)(5.77)0.72 ISCR,avg12(120)

2(15) C^1cos(88.1°)D^{1.86 A}

ISCR,rmsIrms

125.77

12 4.08 A Io,rmsVo,rms

R 86.6

15 5.77 A 1.54 rad88.1°

86.6120A¹

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5.2 The Single-Phase AC Voltage Controller 177

β v_o

v_sw

0 α

0 α

π + α

β π + α

π 2π ωt

0 α

v_s i_o

π + α π β

2π ωt

(b)

ωt (a)

v_s v_o

i_o

R

L S₂

+ +

−

− v_sw

+ −

S₁

Figure 5-4 (a) Single-phase ac voltage controller with an RL load; (b) Typical waveforms.

Single-Phase Controller with an RL Load

Figure 5-4ashows a single-phase ac voltage controller with an RLload. When a gate signal is applied to S₁at t , Kirchhoff’s voltage law for the circuit is expressed as

(5-8) Vmsin(t)Rio(t)Ldio(t)

dt

178 C H A P T E R 5 AC Voltage Controllers

The solution for current in this equation, outlined in Sec. 3.9, is

where (5-9)

The extinction angle is the angle at which the current returns to zero, when t ,

(5-10) which must be solved numerically for .

A gate signal is applied to S₂at t , and the load current is negative but has a form identical to that of the positive half-cycle. Figure 5-4bshows typ- ical waveforms for a single-phase ac voltage controller with an RLload.

The conduction angle is defined as

(5-11) In the interval between and when the source voltage is negative and the load current is still positive, S₂cannot be turned on because it is not forward- biased. The gate signal to S₂must be delayed at least until the current in S₁reaches zero, at t . The delay angle is therefore at least .

(5-12) The limiting condition when is determined from an examination of Eq. (5-10). When , Eq. (5-10) becomes

which has a solution Therefore,

(5-13) If , , provided that the gate signal is maintained beyond t .

In the limit, when , one SCR is always conducting, and the voltage across the load is the same as the voltage of the source. The load voltage and cur- rent are sinusoids for this case, and the circuit is analyzed using phasor analysis for ac circuits. The power delivered to the load is continuously controllable between the two extremes corresponding to full source voltage and zero.

when sin( )0

io()0Vm

Z csin( )sin( ) e^()>d Z 2R²(L)² , and tan¹aL

R b i_o (t)d

V_m

Z csin(t )sin( )e^(t)>d for t

0 otherwise

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5.2 The Single-Phase AC Voltage Controller 179

This SCR combination can act as a solid-state relay, connecting or disconnect- ing the load from the ac source by gate control of the SCRs. The load is discon- nected from the source when no gate signal is applied, and the load has the same voltage as the source when a gate signal is continuously applied. In practice, the gate signal may be a high-frequency series of pulses rather than a continuous dc signal.

An expression for rms load current is determined by recognizing that the square of the current waveform repeats every ␲rad. Using the definition of rms, (5-14) where i_o(␻t) is described in Eq. (5-9).

Power absorbed by the load is determined from

(5-15) The rms current in each SCR is

(5-16) The average load current is zero, but each SCR carries one-half of the current waveform, making the average SCR current

(5-17)

Single-Phase Voltage Controller with RLLoad

For the single-phase voltage controller of Fig. 5-4a, the source is 120 V rms at 60 Hz, and the load is a series RLcombination with R⫽20 ⍀and L⫽50 mH. The delay angle ␣is 90⬚. Determine (a) an expression for load current for the first half-period, (b) the rms load current, (c) the rms SCR current, (d) the average SCR current, (e) the power delivered to the load, and (f) the power factor.

■ Solution

(a) The current is expressed as in Eq. (5-9). From the parameters given,

␣ ⫽90°⫽1.57 rad V_m

Z ⫽12022

27.5 ⫽6.18 A

␻␶ ⫽ ␻aL

Rb⫽377a0.05

20 b⫽0.943 rad

␪⫽tan^⫺1a␻L

R b⫽tan^⫺1(377)(0.05)

20 ⫽0.756 rad Z ⫽2R²⫹(␻L)²⫽3(20)²⫹C(377)(0.05)D^2⫽27.5Æ

ISCR,avg⫽ 1 2␲3

␤

␣

io(␻t) d(␻t) I_SCR,rms⫽I_o,rms

12

P⫽I²o,rms R I_o,rms⫽C

1

␲L

␤

␣

i²_o(␻t) d(␻t)

EXAMPLE 5-2

180 C H A P T E R 5 AC Voltage Controllers

The current is then expressed in Eq. (5-9) as

The extinction angle is determined from the numerical solution of i() 0 in the above equation, yielding

Note that the conduction angle 2.26 rad 130, which is less than the limit of 180.

(b) The rms load current is determined from Eq. (5-14).

(c) The rms current in each SCR is determined from Eq. (5-16).

(d) Average SCR current is obtained from Eq. (5-17).

(e) Power absorbed by the load is

(f) Power factor is determined from P/S.

PSpice Simulation of Single-Phase AC Voltage Controllers

The PSpice simulation of single-phase voltage controllers is very similar to the simulation of the controlled half-wave rectifier. The SCR is modeled with a diode and voltage-controlled switch. The diodes limit the currents to positive values, thus duplicating SCR behavior. The two switches are complementary, each closed for one-half the period.

The Schematic Capture circuit requires the full version, whereas the text CIR file will run on the PSpice A/D Demo version.

pf P

S P

V_s,rms I_s,rms 147

(120)(2.71) 0.45 45%

PI²o,rms R(2.71)²(20)147 W ISCR, avg 1

23

3.83

1.57

C^{6.18 sin(t0.756)23.8et>0.943}D^{d(t)1.04 A}

ISCR,rmsIo,rms

12 2.71

121.92 A Io,rmsF

1 3

3.83

1.57

C6.18 sin (t0.756)23.8e^t>0.943D^{d(t) 2.71 A}

3.83 rad220°

io(t)6.18 sin(t0.756)23.8e^t>0.943 A for t Vm

Z sin( ) e^>23.8 A har80679_ch05_171-195.qxd 12/15/09 6:01 PM Page 180

5.2 The Single-Phase AC Voltage Controller 181

PSpice Simulation of a Single-Phase Voltage Controller

Use PSpice to simulate the circuit of Example 5-2. Determine the rms load current, the rms and average SCR currents, load power, and total harmonic distortion in the source current.

Use the default diode model in the SCR.

■ Solution

The circuit for the simulation is shown in Fig. 5-5. This requires the full version of Schematic Capture.

The PSpice circuit file for the A/D Demo version is as follows:

SINGLE-PHASE VOLTAGE CONTROLLER (voltcont.cir)

*** OUTPUT VOLTAGE IS V(3), OUTPUT CURRENT IS I(R) ***

**************** INPUT PARAMETERS *********************

.PARAM VS 120 ;source rms voltage .PARAM ALPHA 90 ;delay angle in degrees

.PARAM R 20 ;load resistance

.PARAM L 50mH ;load inductance

.PARAM F 60 ;frequency

.PARAM TALPHA {ALPHA/(360*F)} PW 5 {0.5/F} ;converts angle to time delay

***************** CIRCUIT DESCRIPTION *********************

VS 1 0 SIN(0 {VS*SQRT(2)} {F}) S1 1 2 11 0 SMOD

D1 2 3 DMOD ; FORWARD SCR

S2 3 5 0 11 SMOD

EXAMPLE 5-3

Figure 5-5 The circuit schematic for a single-phase ac voltage controller. The full version of Schematic Capture is required for this circuit.

0 0 0

+

−

+− VC2 S2

S1

Vs

R1 20

2 1

50m L1 D2

D1

A

Control2 Control2

0 +−

VC1

0 Control1

V1 = 0 V2 = 5

TD = {TALPHA}

TR = 1n TF = 1n PW = {0.5/F}

PER = {1/F}

V1 = 0 V2 = 5

TD = {TALPHA + 1/(2^∗F)}

TR = 1n TF = 1n PW = {0.5/F}

PER = {1/F}

ALPHA = 90 F = 60 Vrms = 120

TALPHA = {ALPHA/(360*F)}

PARAMETERS:

VOFF = 0

VAMPL = {Vrms*sqrt(2)}

FREQ = {F}

++ Control1

AC VOLTAGE CONTROLLER 0

+

−

+ −

182 C H A P T E R 5 AC Voltage Controllers

D2 5 1 DMOD ; REVERSE SCR

R 3 4 {R}

L 4 0 {L}

**************** MODELS AND COMMANDS ********************

.MODEL DMOD D

.MODEL SMOD VSWITCH (RON.01)

VCONTROL 11 0 PULSE(-10 10 {TALPHA} 0 0 {PW} {1/F}) ;control for both switches

.TRAN .1MS 33.33MS 16.67MS .1MS UIC ;one period of output

.FOUR 60 I(R) ;Fourier Analysis to get THD

.PROBE .END

Using the PSpice A/D input file for the simulation, the Probe output of load current and related quantities is shown in Fig. 5-6. From Probe, the following quantities are obtained:

Quantity Expression Result

RMS load current RMS(I(R)) 2.59 A

RMS SCR current RMS(I(S1)) 1.87 A

Average SCR current AVG(I(S1)) 1.01 A

Load power AVG(W(R)) 134 W

Total harmonic distortion (from the output file) 31.7%

Note that the nonideal SCRs (using the default diode) result in smaller currents and load power than for the analysis in Example 5-2 which assumed ideal SCRs. A model for the particular SCR that will be used to implement the circuit will give a more accurate prediction of actual circuit performance.

70 ms 60 ms

(50.000m, 1.8660) (50.000m, 1.0090) (50.000m, 2.5916)

50 ms Time

40 ms 15 ms

-5.0 A 0 A 5.0 A

20 ms 30 ms

I (R) RMS ( I (R)) RMS ( I (S1) AVG ( I (S1))

Figure 5-6 Probe output for Example 5-3.

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