Introduction
1.7 SWITCHES IN PSPICE
The Voltage-Controlled Switch
The voltage-controlled switch Sbreak in PSpice can be used as an idealized model for most electronic devices. The voltage-controlled switch is a resistance that has a value established by a controlling voltage. Fig. 1-14 illustrates the concept of using a controlled resistance as a switch for PSpice simulation of power electron- ics circuits. A MOSFET or other switching device is ideally an open or closed switch. A large resistance approximates an open switch, and a small resistance ap- proximates a closed switch. Switch model parameters are as follows:
Parameter Description Default Value
RON “On” resistance 1 (reduce this to 0.001 or 0.01 ⍀)
ROFF “Off” resistance 106⍀
VON Control voltage for on state 1.0 V
VOFF Control voltage for off state 0 V
The resistance is changed from large to small by the controlling voltage. The default off resistance is 1 M⍀, which is a good approximation for an open circuit in power electronics applications. The default on resistance of 1 ⍀is usually too large. If the switch is to be ideal, the on resistance in the switch model should be changed to something much lower, such as 0.001 or 0.01 ⍀.
A Voltage-Controlled Switch in PSpice
The Capture diagram of a switching circuit is shown in Fig. 1-15a. The switch is implemented with the voltage-controlled switch Sbreak, located in the Breakout li- brary of devices. The control voltage is VPULSE and uses the characteristics shown.
The rise and fall times, TR and TF, are made small compared to the pulse width and period, PW and PER. V1 and V2 must span the on and off voltage levels for the switch, 0 and 1 V by default. The switching period is 25 ms, corresponding to a fre- quency of 40 kHz.
The PSpice model for Sbreak is accessed by clicking edit, then PSpice model. The model editor window is shown in Fig 1-15b. The on resistance Ron is changed to 0.001 ⍀ har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 14
1.7 Switches in PSpice 15
Figure 1-15 (a) Circuit for Example 1-2; (b) editing the PSpice Sbreak switch model to make Ron = 0.001⍀; (c) the transient analysis setup; (d) the Probe output.
(b)
(c) + + + – – Sbreak −
Rload
Vcontrol Vs
S1
2
24V
0 0
V1 = 0 V2 = 5 TD = 0 TR = 1n TF = 1n PW = 10us PER = 25us VPULSE
(a) +
−
16 C H A P T E R 1 Introduction
to approximate an ideal switch. The Transient Analysis menu is accessed from Simulation Settings. This simulation has a run time of 80 s, as shown in Fig. 1-15c.
Probe output showing the switch control voltage and the load resistor voltage wave- forms is seen in Fig. 1-15d.
Transistors
Transistors used as switches in power electronics circuits can be idealized for simulation by using the voltage-controlled switch. As in Example 1-2, an ideal transistor can be modeled as very small on resistance. An on resistance matching the MOSFET characteristics can be used to simulate the conducting resistance RDS(ON)of a MOSFET to determine the behavior of a circuit with nonideal com- ponents. If an accurate representation of a transistor is required, a model may be available in the PSpice library of devices or from the manufacturer’s website. The IRF150 and IRF9140 models for power MOSFETs are in the demonstration ver- sion library. The default MOSFET MbreakN or MbreakN3 model must have parameters for the threshold voltage VTO and the constant KP added to the PSpice device model for a meaningful simulation. Manufacturer’s websites, such as International Rectifier at www.irf.com, have SPICE models available for their
(d) Time V(Vcontrol:+)
Load Resistor Voltage Switch Control Voltage 10.0 V
7.5 V 5.0 V 2.5 V 0 V
V(Rload:2) 40 V
20 V SEL>>
0 V0 s 20 s 40 s 60 s 80 s
Figure 1-15 (continued) har80679_ch01_001-020.qxd 12/15/09 2:27 PM Page 16
1.7 Switches in PSpice 17
products. The default BJT QbreakN can be used instead of a detailed transistor model for a rudimentary simulation.
Transistors in PSpice must have drive circuits, which can be idealized if the behavior of a specific drive circuit is not required. Simulations with MOSFETs can have drive circuits like that in Fig. 1-16. The voltage source VPULSE estab- lishes the gate-to-source voltage of the MOSFET to turn it on and off. The gate resistor may not be necessary, but it sometimes eliminates numerical conver- gence problems.
Diodes
An ideal diode is assumed when one is developing the equations that describe a power electronics circuit, which is reasonable if the circuit voltages are much larger than the normal forward voltage drop across a conducting diode. The diode current is related to diode voltage by
(1-2) where nis the emission coefficient which has a default value of 1 in PSpice. An ideal diode can be approximated in PSpice by setting nto a small number such as 0.001 or 0.01. The nearly ideal diode is modeled with the part Dbreak with PSpice model
model Dbreak D n ⫽0.001
With the ideal diode model, simulation results will match the analytical results from the describing equations. A PSpice diode model that more accu- rately predicts diode behavior can be obtained from a device library. Simula- tions with a detailed diode model will produce more realistic results than the idealized case. However, if the circuit voltages are large, the difference between using an ideal diode and an accurate diode model will not affect the results in any significant way. The default diode model for Dbreak can be used as a compromise between the ideal and actual cases, often with little differ- ence in the result.
id⫽ISevd>nVT⫺1
+
− Vs RG M1
Vcontrol 10
Rload
24V 2
0 IRF150 V1 = 0
V2 = 12 TD = 0 TR = 1n TF = 1n PW = 10us PER = 25us VPULSE
+
−
Figure 1-16 An idealized MOSFET drive circuit in PSpice.
18 C H A P T E R 1 Introduction
Thyristors (SCRs)
An SCR model is available in the PSpice demonstration version part library and can be used in simulating SCR circuits. However, the model contains a relatively large number of components which imposes a size limit for the PSpice demonstra- tion version. A simple SCR model that is used in several circuits in this text is a switch in series with a diode, as shown in Fig. 1-17. Closing the voltage-controlled switch is equivalent to applying a gate current to the SCR, and the diode prevents reverse current in the model. This simple SCR model has the significant disadvan- tage of requiring the voltage-controlled switch to remain closed during the entire on time of the SCR, thus requiring some prior knowledge of the behavior of a cir- cuit that uses the device. Further explanation is included with the PSpice examples in later chapters.
Convergence Problems in PSpice
Some of the PSpice simulations in this book are subject to numerical conver- gence problems because of the switching that takes place in circuits with inductors and capacitors. All the PSpice files presented in this text have been designed to avoid convergence problems. However, sometimes changing a circuit parameter will cause a failure to converge in the transient analysis. In the event that there is a problem with PSpice convergence, the following remedies may be useful:
• Increase the iteration limit ITL4 from 10 to 100 or larger. This is an option accessed from the Simulation Profile Options, as shown in Fig. 1-18.
• Change the relative tolerance RELTOL to something other than the default value of 0.001.
• Change the device models to something that is less than ideal. For example, change the on resistance of a voltage-controlled switch to a larger value, or use a controlling voltage source that does not change as rapidly. An ideal diode could be made less ideal by increasing the value of nin the model.
Generally, idealized device models will introduce more convergence problems than real device models.
Figure 1-17 Simplified thyristor (SCR) model for PSpice.
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