In general laser writing and e-beam lithography processes are employed for high accuracy and devices with sub-micron dimensions. We made an attempt to fabricate high frequency, greater than 5 GHz, SAW one port and two port resonators on silicon substrate with patterned ZnO
(a) 0.1M acetic acid (b) 0.2M acetic acid
(c) 0.3M acetic acid (d) Section of actual device with optimal conditions Fig. 4.11. FESEM images of patterned ZnO film on test samples using dilute acetic acid of concentration (a) 0.1M, (b) 0.2M, (c) 0.3M. (d) Shows the ZnO pattern obtained on actual device using 0.2M acetic acid with convectional flow of 1.6 m/s.
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Chapter 4 Fabrication of Patterned-ZnO/Si SAW Devices films using e-beam lithography process. The layout of IDT pattern and ZnO pattern for one port and two port resonators are designed using CleWin software. In this process the mask layout is imported into the software for e-beam lithography. The dimensions of the proposed one port and two port SAW resonators to be fabricated are mentioned in Table 4.8. The IDT of wavelength 960 nm and electrode width 200 nm, implying a metallization ration of 0.42, is designed for 50 Ω impedance and ZnO pattern of width 200 nm is considered in the IDT spacing.
Metallization ratio of 0.42 is chosen in order to avoid the merging of IDT lines during e-beam lithography process, the IDT bus bars are extended to form GSG contact pad for testing via a probe station. Default alignment marks available in the instrument interface software are chosen to facilitate two layer lithography process.
Table 4.8 Dimensions of proposed SAW devices using e-beam lithography.
Parameters One port resonator Two port resonator
Electrode width 200 nm 200 nm
Aperture 60λ 60λ
Metallization ratio 0.42 0.42
Distance between input and output IDTs ̶ λ/2
Distance between IDT and reflector grating λ/4 λ/4 (a) Cleaning of wafers
Silicon samples are cleaned using standard piranha solution followed by 15 s HF dip to remove contaminants present in silicon wafers. Piranha recipe is prepared with 3:1 ratio of H2SO4 and H2O2. The samples are kept in piranha solution of 30 s and cleaned with DI water and further dipped in dilute HF solution for 15 s to remove the presence of native oxide. Finally, wafers are placed in DI water and dried using nitrogen flush.
(b) Oxidation of silicon wafers
The samples are placed in oxidation furnace to obtain SiO2 thickness of 300 nm using wet oxidation process. After the oxidation process, the thickness of oxide layer measured using Dektack profilometer is 278 nm.
(c) Photoresist coating
The samples are spin-coated with PMMA, 950 KC3, a bi-layered positive photoresist, for the development of IDT pattern. The wafer spinning program starts with 500 rpm for 5 s, followed by 1000 rpm for 5 s and finally 6000 rpm for 45 s, and the ramp rate of 500 rpm/s is used.
Speed ramp of 500 rpm/s is maintained throughout the spinning processes. By this method, the 90
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Chapter 4 Fabrication of Patterned-ZnO/Si SAW Devices
photoresist coating thickness of about 180 nm is achieved over the wafer. The samples with photoresist are pre baked using a hot plate at 180°C temperature of for 120 s.
(d) Lithography
Several trials are conducted to obtain the optimum dosage values of lithography process by observing the photoresist pattern under the microscope and the dosage of 160 μC/cm2 with beam current of 140 pA is finalized. The samples are developed by dipping in MIBK solution for 60 s and then in IPA solution for 60 s, followed by DI water clean and nitrogen flush. Further metal depositions of chromium and gold of 10 nm and 40 nm thicknesses respectively are carried out using DC sputtering process over the developed photoresist samples. Lift off process is carried out by placing the samples in acetone solution for long duration without ultra- sonication to form IDT pattern. The samples are washed with DI water after ensuring that the lift off process is complete. The FESEM image of developed electrode pattern is shown in Fig.
4.12.
(e) ZnO deposition
A test run of ZnO deposition for 1000 s resulted in ZnO film thickness of 278 nm. Accordingly we carried out deposition for 690 s to get ZnO film thickness of 192 nm as obtained from the simulation results given in Chapter 3. The deposition is carried out at room temperature and the deposition conditions are listed in Table 4.9. Photoresist coating, prebaking and e–beam lithography processes for patterning of ZnO film are carried out as discussed above for IDT development. We chose not to perform annealing process on the samples, as the annealing process at 650 °C may damage gold electrodes.
(a) (b)
Fig. 4.12. SEM images of (a) one port SAW resonator and (b) magnified view of IDT structure.
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Chapter 4 Fabrication of Patterned-ZnO/Si SAW Devices Table 4.9 ZnO deposition conditions for RF sputtering.
Power 50 W
Deposition time 750 s
Base pressure 6 ×10-6 Torr
Working pressure 5×10-2 Torr
Distance between substrate and target 7. 5 cm
Substrate temperature Room temperature
(f) Patterning of ZnO
From the etch rates obtained from the UV lithography samples discussed in previous section, 0.2M acetic acid solution is prepared and the e-beam samples are dipped in the solution with 1.6 m/s convectional flow for 54 s to 60 s. SEM images of the fabricated one port SAW resonator and the magnified view of the IDT structure are shown in Fig. 4.13. Further the samples are cleaned with acetone and DI water and then dried using nitrogen flush.