Investigation of Degradation Mechanism in AlGaN/GaN HEMTs

The electric field has been found to be quite high at the edge of the field plate in a device's SEMI-ON state. 110 6.3 Peak Electric Field of the Units at the Edge of the Field Plate with Variation in .

Background

As we know, by using voltage and electric field scaling, high speed and low power devices can be designed on demand. Compound semiconductors can be considered as an alternative to silicon in terms of various technological parameters in order to offset the advantage of cost-effective device manufacturing using silicon.

Figure 1.1: The power frequency diagram of application for the semiconductor materials [1]

Motivation for the present work

Objectives of the Thesis

Contribution of the Thesis

The suppressed electric field inhibits the electric field-induced degradation mechanisms in the proposed rounded gate device. Furthermore, the carrier temperature, electric field, self-heating, and thermal resistance decrease continuously at the edge of the field plate in the proposed device, when the thickness of the SiN and Diamond layers vary.

Figure 1.2: Schematic of proposed rounded gate along with rectangular and stair case device struc- struc-ture: (a) without and (b) with field plate.

Organization of the Thesis

It is found in the numerical analysis that electric field, electron temperature, self-heating and thermal resistance are reduced in the proposed device. In the GaN crystal, electric dipole of the N is directed towards the Ga atom, indicating the negative magnitude of the polarization.

Figure 2.1: Hexagonal Wurtzite Structure

Hetero-structure

As a result of the mismatch in the band gap, there is a band gap discontinuity, which is represented by 4Eg (difference of the band gap energies of two semiconductors). For AlxGa1−xN/GaN heterojunction, the difference in band gaps of the two semiconductors leads to band bending, which helps in the creation of a well with high electron density.

Origin of Polarization

For AlxGa1−xN/GaN hetero interface, the above equation can be rewritten as stated below. Since the AlxGa1−xN layer has grown on top of the GaN layer, it is believed to be strained due to their lattice mismatch.

Figure 2.5: Strain effect in an Al x Ga 1−x N/GaN hetero-structure

Two Dimensional Electron Gas (2DEG)

If x reaches a very high value, then PSP,AlxGa1−xN is the main contributing factor in the polarization process. On the other hand, | PSP,AlxGa1−xN | is greater than | PSP,GaN |, resulting in a positive charge at the AlxGa1−xN/GaN hetero interface.

Figure 2.7: The vertical cross-section of the conduction band in AlGaN/GaN hetero-structure.

AlGaN/GaN HEMT

It can be expressed as a function of n2D (2DEG carrier density) and the voltage along the lateral direction V(x) as given in where, µn is electron mobility in the channel and WG is the width of the gate. By integrating the above equation from x = 0 to x = LG (drain side of the gate edge), the drain current, ID, can be expressed as. 2.13) For small drain to source voltage, VDS, the electron speed is proportional to the electric field given by υn =µnE.

Choice of Substrate

Silicon Carbide

The lattice mismatch between SiC and GaN is 4%, and its better thermal conductivity makes it the most attractive substrate. The dislocation density is less than 3 x 108 cm-2 provided that an AlN nucleation layer is placed between SiC and GaN, ensuring excellent crystallographic quality.

Sapphire

Silicon

Challenges

Self heating

Even the failure rate of GaN-HEMTs is related to the peak temperature of the device. A number of effective solutions to tackle the self-heating problem have been proposed in the literature. Notable among these are: (a) changing the substrate material to improve heat dissipation [58]; b) using heat sink layers in the device consisting of good thermal conductors such as nanocrystalline diamond [59] etc.; (c) application of an external heat sink over the entire chip [60] and (d) deposition of a quilt-like structure over the entire transistor [61].

Current Collapse

2.10(b)), which is below the cut-off voltage (region A), the peak high electric field induced in the device occurs at the gate edge to the drain. When a device is used in the pulsed bias condition, the influence of capture and reception is quite apparent. There are several methods proposed in the literature to mitigate the issue of current breakdown, such as surface passivation and the introduction of field plates [2, 65].

Figure 2.9: Pictorial representation of I D vs V D characteristics for AlGaN/GaN HEMT devices (solid line and dotted line represents before and after the current collapse, respectively)

Thermal Boundary Resistance

TCAD simulation

Fermi Statistics
Drift Diffusion Transport Model
Thermodynamics Model
Shockley–Read–Hall Recombination Model
Thermionic Emission Current Model
Mobility Model
Avalanche Generation
Tunneling
Traps
Basic Heat Equations

Carrier mobility must be properly modeled to properly simulate the finite flow. Similarly, tunneling into the valence band at the lower point originates from the valence band at the upper point, jV = jV V (this is "hole tunneling"). The contribution of electrons tunneling from the conduction band at points above l to the conduction band at point l to the electron tunneling current density is the integral of the recombination rate.

Table 2.3: A complete list of tools available in Sentaurus TCAD (2016 Version)

Summary

In the second section of this chapter, an overview of TCAD numerical analysis and the basic models used from it is briefly described. In this chapter, we present key observations made by researchers regarding HEMT's reliability and degradation mechanisms. Rosker stated that "While excellent performance is routinely demonstrated, the major challenge has been and continues to be achieving a high level of reliability and stability while simultaneously operating at high performance [21]." Therefore, a better understanding of failure mechanisms of GaN HEMTs is required, which is a major challenge considering the particularities of material imperfection, the stability of fabrication processes, and the physics of GaN devices [81].

First Principles

The maximum discharge current reduction of the device using sapphire was 64% compared to the 12% reduction in the device using SiC. In this model, it was observed that heat was generated in the region where the electric field is usually high, so the experimental results were in close agreement with the results obtained using the numerical analysis involving the hydrodynamic model.

Figure 3.1: Field Plate HEMT structure, and Electric field distribution along the channel of HEMT with and without a field plate [2]

Degradation Mechanism

However, the large reverse piezoelectric strain in the AlGaN layer near the gate edge toward the drain side helps the impurity spread (Fig. It was observed that the back barrier and the p-diamond cap layer offset the 2DEG in the OFF state. It was also discovered that the improved thermal performance in the device was due to the diamond surface heat spreaders.

Figure 3.2: Critical areas where degradation may occur in a AlGaN/GaN HEMT [3]

Summary

The reliability aspects are studied by evaluating the electric field profile, the leakage current, the electron temperature (eTemperature) and the capacitance-voltage characteristics (CV). Field plate is usually implemented to reduce the electric field in the drain access region. It is worth noting that the RF performance of the device decreases with downsizing as the Miller capacitance dominates in the field plate devices.

Numerical Analysis Framework / Physical Model

The model included in the numerical analysis framework for piezoelectric deformation is as follows. It should be noted that quantum confinement effects causing the 2-DEG offset are not included in the numerical analysis. In the numerical simulation, the mesh plays a key role, especially around the corner at the interface, so it is essential to exclude results at distances greater than 3 A◦ [89].

Figure 4.1: Schematics of the structure: (a) Rounded gate without Field plate, and (b) Rounded gate with Field plate considered for this work

Results & Discussion

Current–Voltage Characteristics

Transfer Characteristics & Transconductance
Output Characteristics

Leakage Current
eTemperature Profile
Electric Field Profile
Breakdown Voltage
Capacitance–Voltage Characteristics

In this subsection, issues related to leakage current (IG vs VDS) of round gate devices with/without field plate are discussed. Therefore, lowering the hot electron temperature at the gate edge of round gate devices with/without field plate helps to reduce device degradation. Thus, the gate capacitance increases slightly in round gate devices with and without a field plate.

Figure 4.3: Conduction band and electron density profile at the AlGaN/GaN heterostructure of rounded gate devices (without field plate) at gate voltage = drain voltage = 0 V

Summary

The decrease in auxiliary devices for device breakdown, such as peak electric field and electron temperature at the gate edge as well as leakage current, overcomes the marginal increase in the capacitance(s) of rounded gate devices with or without field plate. The breakdown voltage of the rounded gate device (dr7) is found to be 133 V, which is more than 10%. This makes the rounded gate AlGaN/GaN HEMT with or without field plate a suitable candidate for any high power application that requires high reliability of the devices.

Numerical Analysis Framework / Physical Model

The following model is incorporated into the numerical analysis framework for the inverse piezoelectric voltage. Inverse Piezoelectric Voltage Modulation with Variation in Gate Geometry. we include the following terms in the numerical analysis framework for analysis. In the above equations (Eqs. 5.7 and 5.8), the first term (n∇EC and p∇EV) estimates spatial variation of the band gap, electron affinity and electrostatic potential, respectively.

Figure 5.1: Schematic of the devices namely, rectangular (RG), staircase (SG), and rounded gate (FG) HEMT considered in this work

Results and Discussion

Current–Voltage Characteristics
Electric Field Profile
Converse Piezoelectric Strain

Analytical Analysis of Converse Piezoelectric Strain

Electron Temperature Profile
Breakdown Voltage

This is due to the increased dispersion of the electric field at the edge of the SG and FG gates of the HEMT. The density of the stored elastic energy depends on the vertical electric field and varies linearly at the edge of the device gate [143]. For the device, the accumulated elastic energy depends on the electric field at the gate edge [143].

Figure 5.2: (a) I D v/s V DS characteristics at V G = 0V, and (b) I D v/s V GS characteristics at V D = 5V of the devices

Summary

6] observed that the electric field peaks at an edge of the field plate in the OFF state. It is well known that the localized electric field in the OFF state facilitates localized electron temperature hot spots. The primary objective of the proposed work is therefore to reduce the peak electric field at the field plate edge.

Table 5.4: Electric field, and CPE-strain of RG HEMT, SG HEMT, and FG HEMT at gate edge in both the bias condition

Numerical Analysis Framework / Physical Model

A field plate with a length (LF P) of 1 µm is included in the device structure, which is illustrated in the figures (see Fig. 6.1) as a black rectangular box. The hydrodynamic model aids in the evaluation of carrier temperatures (Tn, Tp), described by Eq. 6.2) In the above equations, the first term (n∇EC and p∇EV) estimates the spatial variation of bandgap, electron affinity and electrostatic potential of the proposed device. After NCD removal, SiO2 can be deposited into the pockets using plasma enhanced CVD (PECVD) [215].

Table 6.2: Thermal Resistance, R TH of the devices with variation in length of SiO 2 pocket (L SiO 2 ) with t SiN = 30 nm at V GS = 0V, and V DS = 20V

Results & Discussion

Carrier Temperature Profile

Similarly, the electric field of the device in the SEMI-ON state is more compared to the OFF state. But atx= 2µm, electric field in the OFF state of the proposed device is observed to be higher than the SEMI-ON state. With the SiO2 around the field plate edge, eTemp of the device is observed to decrease in the SEMI-ON state, which is shown in Fig.

Figure 6.8: Electron Density profile of the R1 device under two bias condition; V GS = -6 V, and V GS = -2 V at V DS = 20 V

Electric Field Profile

The electric field point at the edge of the field plate interacts with the discharge terminal, which results in a breakdown of the device insulation [120]. This confirms our observation of the suppressed electric field in the diamond layer and in the device below the field plate. The profile of the electric field at the edge of the field plate of the devices with respect to the thickness of the SiN layer and the diamond layer is shown in Fig.

Figure 6.12: Electric field profile of the device; R1, and device with SiO 2 pocket (t SiN = t Dia = 30 nm), at V GS = -2 V (SEMI-ON) and V DS = 20 V

Self Heating

Correspondingly, lattice temperature profiles for the R1 device and the device with SiO2 pocket are shown in Fig. It should be mentioned that the lattice temperatures at the field plate edge of the R1 device and the device with SiO2 pocket (tSiN =tDia= 30 nm) are 437 K and 382 K, respectively. This indicates that a device with SiO2 pocket provides less thermal resistance and improves its reliability.

Figure 6.14: Self heating phenomena in R1 device and lattice temperature along with electric field profile of the device at V GS = 0V and V DS = 20V

Summary

Mishra, “Enhancement of breakdown voltage in algan/gan transistors with high electron mobility using a field plate,” IEEE Transactions on Electron Devices, vol. Fantini, “Investigation of high electric field degradation effects in algan/gan hemts,” IEEE Transactions on Electron Devices, vol. Wei, “Thermal storage of algan/gan high-electron-mobility transistors,” IEEE Transactions on Device and Materials Reliability, vol.