Dual-passive snubber dual-switch forward converter
K. Soltanzadeh
✉, M. Dehghani and R. Riahi
A dual-passive snubber (DPS) for dual-switch forward converter is presented. Snubber networks provide zero-current turn-on and zero- voltage turn-off conditions for dual switches. DPS achieves soft switching conditions for power diodes at secondary side of transfor- mer. The detailed circuit operation of converter with proposed passive snubber, theoretical analysis and design example are presented.
The measured result taken from a laboratory prototype rated at 160 W (32 V/5 A), input voltage of 150 V-DC and switching frequency of 300 kHz. The peak efficiency is 93%.
Introduction: The forward converter is widely used as a step-down converter in industry. However, the single-switch forward converter has some drawbacks, such as the transformer reset, hard switching and the high voltage stress on power switch. Some studies have introduced dual switches forward converter topology to solve these problems [1–4].
A zero-current transition (ZCT) zero-voltage transition (ZVT) forward converter without tertiary winding is presented in [1]. The ZVT turn-on and ZCT turn-off are achieved for power switch.
However, the auxiliary circuit and control system are very complex.
The peak stress current on main switch is high, thus the efficiency is low around 89%.At [2], a dual-switch active clamp forward converter is introduced to clamp the voltage stresses on forward switches to either the source voltage. This topology is good for off-line applications.
However, the additional auxiliary switch and isolated gate driver are needed, which increase complexity of the converter. Due to clamp capacitor voltage, the voltage stresses on auxiliary switch is high at full load. At the dual-switch forward converter (DSF) with RCD snubber [3], the tertiary winding is eliminated and the duty cycle can be increased higher than 50%. However, at this topology the snubber is lossy, due to snubber resistor, and the switching is hard. Thus, the efficiency is decreased. To overcome these limitations, a zero-current and zero-voltage-switching DSF is proposed in [4]. At this topology, the upper switch is switched under hard condition at light load, and the efficiency is decreased extremely in the load lower than 50% full load.
In this Letter, a dual-passive snubber (DPS) for DSF is introduced, to achieve zero-current switching (ZCS) turn-on and zero-voltage switch- ing (ZVS) turn-off for both switches at wide range of loads (10–100%
load). The DPS is lossless, without high voltage stresses on power switches. For proposed converter, the pulse-width modulation (PWM) control circuit is used, and the gate driver is such as traditional DSF converter.
The circuit scheme of DPS-DSF converter is shown in Fig.1.
S1
Vs
S2 D1
D2 D3
D4 Dr3 Dr2
Lr2 Lr1
L1k
Cr2 Cr1 Dr1 Dr4
Co Ro Lo
Fig. 1Proposed DPS-DSF converter
Circuit analysis and operation principles: Fig.2shows the theoretical waveforms of proposed converter at steady-state operation. The steady-state analysis and operation principles of the DPS-DSF achieved based on seven mode operating circuits are shown in Fig.3.
Mode 1 (Fig. 3a): At t=t0, both the power switches are turned on under exactly ZCS due to leakage inductor Llk. During this mode, the resonance between Cr1 and Lr1, Cr2 and Lr2, due to vCr1(t)=vCr2(t)=Vs occur. The Llk limits rate of rise of the diode D3 current, and the rate of fall of the D4 current. Thus, D3 turns on under exactly ZCS. DiodeD3 current iD3(t) reaches to output current Ioatt=t1, andD4turns off under ZCS condition, thus reverse recovery problem is eliminated.
iDr3, i
Dr4
iLr1, i
Lr2
nCr1, nCr2
nS1, nS2
iS1, iS2
VGS
Vs Zr1 Vs
Vs
Io
Io Io 2n
Zr1
t0 t1 t2 Io
t3 t4 t5 t6 t7 t
iD3
iD4 i1k
n
Fig. 2Theoretical waveforms
S1 Cr1 Vs
Cr2
Cr1
Cr2 L1k
Lr2 Lr2 Dr2
a b
c d
e f
g
Dr1 Dr4
Dr3 Dr2 Dr3
Cr1
Cr2 Dr1 Dr4
Dr2 Lr1
L1k
D1
D2 D3
D4
D1
D2 D3
D4 Io
S2 S1
Dr3
Dr1 Dr4D2 D3
D4 Io L1k
Dr2 Cr2 Cr1
Lr1
Dr3
Lr2 Lr2
L1k
D1
S1
S2
Vs Vs
S2 Dr1 Dr4 D2
D3
D1 S1
S2 Vs
Io D4 Lr1
Io
Cr1
Cr2 L1k
Lr2
Lr1 Lr2
Dr1Dr4
Dr3 Dr2 D1
D2 D3
D4 S1
S2
S1
S2 Vs
Vs
Io
Cr1
Cr2
Cr1
L1k
Lr2 Lr1
Dr1 Dr4
Dr3
Dr4
Lr2
Dr2
Dr1
Dr3 Dr2 Cr2 D1
D2
D1
D4 D3
D2 D3
D4 S1
S2 Vs
Io Lr2
L1k
Io
Fig. 3Seven operating modes of DPS-DSF aMode 1
bMode 2 c Mode 3 dMode 4 e Mode 5 f Mode 6 gMode 7
At the end of this mode, the switch currentsis1(t),is2(t) andiLlk(t) reach toIo/nwhere n=n1/n2 is the turn ratio of transformer. The time duration of this mode is derived as
Dt1=t1−t0=IoLlk
nVs (1)
ELECTRONICS LETTERS 20th July 2017 Vol. 53 No. 15 pp. 1064–1066
Mode 2 (Fig.3b):In this mode, the power is transferred to the load from Vs, through the diodeD3. TheiLlk(t)=Io/n, and the resonant between Cr1andLr1,Cr2andLr2continue. The voltage across snubber capacitors Cr1andCr2arrives−Vsatt=t2. WhenvCr1(t) andvCr2(t) reach to zero, the peak currents of both power switches are achieved as
IS1(PK)=Io n+Vs
Zr1, IS2(PK)=Io n+Vs
Zr2
(2)
where Zr1=
Lr1/Cr1
√ and Zr2= Lr2/Cr2
√ are characteristic impedances.
Att=t2, the resonancefinishes, and snubber diodesDr1 and Dr2
turn-off under ZCS. Thus, the switch currentsiS1(t) andiS2(t) reach to Io/n. Time duration of this mode is
Dt2=t2−t1= p
vr1−Dt1= p
vr2−Dt1 (3) where vr1=1/
Lr1Cr1
√ and vr2=1/ Lr2Cr2
√ are the resonant frequency.
Mode 3 (Fig.3c): D3and both power switches conduct. The power is transferred to load. The vCr1(t)=vCr2(t)= −Vs, and Io/n flows in primary.
Mode 4 (Fig. 3d): At t=t3, both the switches turn off by control system, and snubber diodesDr3 and Dr4 turn on, due to reflected to primary load current. The reflected load current for each snubber diode equals Io/(2n). Since vCr1(t)=vCr2(t)= −Vs, the voltages across switches are zero at this time. Therefore, power switches turn off under exactly ZVS condition. During this mode, each snubber capacitor discharges to load linearly by Io/(2n), and voltage across switches increase. Att=t4, snubber capacitor voltages fall to zero, and diodeD4 turns on under ZCS. Time duration of this mode is
Dt4=t4−t3=2nVsCr1
Io =2nVsCr2
Io (4)
Thus,Cr1=Cr2.
Mode 5 (Fig.3e):During this mode, the resonance between snubber capacitors and Llk occur. Att=t5, snubber capacitor voltages reach Vs, and snubber diodes turn off. Thus, the diodesD1 andD2 turn on under ZCS, and voltage across each power switches is clamped toVs. Time duration of this mode is
Dt5= 1
vlkarcsin 2nVs ZlkIo
(5) wherevlk=1/
LlkCr1
√ andZlk= Llk/Cr1
√ .
Mode 6 (Fig.3f):At this mode, transformer starts to reset throughD1
andD2. At t=t6, theLlkis fully discharged, and diodeD3turns off under ZCS.
Mode 7 (Fig.3g):Att=t6, the load currentflows throughD4, and free- wheeling mode of conventional forward converter begins. One switch- ing cycle ends att=t7.
Snubber elements design procedure: The snubber capacitorsCr1 and Cr2 are used to achieve ZVS for power switches at turn off state. The minimum values of snubber capacitors can be obtained from (4) as
Cr1(min)=Cr2(min)= Io
2nVs·DtZVS (6) To guarantee the ZVS turn off, the ZVS timeDtZVSshould be selected larger than the fall time (tf) of power switches. At the end of mode 5, the leakage inductor current ilk(t) nulls zero approximately. Thus, the inequity Dt5≤p/(2vlk) can be satisfied. Therefore, the maximum values of snubber capacitors can be derived from (5) as follows:
Cr1(max)=Cr2(max)=Llk Io 2nVs
2
(7) To complete the resonant at minimum turning-on time of switches, the conditionD(min)Ts.p/vr1 should be satisfied. WhereD(min) is the minimum duty cycle, therefore, the values of resonant inductors are derived as follows:
Lr1(max)=Lr2(max)≤(Ds(min)Ts)2 p2·Cr1
(8)
Experimental results and comparison: To verify the theoretical analy- sis, a prototype of 160 W (32 V/5 A) and 300 kHz DPS-DSF converter, for 32 V output and 150 V input is built with the following parameters:
power switch: IRF740, diodesD3andD4: 30H150CT, EE32 ferrite core for transformer,n=1.5,Llk=6mH,Lo=85mH,Co=47mHdiodes D1 and D2: HER603, snubber capacitors: 1.8nF, snubber diodes:
HER603,Lr1=Lr2=14mH.
The measurement experimental waveforms of the proposed converter are shown in Fig.4. The voltage and current waveforms of switches are shown in Fig.4a. These waveforms illustrate that the power switches are turned on with ZCS, and turned off under ZVS. Fig. 4b shows the vCr1(t)=vCr2(t),iDr1(t)=iDr2(t) andiLlk(t). The current waveforms of output diodes are shown in Fig.4c. It can be noted that, the diodes turn on/off with ZCS. Fig.4dshows the efficiency comparison of the DPS-DSF converter with converter in [4].
is1(t),is2(t) = 2 A/div i
Llk= 2 A/div
iLr1=iLr2= 2 A/div ns1=ns2= 100 A/div
VD4= 50 V/div
VD3= 50 V/div iD3= 5 A/div
iD4= 5 A/div
nCr1=Cr2(t) = 100 V/div ZCS
ZVS
VGS=10 V/div
100
a b
c d
98 96
[4] proposed 94
92 90 88 86 84 82 80 78 76 74 72 70
20 40 60 80 100
load power, w
efficiency (%)
120 140 160
Fig. 4Experimental waveforms of DPS-DSF aCurrent and voltage of switches
bResonant currents and voltages c Current and voltage of output diodes dMeasured efficiency versus load
Conclusion: A DPS for DSF converter has been presented in this Letter.
The DPS achieved ZVS turn-off for both switches, without high voltage and current stresses, at wide range of loads. Additional features include PWM control system with soft switching for output power diodes. The experimental results obtained from a 160 W prototype have been verified the theoretical analysis and design procedure.
© The Institution of Engineering and Technology 2017 Submitted:1 March 2017 E-first:26 June 2017 doi: 10.1049/el.2017.0790
One or more of the Figures in this Letter are available in colour online.
K. Soltanzadeh and R. Riahi (Young Researchers and Elite Club, Najafabad Branch, Islamic Azad University, Najafabad, Iran)
✉E-mail: [email protected]
M. Dehghani (Department of Electrical Engineering, Najafabad Branch, Islamic Azad University, Najafabad, Iran)
References
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switch forward DC/DC converter’. 2004 IEEE 35th Annual Power Electronics Specialists Conf., PESC 04, Aachen, Germany, June 2004, vol. 2, pp. 1465–1469
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