Chap. 11 Energy and Power in Digital Circuits
Average Power in an RC Circuit Power Dissipation in Logic Gates
CMOS Logic
RC Circuit with a Switch
Find energy dissipated in each cycle Find the average power.
During T1
Energy Computation
Total energy provided by the source during T1
Energy stored in the capacitor:
Energy dissipated in the resistor:
– Independent of R
C R T
if CV
e CV
dt R e
V V dt
i V E
S
C R
T S
T RC
t S
S T
S
1 1
2
2
0 1
0 (1 1 )
1
1 1
1
2
2 1
S
C CV
E
2
1 2
1
CVS
E
During T2
If we assume
Capacitor energy is fully discharged = Energy dissipated by the resister:
- independent of R C R T2 2
2
2 2
1
CVS
E
Putting Together
Energy dissipated in each cycle
– assuming that Capacitor is fully charged and discharged during the period.
Average power
2 2
1 E CVS
E
E
f T CV
P E S2
Power Dissipation of Inverter
During input is low
During input is high
Easy way to solve
Average power = static power + dynamic power – Static power: independent of the frequency
– Dynamic power: charging-and-discharging of the capacitor
Average Power
Static power + dynamic power
Static power: Independent of the switching frequency.
Dynamic power: related to switching capacitor
ON
L
R
R
L L L
ON L
dynamic static
C R
T R
R R
P P
2
Example II.1
k R k
R
L100 ,
ON10
Worst static power dissipation
RL
VS
Some numbers
L L L
ON L
dynamic static
C R
T R
R R
P P
2
Power Minimization
Dynamic power
– Reduce the supply voltage (5V -> 1.5V)
• Change the voltage on need
– Reduce the capacitance – Reduce the frequency
• Turn off clock when not in use
Static power – CMOS logic
PMOS
CMOS Logic
CMOS Inverter
No static power!
- No direct path from the supply to ground
Dynamic Power of CMOS
f CV P S2
Static Power of CMOS
Leakage power
Transient current
vIN
iT
Some Examples
Example II.6: Processor SA27E
- # of gates = 3M, 25% activity MHz f
V V
fF
CL 30 , S 1.5 , 425
) 2
(#
)
( L S
dynamic Fraction switching gates fC V
P
Exercise
Estimate the power of the following processor (~ P-IV)
- # of gates = 25M, 25% activity GHz
f V
V fF
CL 1 , S 1.5 , 3
Summary
Total power = static power + dynamic power
CMOS does not exhibit static loss
Dynamic power
– Reduce the supply voltage
– Reduce the switching activities
– Turn off the logic not in use (clock gating) ) 2
(#
)
( L S
dynamic Fraction switching gates fC V
P
Chap. 12 Transients in Second- order Circuits
LC Circuit RLC Circuits
LC Circuit
Solutions
Find the particular solution
Find the form of homogeneous solution
Use initial condition to obtain the total solution
< example >
t V0
) (t vI
Zero initial condition:
0 ,
0
L
C i
v
Homogeneous Solution
General Form: vH(t) Aest
j LC s
Ae e
LCAs st st o o 1
,
2 0
Find A1 and A2 from initial conditions
Total Solution
Total Solution: Plot
Undriven LC Circuit
Energy
Observations from undriven LC Circuit
1. LC circuits are capable of oscillation
2. Important time constant:
3. Characteristic impedance
LC
C L
C L i
i v v L
W C
peak peak peak
peak
C C L
C
T 2 2
2 2
Example 12.1
) 10
, 5 . 0 (
, 100
,
1 F L H i A v V at some t
C L C
RLC Circuits
Series RLC Circuit: second order circuit
) 1 (
) 1 (
) ( )
(
2 2
t LC v
t LC v
dt t dv L R dt
t v d
S C
C
C
Homogeneous Solution
o
o o
t s t
s C
s
L LC s R
s
e K e
K t
v
2 2
, 1
2 2
2 1
, 1 , 2
0 2
)
( 1 2
Overdamped case: real and distinct roots
Critically damped case: real and repeated roots
Underdamped case: complex conjugate roots
)
2 (
2 2
,
1 o wo
s
)
2
(
,
1 o o
s
)
2 (
2 ,
2 ,
1 j d d o o
s
Natural Response: overdamped case
5 . 1 ,
1 ,
2 1
1 K o
K
Natural Response: Critically damped case
1 ,
1 ,
2 1
1 K o
K
t t
C t st
s
C t K e K te v t e te
v ( ) 1 2 ( )
Natural Response: Underdamped case
2 . 0 ,
1 ,
2 1
1 K o
K
Response to step input voltage
o 1, 0.2 ~ 4 Zeta
Exercise: Parallel RLC Circuit
V V
H L
F C
k
R 5 , 1 , 1 , S 25 Find iL(t)
assume zero initial state
Exercise
+
L v(t) 1k
= u(t)
+
- vc(t)
F 3 1
Find the range of L to make vC(t) to be overdamped
1
0 t
vs(t) = u(t)
Find the differential equation for capacitor voltage. Find the total response with the following initial condition.
iL (0) = 4 mA, vC (0) = 0 (V)
2k
F 1H
1 4 2k
4mA
+
- vc(t) +-
12V
Exercise
Example 12.4 Ideal Switched Power Supply
+
-
C
vC
iL
S1 S2
L
V
S1
S2
T
cycle 1
iL
vC
(1) S1 on, S2 off
L
(2) S1 off, S2 on until inductor VT
current becomes zero (3) S1 off, S2 off
Summary
LC Circuit
RLC Circuit
– Three kinds of transient responses
• Over-damped
• Critically damped
• Under-damped
Chap. 13 Sinusoidal Steady State:
Imdepance and Frequency Response
Sinusoidal Steady-state Response Impedance
Frequency Response Filter
Sinusoidal Response of RC Circuit
) 2 (
t j t
j i I
e V e
t v
Find the particular solution to j t
i
e
V
Total solution
Sinusoidal Steady State (SSS)
Particular solution for sinusoidal input after transients have died
All information of SSS is contained in the complex amplitude
V
C V
CRC j
V
i
1
Magnitude Plot
Phase Plot
Impedance Model
Impedance Model
Circuit corresponding to a complex exponential input
I C
V V
Series RLC Circuit
Exercise 1
+
2 1H
1F
10cos2t find vC
Find v(t) at steady state (time unit: msec)
+
1k 2k
+
-
v(t) 1F
sint cos2t
Exercise 2
What we are doing? The Big Picture
Frequency Response
Frequency Response of Basic Elements
RC and RL Circuits
RLC Circuits
Resonance
Equivalent impedance = Resistor
Circuit response is maximum
0
CL
Z
Z
Another Example
AM Radio Receiver
Selectivity
Quality Factor: Q
Quality Factor
Lower R, higher Q
Another interpretation
Find the resonance frequency and the equivalent impedance at resonance.
2k
0.2F 600
200mH Z
Exercise
Summary
Sinusoidal Steady-state Response
Impedance
Frequency Response
Filter