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Lecture 17. Estimating Time Constants of Linear Circuit Networks – Part 2

of Linear Circuit Networks Part 2

Jaeha Kim

Mixed-Signal IC and System Group (MICS) / ISDL Mixed Signal IC and System Group (MICS) / ISDL Seoul National University

[email protected]

j @ g

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Overview

Readings

Y I Ismail et al “Equivalent Elmore Delay for RLC Trees ”

Y. I. Ismail, et al., Equivalent Elmore Delay for RLC Trees, TCAD, 01/2000.

Introduction

We will look at an alternative method to estimate the time constants of linear circuit networks. While the OCT was suitable for estimating the dominant pole position, Elmore delay is more suitable for estimating the delay or rise time delay is more suitable for estimating the delay or rise time.

This lecture introduces an extended Elmore delay for linear circuits including inductors.

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RC Elmore Delay Review

Elmore delay estimates 50% delay in the step response by approximating it as that of a first order linear system:

by approximating it as that of a first-order linear system:

0.9 1

0 4 0.5 0.6 0.7 0.8

0 0.1 0.2 0.3 0.4

0

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Delay of a Single-Pole System

A single R-C circuit

For a step input (e g 0 to Vdd)

For a step input (e.g. 0 to Vdd)

h

Vout

where

Then delay to 50% Vdd is: 0 30.40.5

0.6 0.7 0.8 0.9 1

Then delay to 50% Vdd is:

0 0.1 0.2 0.3

0 0.5 1 1.5 2 2.5

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Use “Moment Matching” to Find (=b

1

)

Look at the step response waveforms of both circuits

Specifically look at the area below the waveforms (1st moment)

Specifically, look at the area below the waveforms (1st moment)

Choose the single pole  such that the areas match

The area under an exponential is :

The area under an exponential is :

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Matching Moments of RC Network

R3

C3

DC

R1 R2

C3

C1 C2

For a general RC network we want to find the area

C2

For a general RC network, we want to find the area under its step response

And approximate the area as the optimal time-constant  for a single-pole model

Luckily, there is an easy way

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Matching Moments of RC Network (2)

R3

C3

DC

R1 R2

C3

C1 C2

To change its value a current must flow through each C

C2

To change its value, a current must flow through each C

This current Ik is Ck·dVk/dt, for the capacitor at node ‘k’

Only way for the charge to leave the system is:

t fl th h th i t b t C d G d ( Vdd) to flow through the resistors between Ck and Gnd (or Vdd)

Voltage is dropped across each resistor that carries Ik

But, computing Ip g kk directly is not easy in generaly y g

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Matching Moments of RC Network (3)

R3

C3

DC

R1 R2

C3

C1 C2

While I don’t know what I

k

is

C2

I DO know what the integral of this current is  Qk = CkVk!

And we can compute the area under the response as:

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Elmore Time Constant

The time constant of a single-pole network that estimates the response

R3

C3 p

of the network is:

DC

R1 R2

C3

C1 C2C2

Rik  the resistance that the resistive path from input to node k and the resistive path from input to node i (=output) have in common

If all Vi’s are equal (e.g. = Vdd), then:

"Elmore time constant"

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Elmore Time Constant (2)

"Elmore time constant"

This is the first moment of the RC network

And our estimate of the circuit’s time constant

And our estimate of the circuit’s time constant

Hence, the 50% Vdd delay is:

Side note:

Side note:

When the RC circuit is a “tree” (i.e. with no resistor loops)

It’s easy to find Rik by inspection

Fi d th i t f th th (i i) d (i k)

Find the common resistance of the paths (in, i) and (in, k)

Even for other RC networks, Rik always exists

Rik is simply the voltage change seen at the output i, by a current injected at node k.

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Elmore Delay Example

R3

C3

To determine R

ik

, just look

f th i t

DC

R1 R2

C3

C1 C2

for the common resistors on the current flow path back to the input

The purple line is the current flow from C3 to the input

C2

back to the input

Output

If the output is node ‘2’, Rik=R23 = R1

The blue line is the current flow from C2 to the input

If the output is node ‘2’ Rik=R22 = R1+R2

If the output is node 2 , Rik R22 R1+R2

Another (more formal) way to determine R

ik

:

Inject a current at node k, and measure the voltage induced atj , g

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Elmore Delay Summary

In summary, the delay estimate is easy to find:

Fi d it i th i it th t h it l

1. Find every capacitor in the circuit that changes its value

2. Find the voltage that a current injected from this capacitor (k) will produce at the output (i) and define the effective

will produce at the output (i), and define the effective resistance, Rik, equal to this voltage/current

3. Sum CkRik, over all nodes k that change value

This sum is an estimate of the time constant

We can apply this to distributed elements like wires too pp y

Look at a small segment of the wire of length dL, and then add up delay contribution from all of these small segment

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Elmore Delay – Limitation

Works well in most cases

Output at the end of a long line can almost always modeled

Output at the end of a long line can almost always modeled as a single-pole model

Works even when two poles are closely spacedp y p

Poor where there is a pole-zero pair:

Output is sum of two exponentials R1 Rlarge

Vout

Output is sum of two exponentials

One is slow with low amplitude

One is fast with full amplitude

DC

g

Clarge C1

p

In example shown on right

Decays with R1C1 to R1/(R1+Rlarge)

Then decays with time constant Clarge(Rlarge +R1)

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Example – A Pole-Zero Pair

1

This plot shows a ‘bad’

output (circuit below)

0 6 0.8

output (circuit below)

Tail is 10 times slower

With only .3 full swing

0.4 V t( ) 0.6

V e t( )

y g

Moments are not the best model for this case

0 1 2 3 4 5

0 0.2

t

best model for this case

1 2

t

0.1 0.3

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Elmore Delay for RLC Network?

With inductors, there may exist complex poles in the circuits (i e resonance)

circuits (i.e. resonance)

Its step response may exhibit ringing – its non-monotonic response cannot be approximated by a first-order systemp pp y y

Why worry about L?

On-chip interconnectp wires do exhibit L effects

Due to high frequency

Due to high-frequency operation and low

resistance (thick top metals)

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Why Use L? – Inductive Peaking

Inductors delay current flows; each C charges faster Inductors delay current flows; each C charges faster

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The Simplest RLC Circuit

Its normalized TF (i.e. gain=1) is:

which can be expressed by the natural frequency (

n

) and damping factor (): p g ()

h

where

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The Time-Domain Response

The step response of the second-order system H(s):

And the 50% propagation delay and 10-90% rise time can be estimated as:

Note: I think these expressions have typos – fix them

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Extended Elmore Delay

Let’s approximate a

general RLC network as general RLC network as a second-order system, since it can express non- since it can express non monotonic responses (when < 0.7)

How do we determine 

n

and ? 

In the spirit of Elmore delay, match the first and second moments (m1 and m2)

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RLC Elmore Delay – First Moment

Now with inductors,

Since the first moment m

1

is the area under V

i

(t):

The same expression as before!

The same expression as before!

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RLC Elmore Delay – Second Moment

Skipping some intermediate steps…

???

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Summary

You can approximate an arbitrary RLC network as a second-order system with:

second-order system with:

Important observation:

For a given (for the desired settling response), there is a determined ratio between RC and sqrt(LC)

It implies that the delay is still a linear function of RC

It implies that the delay is still a linear function of RC

Therefore, the Logical Effort framework will still apply!!

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