VGS Chapter (4) Large – Signal Amplifiers dc valu

JFET

• Biasing FET complicated ac signal

superimposed on dc value - V_GS

dc value - V_GS

• V_GS varies from sample to sample and with temperature.

•- V_GS need another negative battery V_GG,

• R_S placed between S and ground S at potential I_D R_S

• Better biasing Fig. (12-6C) where R₁ R₂ voltage divider placed G desired potential with respect to ground

.

DD GG G

G DD

GG V

V R

R R R

R R

R

R R R

V R R

V R =

= + + ∴

+ =

=

2 1

1 2

2 1

2 1 2

1

1 , ,

G G

GG DD

G R R

R R R

and V

R V R

= −

=

2 1 2

2

The voltage around the gate "loop"

∑

^{V = 0 = V GG − I G R G − V GS − I D R S ,} neglect I R

Thevenin equivalents

∑

^{V = 0 = V GG − I G R G − V GS − I D R S ,}

GS GG

S

D

R V V

I = −

neglect I_GR_G

D

GS GG

s I

V

R V −

=

• Q point (I_D, V_GS ) V_GG R_G R₁ R₂

• Stable V_GG must be large compared (V_GS) the effect of any shift in V_GS reduced.

See Table 12 -1

Example 1

Enhancement MOSFET

•

Normal operation requires

V

_GS

proper polarity

attract holes or electrons for

conduction in the channel conduction in the channel

•

In the transfer

characteristic the out put and the input need

V

_GS

be positive

divider bias -

Voltage

• V_DD divided by R₁ and R₂

• V_GG proper magnitude and polarity V_GS = V_GG - V_S = V_GG – I_D R_s

feedback bias -

Drain - feedback bias Drain

• ∆∆∆∆ I_D due to changing device or circuit parameters fed back to the gate

• I_G negligible R_G very high V_GS = V_DS

• V_GS > V_T Operation in the normal region see ex (1) in Ch (6)

• if i_D increase for any reason V_DS and V_GS decrease

BJT Biasing

Normal operation of BJT

E - B junction is forward C - B junction is reveres

Common - emitter configuration

• voltage have the same polarity can be supplied by the single battery

Complicated biasing problem

Variation in parameters among a mass-producted transistor Sensitivity of semiconductor to temperature

Fixed - Current Bias

•

I

_B

= (V

_CC

/R

_B

)

Q

known if the collector characteristics known

precisely

but it doesn't .

αα

αα αααα α α α α ββββ

• i_C = (αααα /1 - αα)iαα _B + (I_CBO/1 - α α α α ) = ββββ i_B + (I_CBO/1 - ααα)α

• i

_C

vary widely with large variations in β β β β and I

_CBO

expected

among mass -

produced transistor

b), 9 . 12 In Fig (

• I

_B

= 0.3 β β = 50 β β

placed Q in the linear region of the output characteristic of transistor

• β β β β = 120

I = 0.3

I

vary

• β β β β = 120

I

_B

= 0.3

I

_C

vary widly with temperature

• β β β β increases

linearly with temperature

• I

_CBO

increases

exponentially

with temperature

Thermal Runaway

•

At the collector junction the power loss because V_DS high compared to low V_BE forward -biased emitter junction .

(1 )

C B C B O

i = β i + + I

• I_C increases power developed increased the junction temperature increases I_CBO ββββ I_C increasing and so on.

• Regenerative heating cycle occur thermal runaway transistor Destruction

Overcome Thermal runaway

• Cool the transistor

• Used an effective biasing circuit.