The UPFC Controller

UPFC

4.3.2 The UPFC Controller

When a STATCOM is operating as a part of a larger UPFC, the high level STATCOM controls remain exactly the same as those for a stand-alone STATCOM, as described in section 4.2.2.

However, as stated earlier, the high-level controls for a stand-alone SSSC must be modified when the SSSC forms part of a UPFC. When an SSSC operates as a stand-alone device additional control is required to regulate the dc capacitor voltage. This control requirement is no longer necessary for the SSSC when it forms part of a UPFC, since the dc capacitor voltage is now controlled by the STATCOM.

Fig. 4.8 shows the high-level control block diagram of a three-level inverter-based SSSC that forms part of a UPFC, as developed by Sen [27], where the magnitude of the ac output voltage from the inverter is varied by controlling the gain across the inverter. Although the SSSC may be operated in various modes as described earlier, it is operated in the voltage injection mode in [27], which allows the series injected voltage vector to be at any magnitude and phase commanded by the reference inputs [14]. The high level control therefore differs from that in the stand-alone SSSC, described in Chapter Three, where the device was designed to operate in the line impedance emulation mode, such that the injected voltage vector is restricted to be in quadrature with the line current.

Since the SSSC as a part of a UPFC is operated in the voltage injection mode in [27], there are two reference inputs to the high-level controls, namely the desired magnitude and phase of the series injected voltage. These reference inputs to the SSSC are defined as ~ (phase of the SSSC's ac voltage relative to the transmission line voltage vector Vj) and Vdq

*

(magnitude of the SSSC's injected ac voltage in per unit). Consequently, the two control requirements of an SSSC in this mode of operation can be described as follows:

1. Phase Control: In order to apply any phase shift ~ to the series injected voltage, the system phase angle needs to be first tracked and locked by the SSSC control.

2. Ma!!Ilitude Control: The magnitude of the series injected voltage is determined by varying the gain across the inverter i.e. changing the dead angley.

Given the two control requirements of an SSSC described above, Fig. 4.8 is once again dissected into two corresponding sub-sections, namely, phase control and magnitude control. The output of this high-level controller then provides the input for the gate pattern logic i.e. the low-level controls which determine the firing signals for each switching device within the inverter. Each of the two sub-sections of the high-level SSSC controller is described as follows.

1- - - -,

I I

I I

I Dead Angle I

Vdq* I • Calculator I

I I

I

t Magnitude Control

I

I I

V

^{DC I I}

______ L , II

I :

'Y

^I

~

^{I I}

I : I

I

8 '

Gate ^I

: Phase-Locked 8

^{2 I} Pattern

I

Loop

Logic

I I

I

Phase Control

^{I I}

, I

L , _

Fig.4.8: Control block diagram of three-level inverter based SSSC as a part of a UPFC [27J.

4.3.2.1 Phase Control

A phase locked loop is employed to ensure that the series injected voltage vector is in synchronism with the transmission line voltages, and can be adjusted in phase relative to these voltages. The mechanism behind the phase locked loop will not be repeated here as it was explained in detail in Chapter Three and briefly reviewed in section 4.2.2.1 of this chapter. The commanded relative phase angle, _~, at the input to the SSSC controls is simply added onto the instantaneous phase angle 8 at the output of the phase locked loop to give the final angle 8₂of the SSSC's injected ac voltage vector. Fig. 4.9 shows a more detailed version of the phase control sub-section of the full SSSC control scheme shown in Fig. 4.8. In practice, the phase angle 8 is obtained from the same phase locked loop used for the STATCOM controls, that is the SSSC and STATCOM controls are synchronised to the same transmission line voltage using a single phase locked loop.

Fig.4.9: An expanded diagram of the Phase Control sub-sectionfram Fig. 4.8.

4.3.2.2 Magnitude Control

With respect to the desired ac compensating voltage Vdq*,the magnitude control in the SSSC as a part of the UPFC is similar to the stand-alone three-level SSSC described in section 3.5.2.2 of Chapter Three. The only difference in the implementation is that the desired ac compensating voltage, V_dq*, is an independent input to the control system in the UPFC, whereas the desired compensating voltage V_q

*

in the stand-alone SSSC is a function of the desired compensating reactance to be emulated. Apart from that, the magnitude of the SSSC output voltage is still varied using the dead-angle of the inverter, so the magnitude control is required to determine the correct value ofybased on the desired value of Vdq

*

and the actual value of the inverter's dc voltage (as determined by the STATCOM).

The relationship between the magnitude of the compensating voltage vector and the dead angle,y, for a 24-pulse three-level inverter is defined [27] as

Vdq

= ~ ^v

^DC

cos(l!- )cos r

Jr 24 (4.1)

Since the desired output is the dead angle, by changing the subject of the formula, Equation (4.1) becomes

r= cos-

^{1 (4.2)}

Therefore, depending on the desired inverter ac voltage output (i.e. i:he commanded value ofVdq*) and the actual value ofVdc , the controller will determine the correct value ofybased on Equation (4.2). This calculation ofyfrom Vdq* and Vdcusing Equation (4.2) is shown as the Dead Angle Calculator block in Fig. 4.10. The dead angle y, is then directly output to the low level firing controls of the SSSC's inverter.

Dead-Angle Calculator

---,

: I

I~

^"-

¹

^I

Vdq

*-tL0-- ^{cos (;4)} ~I ~ I· ^{EJ--I acos () I i • y}

~---t---~

^VDC

Fig.4.JO: An expanded and detailed diagram of the dead angle calculator sub-blockfrom Fig. 4.8.