Nano open house Ken David SS

(1)

I n t e l N a n ot e ch n ology V ir t u a l Ope n H ou se

1

Silicon Nanotechnology

at Intel

Ken David

Direct or of Com ponent s Research

Technology and Manufact uring Group

I nt el Corporat ion

Oct ober 22, 2004

(2)

I n t e l N a n ot e ch nology

Vir t u a l Ope n H ou se 2

Moore’s Law Continues…

Increase in microprocessor complexity owing to improvement in transistors, interconnect and packaging

4004 ₈₀₈₀ 8086

8008

Pentium® Processor

486™ DX Processor 386™ Processor

286

Pentium® II Processor Pentium® III Processor

Itanium® Processor

Pentium® 4 Processor Itanium® 2 Processor

1,000 10,000 100,000 1,000,000 10,000,000 100,000,000 1,000,000,000 10,000,000,000

1970 1980 1990 2000 2010

Source: Intel

(3)

I n t e l N a n ot e ch nology

Technology Node 0.5µm 0.35µm 0.25µm 0.18µm 0.13µm 90nm 65nm 45nm 30nm Transistor Physical Gate Length 130nm 70nm 50nm 30nm 20nm 15nm 1995 2005

1990 2000 2010

0.01 0.10 1.00 Micrometer Nanotechnology 10 100 1000 Nanometer

Transistor Scaling

Scaling to improve device speed/frequency of operation and to pack more transistors in a

(4)

Nanotechnology Research at Intel

N a n osca le m a t e r ia ls, pr oce sse s a n d

t e ch n ologie s w ill con t in u e t h e

im pr ove m e n t of ou r pr odu ct s:

Tr a n sist or r e se a r ch – for im pr ove d

de vice pe r for m a n ce a n d sca lin g.

I n t e r con n e ct r e se a r ch – for im pr ove d

w ir e con du ct ivit y a n d sca lin g.

M a n u fa ct u r in g r e se a r ch – for

(5)

I n t e l N a n ot e ch nology

Transistor Nanotechnology

Research at Intel

N ove l de vice a r ch it e ct u r e s, e .g. Tr i

-

-ga t e

ga t e

Ca r bon

N a n ot u be s

Si

a n d N on

-

Si

N a n ow ir e s

I I I

-

V M a t e r ia ls, e .g.

I n Sb

GOALS:

Con t in u e im pr ovin g de vice

spe e d/ clock fr e qu e n cy

M a in t a in / r e du ce pow e r con su m pt ion

(6)

I n t e l N a n ot e ch nology

New Device Architecture

Tri-gate

Si TSi

L_g

Si T

Planar fully depleted SOI

Double-gate (e.g. FINFET)

W_Si

L_g T_Si

Isolation

(Non-Planar)

(Planar)

W_Si

L_g

T_Si

Tri-gate

(Non-Planar)

Most

(7)

I n t e l N a n ot e ch nology

Nano-Device Structure Evolution

Tri-gate Transistor

Gate

Fully-Surround Gate Transistor

Best Electrostatics and Scalability

Improved Electrostatics

SiO2

Gate

SiO2

Improving electrostatics optimizes power consumption and performance

(8)

Tri-Gate Architecture:

Template for the future

Gate Si nanowires

(defined by lithography)

Gate

Silicon body, nanowires, nanotubes, etc. S DG Multiple

wires

Total Drive Current =

I_dper nanotube/nanowire x no. of tubes/wires

S DG

Gate

Electrode Source

Drain Sou r ce : I n t e l

(9)

Carbon Nanotube Transistor

Source

Carbon

Nanotube

-D = 1.4 nm

Gate

Drain

L

_g

= 75 nm

Chemically synthesized semiconducting

nanotubes with diameter=2nm form the transistor

channel.

(10)

Carbon Nanotube Research

Transistor Made at Intel

1.E-12 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 1.E-05

-3 -2 -1 0 1 2

GATE VOLTAGE [V]

DRA

IN CURRE

NT

[

A

]

V_DS -1.5 V -1.0 V -0.5 V Carbon nanotube

P-ch Transistor

(11)

Relative performance benefit of

Carbon Nanotube transistors

Potentially 3X faster transistor at same size and

power consumption with use of CNT

75nm Lg CNT 75nm Lg PMOS

T

ra

n

si

st

o

r

S

p

eed

(standard transistor)

(12)

Semiconductor Nanowires

5 nm Si Nanowire

Metal Gate 2.0 nm High-K

Chemically synthesized silicon nanowires with diameters <20nm (not defined by lithography).

Si Nanowire

(13)

Si-Nanowire Research Transistor

Made at Intel

1.E-13 1.E-11 1.E-09 1.E-07 1.E-05

-1.5 -1.0 -0.5 0.0 0.5 1.0 1.5

GATE VOLTAGE [V]

DRA

IN CURRE

NT [A

]

Si-Nanowire

P-ch Transistor

VDS = -0.25 to -1V Step: -0.25V

Functional Si nanowire

(14)

Another Nano Concept: Compound

Semiconductor (lll-V) Transistors

Gate

Drain

Source

Multi

epitaxial

layers

Research transistor based on multi-epitaxial layer

structure in compound semiconductors.

(15)

Relative performance benefit of

compound semiconductor

transistors

0.2um InSb 0.2um NMOS

Po

w

e

r

C

o

nsum

pt

io

n

0.2um InSb 0.2um NMOS

T

ra

n

si

st

o

r

Sp

e

d

(standard transistor) (standard transistor)

(16)

I n t e l N a n ot e ch nology Vir t u a l Ope n H ou se

Carbon Nanotube

(17)

I n t e l N a n ot e ch nology

Carbon Nanotube Tutorial

RolledRolled--up graphene sheet ( s)up graphene sheet ( s)

RollRoll--up vect or det erm ines up vect or det erm ines

elect ronic propert ies of t ubes

m et allic

sem iconduct ing

Dim ensions:Dim ensions:

1

1--25nm depending on how 25nm depending on how t hey are form .

t hey are form .

Semi-conductor

Metal

Rρ

(18)

Carbon Nanotube Interconnects

_{Re sist a n ce of M e t a l lin e s incr e a se s a s lin e s a r e sca le d.}_{Re sist a n ce of M e t a l lin e s incr e a se s a s lin e s a r e sca le d.}

_{Ele ct r on s collide w it h w a lls of w ir e ca u sin g}_{Ele ct r on s collide w it h w a lls of w ir e ca u sin g}

in cr e a se in r e sist a n ce .

in cr e a se in r e sist a n ce .

_{Collision s ca n da m a ge w ir e ove r t im e}_{Collision s ca n da m a ge w ir e ove r t im e}

N a n ot u be sN a n ot u be s::

Con du ct cu r r e n t in a lin e a r fa sh ion a n d a void t h e se

collision s: 1

collision s: 1--D t r a n spor tD t r a n spor t

Able t o pa ss h igh cu r r e n t w it h ou t fa ilu r e : 1 0

Able t o pa ss h igh cu r r e n t w it h ou t fa ilu r e : 1 099 _{A/ cm}_{A/ cm}22

( Cu 1 0

( Cu 1 066 _{A/ cm}_{A/ cm}22₎₎

Good m e ch a n ica l st a bilit y ( st r e n gt h a n d t ou gh n e ss) ;

e n a ble s ot h e r pr oce ssin g ( e t ch / cle a n s)

(19)

I n t e l N a n ot e ch nology

Results – Aligned Nanotubes

Single t ube m easurem ent research st ruct ures_{Single t ube m easurem ent research st ruct ures}

SEM IMAGE AFM IMAGE

Aligned, separated and long (few microns) single

Aligned, separated and long (few microns) single--walled walled nanotubes

nanotubes with narrow diameter distribution (~1.0 nm) with narrow diameter distribution (~1.0 nm) have been produced with resistance lower than copper.

have been produced with resistance lower than copper.

1 µm

(20)

Nanomaterial Manufacturing

Research

Carbon nanotubes have important material properties

Carbon nanotubes have important material properties

•

•High thermal conductivityHigh thermal conductivity •

•High current carrying capabilityHigh current carrying capability •

•Metallic or Metallic or semiconductingsemiconducting In their current form

In their current form nanomaterialsnanomaterials are difficult to utilize are difficult to utilize to build integrated circuits.

to build integrated circuits.

Intel has research programs to bring these materials from lab to fab

(21)

Nanodevice patterning

N a n ot u beN a n ot u be pa t e r n in gpa t e r n in g pr oce ss de ve lope d t o m a k e pr oce ss de ve lope d t o m a k e

de vice s.

de vice s.

SEM image following nanotube deposition

Mask for e-beam litho

Metal electrodes after:

• e-beam litho

• contact evaporation

• liftoff

1 2 3

Contacted nanotube

(22)

Carbon Nanotube Growth

Chem ical Vapor Deposit ion ( CVD)

H₂ CO

patterned

wafer 5 microns

nanotube

Fe-nanoparticle catalyst

tube furnace

900 °C Sou r ce : I n t e l

CVD method has been

(23)

Intel Nanomanufacturing Research

Ou r Appr oa ch e s:

Ou r Appr oa ch e s:

N a n ot u be fu n ct ion a liz a t ionN a n ot u be fu n ct ion a liz a t ion

•

• To isola t e in dividu a l t u be s fr om To isola t e in dividu a l t u be s fr om m ix e d bu n dle

m ix e d bu n dle

Sor t in gSor t in g

•

• Se pa r a t e n a n ot u be t ype s & siz e sSe pa r a t e n a n ot u be t ype s & siz e s

Asse m bly in t o u se fu l for m sAsse m bly in t o u se fu l for m s

•

• D ir e ct e d se lf a sse m blyD ir e ct e d se lf a sse m bly

(24)

Nanomanufacturing Research

Optical Trapping To Sort Nanotubes

Current Research Results

H₂O

SWNT Laser Beam Optical Trap 0 0.5 1 1.5 2 2.5

150 170 190 210 230 250 270 290 310

Raman Shift (cm-1)

N o rm a liz e d In te n s it y ( a .u .) Reference Optical Trap Metallic Semiconducting

(25)

Directed Self Assembly

Nanotubes are aligned parallel to the electric field Research Results

Aligned Nanotubes Electric Field Alignment

(26)

Conclusions

M oor eM oor e’’s La w is a live a n d w e ll: CM OS t r a n sist or s La w is a live a n d w e ll: CM OS t r a n sist or

sca lin g is e x pe ct e d t o con t in u e u n t il a r ou n d

sca lin g is e x pe ct e d t o con t in u e u n t il a r ou n d

2 0 2 0 , w it h n e w a r ch it e ct u r e s su ch a s

2 0 2 0 , w it h n e w a r ch it e ct u r e s su ch a s t r iga t et r iga t e, , ca r bon

ca r bon n a n ot u be sn a n ot u be s, , n a n ow ir e sn a n ow ir e s a n d I I Ia n d I I I --V.V.

I n t e l h a s in it ia t e d in t e r n a l r e se a r ch pr ogr a m s a s I n t e l h a s in it ia t e d in t e r n a l r e se a r ch pr ogr a m s a s

w e ll a s e x t e n sive j oin t r e se a r ch pr ogr a m s w it h

u n ive r sit ie s a n d con sor t ia on n a n ot e ch n ology

Pr om isin g r e se a r ch r e su lt s in a r e a s su ch a s Pr om isin g r e se a r ch r e su lt s in a r e a s su ch a s

spin t r on ics

spin t r on ics, ph a se ch a n ge , a n d opt ica l sw it ch e s, , ph a se ch a n ge , a n d opt ica l sw it ch e s, m a y pr ovide a pa t h for be yon d 2 0 2 0 .