B. A Single Event Linear Analytical Model for DLLs
1. DLL SET Model Validation and Critical Constant V crit
Figure VII-3 illustrates an example of a voltage transient perturbation on the charge pump resulting from a perturbation at the output of the CP sub-circuit. The simulation was performed on a DLL designed in 90 nm PDK. A DC current source (IDC) was used to model single event transients in CADENCE and the charge deposited was obtained by integrating the current over time using CADENCE calculator tool. The single event transient was induced by a 65.4 fC charge deposited at the output node of the CP and collected by the loop filter capacitor. As indicated in Figure VII-3, the simulated recovery time, ignoring any settling effects is approximately 34.74 ns. Using the Equations (12) and (14), for an ion strike in the CP, the estimated recovery time is 32.3 ns, which represents a 7% deviation from the simulated DLL recovery time. As indicated in Figure VII-2, the simulated recovery time ignoring any settling effects is approximately 140 ns. Equations (16), (17) show the calculation of Ve and Trec following a perturbation in the charge pump using the parameters in Figure VII-3:
( )
( ) (16)
( ) (17)
The calculated recovery time Trec and voltage perturbation Ve show less than a 10%
deviation when compared to the simulated DLL voltage perturbation and recovery time. This first example shows a good correlation between the SE model and the simulations.
Fig. VII-3 DLL acquisition curve, at 1 GHz for a charge deposition of ~66 fC within the charge pump of the 90nm DLL, illustrating the voltage perturbation Ve and the recovery time Trec of the
circuit.
In order to validate the proposed SET model for DLLs, the single event transient response of the DLL was compared for different charge depositions against the DLL analytical model for 1,000 data points. Figure VII-4 illustrates the comparison between simulations and the linear model within a range of ~ 110 data points for the voltage perturbation model. The analytical model matches the simulation with a 95% confidence level. In the same manner, Figure VII-5 illustrates the comparison between simulations and the linear model within a range of ~ 110 data points for the recovery time model. Figures VII-4 and VII-5 reveal a noticeable divergence between the DLL linear model and the simulations that becomes noticeable at higher values of
deposited charge. When the amount of charge deposited in the circuit exceeds a critical value, then the DLL will not recover and the recovery time of the circuit will tend to infinity (Trec ∞).
The divergence observed between the DLL linear model and the simulations can be explained by the illustration in Figure VII-6. As shown in the figure, increasing the amount of charge deposited in the DLL linearly increases the voltage perturbation generated by the circuit until, for a threshold charge deposition value, in this example 150 fC, the DLL will be forced to lock at π due to the limitation of the phase detector operating range, thus the recovery time of the analog DLL is considered infinite.
Fig. VII-4 Comparison between the simulated (Ve (sim)) and calculated (Linear Fit) voltage perturbation (Ve) for different charge deposition within the charge pump of the DLL, in 90 nm technology node . The DLL analytical model matches very well the simulations. Vcrit represent the
Fig. VII-5 Comparison between the simulated (Trec (sim)) and calculated (Linear Fit) recovery time (Trec) for different charge deposition within the charge pump of the DLL, in 90 nm technology node. The DLL analytical model matches very well the simulations until Ve reaches Vcrit value where the recovery time is infinite because the DLL does not recover to its initial lock
phase.
Fig. VII-6 DLL acquisition curve (DLL control voltage vs. time), at 1 GHz at different charge deposition (Q) values, illustrating the relation between the voltage perturbation Ve and the persistent inverted lock error generated by an ion strike in analog DLLs. Vcrit represents the minimum value of the control voltage perturbation Ve, which generates inverted lock errors and
the DLL to not recover to its original lock phase.
If Qe is higher or equal to that critical charge deposition value and even if the DLL re- locks, the recovery time of the circuit is considered infinite since the DLL does not regain its original locking phase. Therefore, we introduce a new critical constant for DLLs called the critical voltage perturbation Vcrit. Vcrit represents the minimum value (or threshold value) for the control voltage perturbation Ve, before the DLL will be forced to lock at plus or minus π phase radians and therefore never recovers. In addition, it is interesting to note that Vcrit usually represents the limits of the VCDL linear operating region. This observation will be useful for developing general guidelines for hardened analog DLLs and similar clock circuits.
Ve
Now that the critical constant Vcrit is defined, we can calculate and plot the single event transient analytical response of the DLL as a function of deposited charge, voltage perturbation and dead zone (Fig. VII-7). Note that the DLL recovery time is bounded by the phase detector’s dead zone. Within that range the voltage pertubation will not force the DLL to go out of lock and therefore the recovery time is very small (a few picoseconds or less). Therefore, we can predict the behavior of the DLL for any value of deposited charge. In addition, the designer can implement any desired value of the loop filter capacitor, charge pump current, etc. in the SEE DLL analytical model, at any technology node, to predict the single event transient response of his analog mixed-signal circuit and extrapolate it to his system. Finally, broad design rules in combination with the hardening techniques (developed in this work) for the design of high-speed radiation hardened analog mixed-signal DLLs will be provided later in this chapter. However, first let’s consider the possibility of combining analog mixed-signal DLLs and PLLs single event models into a single and unique SET linear model.
Fig. VII-7 DLL single event transient linear model as a function of the deposited charge in the CP. The SET linear response of the DLL is bounded by the critical voltage Vcrit (linear operating
range of the VCDL) and the dead zone of the circuit. Any voltage perturbation within the dead zone will not impact the DLL’s lock state.