no loss of signal processing performance, as was the case with the TI 4100 analog multiplexing. There is also no interchannel bias error.
Table 5.6 Loop Filter Characteristics Loop
Order
Noise Bandwidth Bn(Hz)
Typical Filter Values
Steady State Error
Characteristics First ω0
4
ω0
Bn=0.25ω0
(dR dt/ ) ω0
Sensitive to velocity stress.
Used in aided code loops and sometimes used in aided carrier loops.
Unconditionally stable at all noise bandwidths.
Second ω0 2 2
2
1 4 ( +a )
a
ω0 2
a2ω0 =1 414. ω0 Bn=0.53ω0
(d R dt2 / 2)
0
ω2
Sensitive to acceleration stress.
Used in aided and unaided carrier loops.
Unconditionally stable at all noise bandwidths.
Third ω0 3 3 2
3 2
3 3 3
4 1
( )
( )
a b a b
a b + −
−
ω0 3
a3ω02=11.ω02 b3ω0 =2 4. ω0 Bn=0.7845ω0
(d R dt3 / 3)
0
ω3 Sensitive to jerk stress.
Used in unaided carrier loops.
Remains stable atBn≤18 Hz.
Source:[7].
Note:The loop filter natural radian frequency,ω0, is computed from the value of the loop filter noise bandwidth,Bn, selected by the designer.Ris the LOS range to the satellite. The steady state error is inversely proportional to thenth power of the tracking loop bandwidth and directly proportional to thenth derivative of range, wherenis the loop filter order. Also see footnote 1.
1 S
(a) ω0
Σ
(b) .
a2 0ω
1 S
1 S +
+ ω02
Σ Σ
(c) .
. a3 0ω2
1 S
1 S
1 S
+ +
+ +
ω03
b3 0ω
Figure 5.18 Block diagrams of: (a) first-, (b) second-, and (c) third-order analog loop filters.
x(t) y(t) (a)
Σ
Σ .
A
x(n) T y(n)
Σ .
A
x(n) T 1/2 y(n)
(b)
(c) . +
+
+ +
+
Z−1
+
Z−1 1
S
Figure 5.19 Block diagrams of: (a) analog, (b) digital boxcar, and (c) digital bilinear transform integrators.
(a) ω0
(b)
1/2
T 1/2
Z−1 .
. . ω02
a2 0ω
Σ Σ
Σ
+ + + +
+ +
(c)
. 1/2
.
T . 1/2
.
T . 1/2
. T
.
. ω03
a3 0ω2
b3 0ω
Σ Σ Σ Σ Σ
Σ
Z−1 Z−1
+ +
+ +
+ +
+ +
+ +
+ +
Figure 5.20 Block diagrams of (a) first-, (b) second-, and (c) third-order digital loop filters exclud- ing last integrator (the NCO).
bilinear integrator shown in Figure 5.19(c). The last digital integrator is not included because this function is implemented by the NCO. The NCO is equivalent to the boxcar integrator of Figure 5.19(b).
Figure 5.21 illustrates two FLL-assisted PLL loop filter designs (see footnote 1).
Figure 5.21(a) depicts a second-order PLL filter with a first-order FLL assist. Figure 5.21(b) depicts a third-order PLL filter with a second-order FLL assist. If the PLL error input is zeroed in either of these filters, the filter becomes a pure FLL. Simi- larly, if the FLL error input is zeroed, the filter becomes a pure PLL. The lowest noise loop closure process is to close in pure FLL, then apply the error inputs from both discriminators as an FLL-assisted PLL until phase lock is achieved, then convert to pure PLL until phase lock is lost. However, if the noise bandwidth parameters are chosen correctly, there is very little loss in the ideal carrier tracking threshold perfor- mance when both discriminators are continuously operated [7]. In general, the natu- ral radian frequency of the FLL,ω0f, is different from the natural radian frequency of the PLL,ω0p. These natural radian frequencies are determined from the desired loop filter noise bandwidths,Bnfand Bnp, respectively. The values for the second-order coefficienta2 and third-order coefficientsa3 and b3 can be determined from Table 5.6. These coefficients are the same for FLL, PLL, or DLL applications if the loop order and the noise bandwidth,Bn, are the same. Note that the FLL coefficient inser- tion point into the filter is one integrator back from the PLL and DLL insertion points. This is because the FLL error is in units of hertz (change in range per unit of time), whereas the PLL and DLL errors are in units of phase (range).
A loop filter parameter design example will clarify the use of the equations in Table 5.6. Suppose that the receiver carrier tracking loop will be subjected to high
Σ
(a)
(b)
Σ
Σ 1/2
T
S 1/2
T Σ Σ Σ Σ
T
+ +
+ +
+ +
Σ
Σ 1/2
T + + Σ Σ 1/2
T + +
.
+ +
+ +
+ +
+ +
T +
T
+ +
Frequency error input
Frequency error input Phase error input
Phase error input
Velocity accumulator
Velocity accumulator Acceleration
accumulator ω0f
ω0p2
a2 0pω
Z−1
a2 0fω
ω20f
ω0p3
a3 0pω
b3 0pω
Z−1 Z−1
2
Figure 5.21 Block diagrams of FLL-assisted PLL filters: (a) second-order PLL with first-order FLL assist, and (b) third-order PLL with second-order FLL assist.
acceleration dynamics and will not be aided by an external navigation system, but must maintain PLL operation. A third-order loop is selected because it is insensitive to acceleration stress. To minimize its sensitivity to jerk stress, the noise bandwidth, Bn, is chosen to be the widest possible consistent with stability. Table 5.6 indicates that Bn ≤ 18 Hz is safe. This limitation has been determined through extensive Monte Carlo simulations and is related to the maximum predetection integration time (which is typically the same as the reciprocal of the carrier loop iteration rate) plus extremes of noise and dynamic range. If Bn =18 Hz, then ω0 =Bn/0.7845= 22.94455 rad/s. The three multipliers shown in Figure 5.20(c) are computed as fol- lows:
ω
ω ω
ω ω
0 3
3 0 2
0 2
3 0 0
12 079 21
11 57910
2 4 55 07
=
= =
= =
, .
. .
. .
a b
If the carrier loop is updated at a 200-Hz rate, thenT= 0.005 second for use in the digital integrators. This completes the third-order filter parameter design. The remainder of the loop filter design is the implementation of the digital integrator accumulators to ensure that they will never overflow (i.e., that they have adequate dynamic range). The use of floating point arithmetic in modern microprocessors with built-in floating point hardware greatly simplifies this part of the design pro- cess. Note that in Figure 5.21(b), the velocity accumulator contains the loop filter estimate of LOS velocity between the antenna phase center and the SV. This esti- mate includes a self-adjusting bias component that compensates the carrier tracking loop for the reference oscillator frequency error (i.e., the time bias rate error that is in common with all tracking channels). Similarly, the acceleration accumulator con- tains the loop filter estimate of LOS acceleration that includes a self-adjusting bias component, which compensates the carrier tracking loop for the time rate of change of the reference oscillator frequency error. These accumulators should be initialized to zero just before initial loop closure unless good estimates of the correct values are known a priori. Also, they should be reset to their bias components (as learned by the navigation process) or to zero if unknown at the exact instance of injecting external carrier velocity aiding into the closed loop.
It should be noted that the loop filters described in this section, and in general any loop filters that are based on an adaptation of analog designs, only achieve the design noise bandwidth,Bn, when the productBnTis very small (well below unity).
As this product increases, the true noise bandwidth tends to be larger than the target value, and eventually the loop becomes unstable. An alternative loop formulation described in [8] overcomes some of these limitations. However, instability for extremely large values of the productBnTis inevitable for any loop filter.