Max Current
5.4 Maximum Current Handling of a Trace
5.4 Maximum Current Handling of a Trace 127
the larger the temperature difference required to pump the same amount of heat power through the interface.
As constant power is consumed by the wire, it heats up. As it heats up, the temperature difference between it and the ambient increases and more power flows from the wire to the ambient. The power dissipation into the environment increases. Eventually a
temperature difference is reached where the power consumed is equal to the power dissipated. This final, steady state temperature difference is:
dissipated consumed 2
2
P P
T I R
T I R
=
=
=
The equilibrium temperature difference between the trace and the ambient, the temperature of the trace above ambient, depends on the thermal resistance of the trace environment. For a given trace geometry that defines the resistance and the power consumption for a specific current, we want to limit the current through the trace so that its equilibrium temperature rise above ambient is less than an acceptable value, typically between 10 degC rise for a very
conservative value, up to 60 degC for a more extreme value.
A reasonable temperature rise above ambient that still poses no danger is 40 degC temperature rise.
The maximum current before a 40 degC temperature rise is strongly dependent on the features of the circuit board. The thermal
environment of a trace on a board varies considerably from board to board and even trace to trace. It’s really hard to calculate the final temperature unless you know all the details of the thermal
environment and the power consumption of other nearby devices and traces.
But sometimes an OKAY answer NOW! is more important than a good answer late.
The IPC, an industry organization that manages a lot of PCB
technology specs, sponsored a number of studies to build test boards and measure the maximum current you can put through a trace of a specific copper thickness and a width on an outer layer or inner layer of a board before exceeding a specific temperature rise.
They developed a few empirical equations to describe this max current. Their original specification, IPC 2221, was based on empirical measurements made in the 1960s. These experiments were revised and a new spec, the IPC 2152, was released in 2010 with more recent measurements.
The IPC recommended specification to follow for the maximum current capacity for circuit boards is the IPC 2152 spec. When using online calculators to estimate the current capacitance of PCB traces based on an IPC, be sure to check which spec is being used.
However, keep in mind that both specs are based on empirical measurements with many assumptions about the board stack-up and other features near the traces. These estimates should be used as rough guidelines, not hard-and-fast rigid rules to follow.
In addition to online tools that implement the IPC 2152 spec, a very useful calculator that runs under MS Windows can be downloaded from Saturn PCB (http://saturnpcb.com/pcb_toolkit/ ). This
calculator uses the approximations in the IPC 2152 specification for its estimates.
An example of using this tool to estimate the maximum current through a 1 oz thick, 6 mil wide trace for a 40 deg temperature rise, is shown in Figure 5.2. The estimate is 1 A.
5.4 Maximum Current Handling of a Trace 129
Figure 5.2 The result of estimating the max current for a 6 mil wide trace. This is only a rough approximation.
The way you use this calculator is first to input all the fixed terms, such as the base thickness before outer layer plating, the plating thickness, the PCB substrate thickness, the acceptable temperature rise, and any other terms. Then after clicking the Solve! button, the resulting maximum conductor current based on the IPC 2152 spec is calculated and displayed.
In this example, we found the maximum current we could send through the 6 mil wide, 1 oz copper trace before the temperature rise was 40 degC above ambient was about 1 A. This is only a very rough estimate, based on many assumptions about the geometry and thermal properties of the circuit board. It does not mean that if the current goes to 1.2 A, the temperature will rise above 40 deg C and the board will fail.
Watch this video and I will walk you through using the Saturn PCB tool to estimate the maximum current
handling of a trace.
The estimates from the IPC 2152 spec are conservative estimates. As a simple experiment, a board was built with a variety of uniform lines with different line widths. A constant current was driven into these lines and the temperature was measured by touch. Figure 5.3 shows a photograph of this test board. The top layer had 1 oz copper with trace widths of 6 mils, 8 mils, 10 mils, 20 mils, and 100 mils.
Figure 5.3 Example of the test board with different line widths, each 1 inch long fabricated with 1 oz copper. Note the connectivity pattern.
The bottom layer did not have a plane, but had a similar set of traces.
A 1 A current was sent through the 6 mil wide trace. Even after 2 minutes, the trace was not noticeably warm. The IPC 2152 spec suggested the temperature should have been 40 deg above ambient.
The thermal environment of this trace in this specific board had much lower thermal resistance to the ambient than that of the traces in the IPC 2152 examples.
5.4 Maximum Current Handling of a Trace 131
In fact, the current was raised to 2 A before the trace was noticeably warm to the touch. At 3 A, the 6 mil trace was hot. At 4 A, the trace quickly heated red hot and fused open.
The estimate of 1 A as the maximum current to put through a 6 mil, 1 oz copper trace on an outer layer is a very conservative estimate and can be used as a safe design guideline. A 6 mil wide trace is perfectly suitable to carry up
to 1 A of DC current.
Using the same analysis with the Saturn PCB tool, a 20 mil wide trace is capable of handling 3 A of current before its temperature rise is above 40 degC above ambient. On this same test board, 3 A was sent through the 20 mil wide trace and again, there was no measurable temperature rise to the touch. It wasn’t until 10 A was run through the trace that it heated up quickly and fused.
The estimates from the IPC 2152 spec and the simple empirical measurements on the test board confirm the following safe limitations:
A 6 mil wide trace can handle 1 A of DC current.
A 20 mil wide trace can handle 3 A of DC current.
This suggests a robust design guideline:
Route all signal traces, which typically carry less than 1 A of DC current as 6 mil wide lines, unless you have a strong
compelling reason otherwise.
Route all power traces, which might carry less than 3 A of DC current with 20 mil wide traces, unless you have a strong
compelling reason otherwise.
Using these guidelines means you will get the highest interconnect density without paying a premium price and you will be able to distinguish at a glance which traces on your board are carrying power distribution and which ones are carrying signals.
Even if your power traces will only carry a maximum of 100 mA, it is a good idea to route them as 20 mil wide traces. This will help identify them at a glance and aid in debugging a board.