4.4 Formal Modeling of NoC using CFSM
4.4.2 Modeling Buffer
4.4.2.2 Buffer with more than one slots
For modeling buffer with more than one slots we need CFSMs corresponding to each buffer slot. Transferring packet from one slot to another slot are modeled using CFSMs.
+BN3 +BTN3
−retN3
ArbiterS1 SwitchN3
−AS1
Buffer1N3 Buffer2N3 Buffer3N3
+B2N3 −retB3N3 −BTN3
+retN3
I3 Ir3 Ak3 WT3
Buffer3N3
+B1N3 −retB2N3 −B2N3
+retB3N3
I2 Ir2 Ak2 WT2
Buffer2N3
−B1N3
+retB2N3
I1 Ir1 Ak1 WT1
−BN3 +AS1
Buffer1N3
( b ) Buffer with three slots ( a ) Communication overview
( c ) CFSM for each buffer slot
Figure 4.4: Buffer with three slots: (a) Overall communication for buffer at the North port of router R3 (b) Three buffer slots as a FIFO (c) CFSM model for buffer with three slots
Communication of a buffer with its corresponding NoC components and a three slots buffer are shown in Fig. 4.4(a) and Fig. 4.4(b), respectively. Modeling of the buffer with three slots, at the North port of router R3, is shown in Fig. 4.4(c). Three CFSMs, namely Buffer1N3, Buffer2N3 and Buffer3N3, are used for this purpose. Each CFSM in Fig. 4.4(c) represents a buffer slot from the Fig. 4.4(b). Since the buffer is a FIFO, a packet is first placed at the first slot from the adjacent router (ArbiterS1) and is transmitted to the switch of that port (SwitchN3) from the third slot. The packet is moved to slot three through the intermediate buffer slot, i.e., second slot in this case. In the CFSM model of Fig. 4.4(c), at first, a packet enters Buffer1N3. It sends the necessary synchronization message to ArbiterS1 and forwards the packet to Buffer2N3, as shown in Fig. 4.4(c). If Buffer2N3 is free (in state
I2), it sends acknowledgment −retB2N3 to Buffer1N3 and passes the packet to Buffer3N3 (by sending message−B2N3). In case, Buffer2N3 is not free (not in stateI2), that means it is holding some other packet and has to wait for processing of a new packet. If Buffer3N3 is free and gets a new packet (indicated by message +B2N3), it requests SwitchN3 to process the packet by sending−BT N3 message and waits in the state W T3. All the transitions in a buffer for storing and forwarding packets are self explanatory from Fig. 4.4(c). Using the same approach, we can model a buffer of capacity n with help of n such CFSMs.
st comp
L
E +compN3
−CLN3
−CEN3 +retCompN3
+retCompN3
( b ) ComputeN3
ArbiterE3 +SNE3
−retEN3
ArbiterL3 +SNL3
−retLN3 SchedulerL3
SchedulerE3
+SSNL3
+SSNE3 +retN3
−BTN3
BufferN3 wt st comp
L0 L1
E0 E1 +BTN3 −compN3
+CLN3
+CEN3
−SNL3
−SNE3 L2
E2
RetS +retLN3
+retEN3
RetB
−retN3
−retCompN3
−SSNL3
−SSNE3
( a ) SwitchN3
( c ) Communication overview
Figure 4.5: CFSM model for a switch: (a) Switch at the North port of router R3 (b) Route computation (c) Communication overview for SwitchN3 with other NoC components
4.4.3 Modeling Switch and Route Computation
A switch considers a packet stored in the input port buffer for route computation. Route computation decides the output port through which the packet has to transmit. If the
packet has already reached its destination router it is deliver to the local port. Modeling of a switch, a route computation unit and the overall communication with a switch is shown in Fig. 4.5(a), Fig. 4.5(b) and Fig. 4.5(c), respectively. A packet is directed to a switch from a buffer at the input port of a router. Switch gets the routing information for the packet from another CFSM (compute machine) and forwards the packet to the arbiter present at the intended output port. The CFSM representation of SwitchN3 is shown in Fig. 4.5(a). Buffer1N3 sends −BT N3 message to the SwitchN3 as shown in Fig. 4.3. By consuming +BT N3 message, the switch moves from waiting state (wt) to starting state (st) and starts processing the packet. SwitchN3 sends−compN3 message to ComputeN3, where routing algorithm is implemented. ComputeN3 is shown in Fig. 4.5(b). Routing algorithm determines the direction of output port through which data packet should traverse to reach the destination router. The route computation is performed in compute machine and route information is passed to switch by sending −CLN3 or −CEN3 message. If the packet reaches its destination router,−CLN3 message is sent to SwitchN3. If the routing algorithm under consideration decides the packet has to move towards the East, −CEN3 message is transmitted to SwitchN3. After consuming +CEN3, a message −SSN E3 is sent to SchedulerE3 requesting scheduler at the East port of router R3 to set priority for the packet.
Another message −SN E3 is sent towards ArbiterE3 requesting the East output port for transmission. Once output port is granted, SwitchN3 receives an acknowledgment message +retEN3 from ArbiterE3. After consuming this message, SwitchN3 sends acknowledgment message−retN3 towards Buffer1N3 of Fig.4.3. Finally, SwitchN3 returns to its initial state wt by sending −retCompN3 message towards ComputeN3. By consuming this message, ComputeN3 also returns to its initial state st. SwitchN3 and ComputeN3 wait for a new packet in their initial states wt and st, respectively.
Referring to the 2x2 NoC in Fig. 4.3(a), it may be noted that the North port switch of router R3 (SwitchN3) can send packets only in two ways: either towards the local port of router R3 or towards router R4 via the East output port. In generic case, for a router with four neighbours in a 3x3 NoC or NoC of higher sizes, all the ports will be active and
the packet can move in four directions. In such case, the comp state of the switch will have four outgoing edges or four outgoing transitions. Thus, the number of outgoing edges for a switch depends upon the number of neighbours or number of active ports. A router can have two or three or four neighbours depending upon its position in a Mesh or Torus NoC. In our NoC model, we modelled all such types of routers. For sake of simplicity in representation, we present CFSM model with reference to a 2x2 NoC shown in Fig. 4.3(a).
4.4.4 Modeling Arbiter and Scheduler
An arbiter is present at the output port of a router and resolves the conflict if multiple pack- ets are requesting the same output port at the same time. Switch sends a packet towards an appropriate output port based on the decision of the routing algorithm. At each output port, an arbiter is present. Multiple packets may compete for the same output port at the same time. These conflicts are resolved by an arbiter with the help of a scheduling pol- icy, like round-robin policy, first-come-first-serve policy, priority based policy, etc.. In this work, we use round-robin policy. The CFSM representations of ArbiterS1 along with Sched- ulerS1 (round-robin scheduler) at the South port of router R1 (refer Fig. 4.3(a)) is shown in Fig. 4.6(a) and Fig. 4.6(b), respectively. The communication overview for ArbiterS1 is shown in Fig.4.6(c). ArbiterS1 accepts packets from SwitchL1 and SwitchE1 based on the priority set by SchedulerS1. The two states L and E in ArbiterS1 are corresponding to incoming packets from SwitchL1 and SwitchE1, respectively. In SchedulerS1, state named as ‘0’ indicates priority 0 and a packet from SwitchL1 gets preference. State named as ‘1’
indicates priority 1 and a packet from SwitchE1 gets preference. Before setting priority, the scheduler goes through some intermediate states (00, 11, 01 and 10) as shown in Fig. 4.6.