4.2 Proposed Wear Leveling Techniques
4.2.2 Dynamic Window Write Restriction (DWWR)
Chapter 4. Intra-Set Wear Leveling using Vertical Partitions 100 written window becomes heavily written, and vice-versa. By considering these heavily written windows as a write-restricted during the execution, we can further improve the relative lifetime and reduce the coefficient of intra-set write variation (observed in figure 4.3 for SWWR). Table 4.1 shows the percentage availability of heavily written windows (H-win) during the window selection process in SWWR.
From the table, we can conclude that on an average 13.51% times a heavily written window other than the selected write restricted window is available in the cache.
This motivates us to identify such windows and improve the lifetime further.
Chapter 4. Intra-Set Wear Leveling using Vertical Partitions 101 Algorithm 2 Dynamic Window Write Restriction (DWWR)
1: U LC: Upper Level Cache i.e. L1/L2.
2: LLC: Last Level Cache i.e. L2/L3.
3: I: Predefined interval.
4: m: Number of logical partitions or windows.
5: Wi:ithlogical partition or window that is treated as read-only (or write restricted) in the current interval.
0≤i < m
6: Ci : Counter corresponding to ith window that records the number of write accesses from ULC to that window. 0≤i < m.
7: Run application forIcycles treating the whole cache as normally available cache.
8: AfterIcycles treat one window at a time as read-only or write restricted.
9: repeat
10: forevery intervalIdo
11: i=W IN SELECT(Ci, m)
12: LetWiis the selected Write Restricted Window (WRW) for current intervalI.
13: foreach requestRfrom ULC to the blockBin LLC duringIcyclesdo
14: ifR=ReadHitthen
15: N ORM OP R(R, B)
16: else ifR=W riteHitthen
17: ifB∈Withen
18: L=W RIT EREDIRECT(R, B,WRW)
19: The corresponding counter of the window that contains the locationLis incremented.
20: else
21: N ORM OP R(R, B)
22: Increment the counterCjof the window where the blockBis present.
23: end if
24: else
25: P ROCESSCACHEM ISS(R,WRW) .cache miss
26: end if
27: end for
28: end for
29: untilthe end of the execution
Write Restricted Window Selection for DWWR
30: functionWinSelect(Ci,m)
31: i=max(Ci), 0≤i < m
32: Reset the counterCito zero
33: returni
34: end function
For the initial I cycles of the application execution, the cache is employed as an ordinarily available cache (line 7). Once the application crosses theI cycles, one of the windows of the cache is treated as read-only or write restricted window. The selection of the window is based upon the counter associated with each window of the cache (line 10 and 11). Thus, the window with most write accesses in the previous intervals is selected as a write-restricted in the next interval (line 31).
This helps to restrict the heavily written window to get further writes in the next interval. Once the window is selected, the corresponding counter is reset to zero (line 32). At the end of the interval, the next window with maximum writes is selected by the method. The process continues until the end of execution (line 29).
Same as in SWWR, the tag lookup operation is performed on the LLC, for each request coming from the Upper-Level cache (ULC) (line 13). Depending upon the
Chapter 4. Intra-Set Wear Leveling using Vertical Partitions 102 outcome of the lookup for requested Block B, different operations are performed in the LLC which are as follows:
• Read Hit: The read operation is performed in the same way as given in Algo- rithm 1 (line 14 and 15 of Algorithm 2).
• Write Hit (Write-back or PUTX) and block B in Wi: The write request for the block B in Wi is redirected to the first invalid way(s) of the same cache set in the other windows. In case, if there is no invalid line available in the same cache set, the victim linev is evicted from the locationL. Note that location Lis different from the write restricted window location. Afterward, the write request R from a ULC is redirected to the locationL(let say in windowWj). The counter Cj corresponding to the windowWj is incremented and the blockB is invalidated fromWi (line 16 to 19).
• Write Hit (Write-back or PUTX) and block B not in Wi: The write request R is performed normally on the block B. The corresponding counter Cj of windowWj (in which the write operation is performed) is incremented (line 20 to 22).
• Cache Miss: In the case of LLC miss, the requestRfrom the ULC is forwarded to the next level of memory (main memory in our case). When the requested block has arrived at the LLC, it will be placed in the location apart from the location belonging to Wi (line 24 to 26).
4.2.2.3 Working Example
Figure 4.4 presents the working example of DWWR. As shown in the figure, the countersC0 toC3 are associated with the windowW0 toW3. Let W0 be the write restricted window having the maximum write count i.e. C0 = max(Ci), ∀i. In the first case, a read request from the ULC to LLC (arrow 1) is served normally (arrow 2). In the second case, a write request from the ULC to the way-2 of LLC (arrow 3) is redirected to another way in the same cache set (arrow 4). In case, if
Chapter 4. Intra-Set Wear Leveling using Vertical Partitions 103
W0 W1 W2 W3 W4...W7 W8...W11 W12...W15 L1/L2 Cache
(ULC) 1
2 3
4 W1
Write Restricted Window
L2/L3 Cache (LLC)
5
W2 W3
W0
C1 C2 C3
C0
Figure 4.4: Working example of proposed DWWR wear leveling policy
Workloads H-Ways
Type Bench 1 2 3 4 5 6 7 8 Avg.
PARSEC
Body 24.9% 7.4% 4.9% 4.1% 0.76% 1.16% 1.22% 0.24% 44.7%
Cann 11.8% 8.14% 4.9% 2.35% 0.78% 0.33% 0.11% - 28.5%
Ded 4.85% 3.41% 2.35% 1.49% - - - - 12.1%
Swap 23.2% 17.4% 11.6% 7.34% 2.14% 1.4% 0.61% 0.54% 64.3%
X264 6.07% 2.82% 1.83% 1.03% - - - - 12.2%
SPEC
Mix1 2.78% 2.79% 1.82% 1.10% 0.73% 0.34% 0.13% - 9.7%
Mix2 4.14% 3.69% 3.03% 2.47% 1.46% 0.96% 0.49% 0.29% 16.57%
Mix3 5.74% 4.07% 2.87% 1.88% 0.47% 0.38% 0.19% 0.12% 15.7%
Mix4 7.26% 5.91% 4.42% 3.13% 1.16% 0.74% 0.39% 0.18% 23.2%
MEAN 10.1% 6.18% 4.21% 2.76% 1.07% 0.76% 0.45% 0.23% 25.2%
Table 4.2: Percentage times Heavily written Ways (H-Ways) (apart from write restricted ways) present in the cache
there is no invalid line is present in the cache way, one of the blocks is invalidated from other windows (W1,W2 andW3 in our example) in the same cache set. Once the write operation is performed, the block (present in the way-2) is invalidated from the write restricted windowW0. Afterward, the corresponding counter of the window in which the write redirection happens is incremented.
4.2.2.4 Limitation of DWWR
Figure 4.5 shows the write counts of blocks within the cache set after incorporating DWWR. However, the limitation of DWWR is the lack of consideration for heavily written ways available in the other lightly written windows. In other words, a particular window may have a lower write count compared to others but can
Chapter 4. Intra-Set Wear Leveling using Vertical Partitions 104
1 4 16 64 256 1024 4096
Write Counts (Log2)
Way Indexes
Mix3 Mix4 Swap Body
Figure 4.5: Write counts for different workloads in DWWR
contain some ways that are written more number of times compared to those in windows with overall higher write count. Table 4.2 presents the availability percentage of heavily written ways (H-ways) in the windows apart from the selected window. From the table 4.2, we can conclude that on an average 25.2% times H- ways are present in windows other than the selected window of the cache. This motivates us to identify such H-ways in the cache and further reduce the intra-set write variation (shown in figs. 4.3 and 4.5) and improve the lifetime over SWWR and DWWR.