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R19 M.Tech. VLSI/VLSI Design/VLSI System Design

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System Verilog and Verification: Verification Guidelines, Data Types, Procedure Declarations and Routines, Linking the Test Bench and Design, Assertions, Basic OOP Concepts, Randomization, Introduction to Basic Scripting Language: Perl, Tcl/Tk. Programmable DSP (P-DSP) processors: Harvard architecture, Multiport memory, architectural structure of P-DSP-MAC unit, Barrel shifters, Introduction to TI DSP processor family. VLIW Architecture and TMS320C6000 Series, Architecture Study, Data Paths, Cross Paths, Introduction to Instruction Level Architecture of C6000 Family, Assembly Instructions Memory Addressing, for Arithmetic, Logical Operations.

Serial Buses - Physical interface, data and control signals, characteristics, limitations and applications of RS232, RS485, I2C, SPI. Low-dimensional nanomaterials and their applications, synthesis, properties and applications of low-dimensional carbon-related nanomaterials. Introduction to microelectromechanical systems (MEMS), advantages and challenges of MEMS, manufacturing technologies, surface micromachining, bulk micromachining, molding.

At the end of this course, students will be able to identify and formalize architectural level characterization of P-DSP hardware. Multi-core DSPs: Introduction to Multi-core computing and applicability to DSP hardware, concept of threads, introduction to P-thread, mutex and similar concepts, heterogeneous and homogeneous multi-core systems. Internet of Things Privacy, Security and Governance Introduction, Overview of Governance, Privacy and Security Issues,.

Francis daCosta, "Rethinking the Internet of Things: A Scalable Approach to Connecting Everything", 1st edition, Apress Publications, 2013.

TECH.- I YEAR- I SEMESTER VLSI/VLSI DESIGN/VLSI SYSTEM DESIGN

To understand the role of the functional simulator in validating the functionality of the designed circuit. Control an LED by using switch for polling method, by interrupt method and blink the LED every five switches. Understand that today's world is ruled by computer, information technology, but tomorrow's world will be ruled by ideas, concept and creativity.

Importance of a research problem, Sources of a research problem, Criteria, Characteristics of a good research problem, Mistakes in choosing a research problem, Scope and objectives of a research problem. Effective technical writing, how to write a report, paper, research proposal development, research proposal format, presentation and peer review. Analyze, design, optimize, and simulate analog and digital circuits using CMOS constrained by design metrics.

Combinational Logic: Static CMOS Design, Logic Effort, Ratio Logic, Pass Transistor Logic, Dynamic Logic, Speed ​​and Power Dissipation in Dynamic Logic, Cascading Dynamic Gates, CMOS Transmission Gate Logic. Identify the sources of power dissipation in digital IC systems and understand the impact of power on system performance and reliability. Technology & Circuit Design Levels: Sources of Power Dissipation in Digital ICs, Degrees of Freedom, Recurring Themes in Low Power, Emerging Low Power Approaches, Dynamic Dissipation in CMOS, Effects of Vdd & Vt on Speed, Limits on Vt Reduction, Transistor Size & Optimal Gate Oxide Thickness, Impact of technology scale, technology innovations.

Low-energy circuit techniques: power consumption in circuits, flip-flops and latches, high-capacitance nodes, energy recovery, reversible pipelines, high-performance approaches. Logic synthesis for low power evaluation techniques: power minimization techniques, low power arithmetic components - circuit design styles, adders, multipliers. Low Power Memory Design: Sources and Reduction of Power Dissipation in the Memory Subsystem, Sources of Power Dissipation in DRAM and SRAM, Low Power DRAM Circuits, Low Power SRAM Circuits.

Low-power microprocessor design system: power management support, architectural tradeoffs for power, choice of the supply voltage, low-power clock, low-power implementation problem, comparison of microprocessors for power and performance.

TECH.- I YEAR- II SEMESTER VLSI/VLSI DESIGN/VLSI SYSTEM DESIGN

Simulation: various simulation modes, behavioral, functional, static timing, gate level, switch level, transistor/circuit simulation, verification vector design, low power FPGA, reconfigurable systems, SoC related modeling of data path design and control logic, minimization of interconnect impact, design issues with bell trees. Low Power SoC Design / Digital System Design Synergy, Low Power System Perspective - Power Gating, Clock Gating, Adaptive Voltage Scaling (AVS), Static Voltage Scaling, Dynamic Clock Frequency and Voltage Scaling (DCFS), Building Block Optimization, Building Block Memory, Power Off Techniques, Verification of energy consumption. Pipelining and Parallel Processing: Introduction, Pipelining of FIR Digital Filters, Parallel Processing, Pipelining and Parallel Processing for Low Power.

Fast Convolution: Introduction – Cook-Toom Algorithm – Winogard Algorithm – Iterated Convolution – Cyclic Convolution – Design of Fast Convolution Algorithm by Inspection. Low Power Design: Scaling Vs. power consumption, power analysis, power reduction techniques, energy estimation approaches. Programmable DSP: Evaluation of programmable digital signal processors, DSP processors for mobile and wireless communications, processors for multimedia signal processing.

The MOS transistor: small-signal modeling for low-frequency and high-frequency, Pao-Sah and Brews models; Short channel effects in MOS transistors. The bipolar transistor: Eber's-Moll model; loading control model; small signal models for low and high frequency and switching characteristics. Boundary Scan Standard: Motivation, System Configuration with Boundary Scan: TAP Controller and Port, Boundary Scan Test Instructions, Pin Limitations of the Standard, Boundary Scan Description Language: BDSL Description Components, Pin Descriptions.

VGS at special drain voltage (low) for NMOS, PMOS and determine Vt. c) Plot log ID vs. VDS at various gate voltages for NMOS, PMOS and determine channel length modulation factor. e) Extract one fifth of NMOS/PMOS transistors (short channel and long channel). Use Ngspice to plot a tangent line passing through vertex gm point in y (VGS) plane and determine Vth. f) Plot ID vs.

Determine the small signal voltage gain at the switching point using Ngspice and compare the values ​​for 0.18um and 0.13um process. Determine small signal voltage gain, -3dB BW and GBW of the amplifier using small signal analysis in Ngspice (consider 30fF load capacitance). Derive the time constant of the output and compare it to the time constant from -3dB BW.

Note: Adjust accuracy settings for the simulator (setup->options in GUI). Use correct values ​​of resistors to obtain a three OPAMP INA with differential-mode voltage gain = 10. Plot CMRR of INA versus resistor mismatch (for second-stage resistors only) changing from -5% to +5% (use AC analysis ).

TECH.- II YEAR- I SEMESTER VLSI/VLSI DESIGN/VLSI SYSTEM DESIGN

Fuzzy Logic, Knowledge Representation and Inference Mechanism, Defuzzification Methods Fuzzy Neural Networks and some algorithms to learn the parameters of the network like GA. Understand the skills needed when writing a title. Ensure the good quality of the paper at the very first submission. Course Objectives: Students will be able to. learn to demonstrate a critical understanding of key concepts in disaster risk reduction and humanitarian response. critically evaluate disaster risk reduction and humanitarian response policy and practice from various perspectives. develop an understanding of standards of humanitarian response and practical relevance in specific types of disasters and conflict situations. critically understand the strengths and weaknesses of disaster management approaches. planning and programming in different countries, especially their own country or the countries in which they work.

The technical scholars equipped with Sanskrit will be able to explore the vast knowledge of ancient literature. To address the role of socialism in India after the onset of the Bolshevik Revolution in 1917 and its impact on the original drafting of the Indian Constitution. Discuss the growth of demand for civil rights in India for the majority of Indians before the arrival of Gandhi in Indian politics.

Discuss the intellectual origins of the framework of argument that informed the conceptualization of the social reforms that led to the revolution in India. History of Making of Indian Constitution: History Drafting Committee, (Composition & . Work), Philosophy of Indian Constitution: Preamble, Salient Features. Block Level: Organizational Hierarchy (Various Departments), Village Level: Role of Elected and Appointed Officials, Importance of Grassroots Democracy.

Review existing evidence on the review topic to inform program design and policy-making undertaken by DfID, other agencies and researchers. What is the evidence about the effectiveness of these pedagogical practices, in which conditions and with which population of learners. How can teacher training (curriculum and practicum) and the school curriculum and guidance materials best support effective pedagogy.

Evidence on the effectiveness of pedagogical practices, Methodology for the in-depth phase: quality assessment of included studies. How can teacher training (curriculum and practicum) and the school curriculum and guidance materials best support effective pedagogy?

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Vol.03, Issue 09, Conference IC-RASEM Special Issue 01, September 2018 Available Online: www.ajeee.co.in/index.php/AJEEE 1 AN ANALYTICAL APPROACH FOR VLSI DESIGN OF LOW POWER