Averaged Mathematical Model

Stage C

A. Averaged Mathematical Model

The averaged NNPC and MNNPC converter models presented shows the relationship between the switching power semiconductor devices, the redundant switching states and its associated duty cycles [142], [143].

1) 4L-NNPC Converter Topology

Figure 3.3 shows the circuit diagram of a 3ph 4L-NNPC converter topology which consist of two clamping capacitors per phase, 𝐶_𝑥1 and 𝐶_𝑥2 (where 𝑥 represents 𝑎, 𝑏, 𝑐 of each converter phase leg) and a neutral-point. Each clamping capacitor voltage must be maintained at one- third of the dc-link voltage. The switch control functions 𝑠_𝑥𝑦 (where 𝑦 represents 1, … , 6), which shows the position of each switching power semiconductor device in the converter topology. The switch control function states the operational switching state of the converter topology highlighted in Table 3.1.

Based on the mathematical model of a 1ph 4L-NNPC converter topology presented in equations (3.1) to (3.3), the average representation of the output phase voltage (3.1) and the current flowing through the clamping capacitors 𝐶_𝑥1 and 𝐶_𝑥2 (𝑖. 𝑒. 𝑖_𝐶𝑥1 and 𝑖_𝐶𝑥2){(3.2) to (3.3)}

obtained over a switching period are expressed below as follows [142].

𝑣̂_𝑥𝑜 = [𝑑_𝑥1^𝑉𝑑𝑐

2 + (1 − 𝑑_𝑥1)(𝑣̂_𝑐𝑥1+ 𝑣̂_𝑐𝑥2) + (𝑑_𝑥2− 1)𝑣̂_𝑐𝑥1+ (𝑑_𝑥3− 1)𝑣̂_𝑐𝑥2] (3.12) 𝑖̂_𝐶𝑥1= (𝑑_𝑥3− 𝑑_𝑥2) ∙ 𝑖̂_𝑥 (3.13) 𝑖̂_𝐶𝑥2 = (𝑑_𝑥6− 𝑑_𝑥5) ∙ 𝑖̂_𝑥 (3.14) where 𝑣̂_𝑐𝑥1 and 𝑣̂_𝑐𝑥2 are the averaged voltages of the clamping capacitors 𝐶_𝑥1 and 𝐶_𝑥2 , 𝑖̂_𝐶𝑥1 and 𝑖̂_𝐶𝑥2 are the averaged currents flowing through the clamping capacitors 𝐶_𝑥1 and 𝐶_𝑥2, 𝑖̂_𝑥 is the averaged output current, and 𝑑_𝑥1, 𝑑_𝑥2, 𝑑_𝑥3, 𝑑_𝑥5 and 𝑑_𝑥6 are the duty cycles of the respective switch control functions 𝑆_𝑥1, 𝑆_𝑥2, 𝑆_𝑥3, 𝑆_𝑥5 and 𝑆_𝑥6. Furthermore, the average voltage of the clamping capacitors can be expressed as follows:

94 𝑣̂_𝑐𝑥1 = ¹

𝐶_𝑥1∫ 𝑖̂₀^𝑡 _𝐶𝑥1𝑑𝑡 +𝑉_𝑐𝑥1 (3.15) 𝑣̂_𝑐𝑥2 = ¹

𝐶𝑥2∫ 𝑖̂₀^𝑡 _𝐶𝑥2𝑑𝑡 +𝑉_𝑐𝑥2 (3.16) where 𝑉_𝑐𝑥1 and 𝑉_𝑐𝑥2 are the initial voltage values of the clamping capacitors 𝐶_𝑥1 and 𝐶_𝑥2. In Table 3.6, the switching state control function of each switching state have been highlighted.

The switching state control function 𝑙_𝑚 (where 𝑚 represents 1, … , 4), which shows the actual switching state of a specific voltage level of the converter topology. Furthermore, some switching states have an extra state within a particular voltage level known as redundant switching state. Therefore, the redundant switch state control function 𝑙_𝑚.𝑛, where 𝑚 represents the actual switching state (as previously stated) and 𝑛 represents the redundant switching state of a specific voltage level of the converter topology (where 𝑛 = 1). Figures 3.9(a) to 3.9(d) shows the switching states and redundant switching states of each voltage level that affect the clamping capacitor voltage.

Vdc/2

Vdc/2

Sx1

Sx2

Sx3

Sx4

S^x5 Sx6

Cx1

Cx2

Dx1

Dx2

Vxo

(Ix)>0

Vdc/2

Vdc/2

Sx1

Sx2

Sx3

Sx4

S^x5 Sx6

Cx1

Cx2

Dx1

Dx2

Vxo

(Ix)>0

(a) (b)

Table 3.6: Highlighting Switching State Control Functions of a 4L-NNPC converter.

𝑺_𝒙𝟏 𝑺_𝒙𝟐 𝑺_𝒙𝟑 𝑺_𝒙𝟒 𝑺_𝒙𝟓 𝑺_𝒙𝟔 𝑽_𝒙𝒐 Switching State

Switching State Control Function

1 1 1 0 0 0 𝑉_𝑑𝑐⁄2 1 𝑙₁

1 0 1 1 0 0 𝑉_𝑑𝑐⁄6 2 𝑙₂

0 1 1 0 0 1 𝑉_𝑑𝑐⁄6 2.1 𝑙_2.1

1 0 0 1 1 0 −𝑉_𝑑𝑐⁄6 3 𝑙₃

0 0 1 1 0 1 −𝑉_𝑑𝑐⁄6 3.1 𝑙_3.1

0 0 0 1 1 1 −𝑉_𝑑𝑐⁄2 4 𝑙₄

95

Vdc/2

Vdc/2

Sx1

Sx2

Sx3

Sx4

Sx5

S^x6 C^x1

Cx2

Dx1

D^x2

Vxo

(Ix)>0

Vdc/2

Vdc/2

Sx1

Sx2

Sx3

Sx4

Sx5

S^x6 C^x1

Cx2

Dx1

D^x2

Vxo

(Ix)>0

(c) (d)

Figure 3.9: Impact of switching states and positive phase current on the clamping capacitor voltages in a 4L-NNPC converter. (a) state 2. (b) state 2.1. (c) state 3. (d) state

3.1.

Therefore, the average output voltage and clamping capacitors current in (3.12) to (3.14) can be expressed in terms of the duty cycle of the voltage level and the switch state control function, as stated below.

𝑣̂_𝑥𝑜 = [^𝑉𝑑𝑐

2 (𝑙₁𝑑_𝑥𝑙1+ 𝑙₂𝑑_𝑥𝑙2 + 𝑑_𝑥𝑙3) + (1 − 𝑙₁𝑑_𝑥𝑙1)(𝑣̂_𝑐𝑥1+ 𝑣̂_𝑐𝑥2) + [(𝑙₂− 𝑙_2.1)𝑑_𝑥𝑙2− 1]𝑣̂_𝑐𝑥1+ (𝑑_𝑥𝑙3− 1)𝑣̂_𝑐𝑥2] (3.17)

𝑖̂_𝐶𝑥1 = (𝑙₁𝑑_𝑥𝑙1− (𝑙₂− 𝑙_2.1)𝑑_𝑥𝑙2) ∙ 𝑖̂_𝑥 (3.18) 𝑖̂_𝐶𝑥2 = ((𝑙₃− 𝑙_3.1)𝑑_𝑥𝑙3+ 𝑙_2.1𝑑_𝑥𝑙2) ∙ 𝑖̂_𝑥 (3.19) where 𝑙₁, 𝑙₂, and 𝑙₃ are the switching state control functions; while 𝑙_2.1 and 𝑙_3.1 are the redundant switching state control functions as stated in Table 3.6. The switching state is activated by the switching state control function being represented by the value ‘1’, when deactivated by the value ‘0’. The duty cycles of the voltage levels 1 to 4 are represented by the variables 𝑑_𝑥𝑙1, 𝑑_𝑥𝑙2, 𝑑_𝑥𝑙3 and 𝑑_𝑥𝑙4, respectively. Therefore, the redundant switching state to be selected for the voltage balancing control technique of the clamping capacitor voltage will be carried out by activating the redundant switching state control function. Also, the voltage balancing control technique of the clamping capacitor voltage can be achieved by adjusting the duty cycle of the voltage levels through the duty cycle of the switching power semiconductor devices. Therefore, the switch control functions in equations (3.1) to (3.3) are replaced by the product of the switching state control functions and associated duty cycle variables of the voltage level when

96 the clamping capacitor is charging as presented in equations (3.17) to (3.19), as extracted from Table 3.1 and Table 3.6.

2) 5L-NNPC Converter Topology

Figure 3.5 shows the circuit diagram of a 3ph 5L-NNPC converter topology which consist of three clamping capacitors per phase, 𝐶_𝑥1, 𝐶_𝑥2, and 𝐶_𝑥3 (where 𝑥 represents 𝑎, 𝑏, 𝑐 of each converter phase leg) and a neutral-point. The innermost clamping capacitor voltage must be maintained at a quarter of the dc-link voltage and the outermost clamping capacitor must be maintained at three-quarter of the dc-link voltage. The switch control functions 𝑠_𝑥𝑦 (where 𝑦 represents 1, … , 8), which shows the position of each switching power semiconductor device in the converter topology. The switch control function states the operational switching state of the converter topology highlighted in Table 3.2.

Based on the mathematical model of a 1ph 5L-NNPC converter topology presented in equations (3.4) to (3.7), the average representation of the output phase voltage (3.4) and the current flowing through the clamping capacitors 𝐶_𝑥1, 𝐶_𝑥2 and 𝐶_𝑥3 (𝑖. 𝑒. 𝑖_𝐶𝑥1, 𝑖_𝐶𝑥2 and 𝑖_𝐶𝑥3){(3.5) to (3.7)} obtained over a switching period are expressed below as follows.

𝑣̂_𝑥𝑜= [𝑑_𝑥1^𝑉𝑑𝑐

2 + (𝑑_𝑥1+ 𝑑_𝑥2)𝑣̂_𝑐𝑥3+ 𝑑_𝑥2(𝑣̂_𝑐𝑥1+ 𝑣̂_𝑐𝑥2) + (𝑑_𝑥3− 1)𝑣̂_𝑐𝑥1+ (𝑑_𝑥4− 1)𝑣̂_𝑐𝑥2] (3.20) ` 𝑖̂_𝐶𝑥3 = (𝑑_𝑥1− 𝑑_𝑥2) ∙ 𝑖̂_𝑥 (3.21) 𝑖̂_𝐶𝑥1 = (𝑑_𝑥2− 𝑑_𝑥3) ∙ 𝑖̂_𝑥 (3.22) 𝑖̂_𝐶𝑥2= (𝑑_𝑥7− 𝑑_𝑥6) ∙ 𝑖̂_𝑥 (3.23) where 𝑣̂_𝑐𝑥1, 𝑣̂_𝑐𝑥2 and 𝑣̂_𝑐𝑥3 are the average voltages of the clamping capacitors 𝐶_𝑥1, 𝐶_𝑥2, and 𝐶_𝑥3, respectively. 𝑖̂_𝐶𝑥1, 𝑖̂_𝐶𝑥2 and 𝑖̂_𝐶𝑥3 are the average currents flowing through the clamping capacitors 𝐶_𝑥1, 𝐶_𝑥2, and 𝐶_𝑥3. 𝑖̂_𝑥𝑛 is the average output current, and 𝑑_𝑥1, 𝑑_𝑥2, 𝑑_𝑥3, 𝑑_𝑥4, 𝑑_𝑥6 and 𝑑_𝑥7 are the duty cycles of the switching functions 𝑆_𝑥1, 𝑆_𝑥2, 𝑆_𝑥3, 𝑆_𝑥4, 𝑆_𝑥6 and 𝑆_𝑥7. The average voltage of the clamping capacitors can be expressed as follows:

𝑣̂_𝑐𝑥1 = ¹

𝐶_𝑥1∫ 𝑖̂₀^𝑡 _𝐶𝑥1𝑑𝑡 +𝑉_𝑐𝑥1 (3.24) 𝑣̂_𝑐𝑥2 = ¹

𝐶𝑥2∫ 𝑖̂₀^𝑡 𝐶𝑥2𝑑𝑡 +𝑉_𝑐𝑥2 (3.25) 𝑣̂_𝑐𝑥3 = ¹

𝐶_𝑥3∫ 𝑖̂₀^𝑡 _𝐶𝑥3𝑑𝑡 +𝑉_𝑐𝑥3 (3.26)

97 where 𝑉_𝑐𝑥1, 𝑉_𝑐𝑥2 and 𝑉_𝑐𝑥3 are the initial voltage values of the clamping capacitors 𝐶_𝑥1, 𝐶_𝑥2 and 𝐶_𝑥3.

In Table 3.7, the switching state control function of each switching state have been highlighted.

The switch state control function 𝑙_𝑚 (where 𝑚 represents 1, … , 5), which show the actual switching state of a specific voltage level of the converter topology. Furthermore, some switching states have an extra state within a particular voltage level known as redundant switching state. Therefore, the redundant switch state control function 𝑙_𝑚.𝑛, where 𝑚 represents the actual switching state (as previously stated) and 𝑛 represents the redundant switching state of a specific voltage level of the converter topology (where 𝑛 = 1, 2). Figures 3.10(a) to 3.10(j) shows the switching states and redundant switching states of each voltage level that affect the clamping capacitor voltage.

Table 3.7: Highlighting Switching State Control Functions of a 5L-NNPC converter.

𝑺_𝒙𝟏 𝑺_𝒙𝟐 𝑺_𝒙𝟑 𝑺_𝒙𝟒 𝑺_𝒙𝟓 𝑺_𝒙𝟔 𝑺_𝒙𝟕 𝑺_𝒙𝟖 𝑽_𝒙𝒐 Switching State

Switching State Control Function

1 1 1 1 0 0 0 0 𝑉_𝑑𝑐⁄2 1 𝑙₁

1 1 0 1 1 0 0 0 𝑉_𝑑𝑐⁄4 2 𝑙₂

0 1 1 1 0 0 0 1 𝑉_𝑑𝑐⁄4 2.1 𝑙_2.1

1 0 1 1 0 0 1 0 𝑉_𝑑𝑐⁄4 2.2 𝑙_2.2

1 1 0 0 1 1 0 0 0 3 𝑙₃

1 0 0 1 1 0 1 0 0 3.1 𝑙_3.1

0 1 0 1 1 0 0 1 0 3.2 𝑙_3.2

0 0 1 1 0 0 1 1 0 3.3 𝑙_3.3

0 0 0 1 1 0 1 1 − 𝑉_𝑑𝑐⁄4 4 𝑙₄

1 0 0 0 1 1 1 0 − 𝑉_𝑑𝑐⁄4 4.1 𝑙_4.1

0 1 0 0 1 1 0 1 − 𝑉_𝑑𝑐⁄4 4.2 𝑙_4.2

0 0 0 0 1 1 1 1 −𝑉_𝑑𝑐⁄2 5 𝑙₅

98 V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

(a) (b)

V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

(c) (d)

V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

(e) (f)

99 V^dc/2

Vdc/2

Sx1

S^x2 S^x3 Sx4

Sx5

S^x6 C^x1

C^x2

D^x1

Dx2

C^x3

S^x7 Sx8

V^(Ixo

x)>0

V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

(g) (h)

V^dc/2

V^dc/2

Sx1

S^x2 S^x3 Sx4

Sx5

S^x6 C^x1

Cx2

D^x1

Dx2

C^x3

S^x7 Sx8

V^(Ixo

x)>0

V^dc/2

V^dc/2

S^x1 S^x2 S^x3 S^x4

S^x5 S^x6 C^x1

C^x2

D^x1

D^x2 C^x3

S^x7 S^x8

V^(Ixo

x)>0

(i) (j)

Figure 3.10: Impact of switching states and positive phase current on the clamping capacitor voltages. (a) state 2. (b) state 2.1. (c) state 2.2. (d) state 3. I state 3.1. (f) state

3.2. (g) state 3.3. (h) state 4. (i) state 4.1. (j) state 4.2.

Therefore, the average output voltage and clamping capacitors current in (3.20) to (3.23) can be expressed in terms of the duty cycle of each switching state as stated:

𝑣̂_𝑥𝑜 = [^𝑉𝑑𝑐

2 (𝑙₁𝑑_𝑥𝑙1+ 𝑙₂𝑑_𝑥𝑙2+ 𝑙₃𝑑_𝑥𝑙3+ 𝑑_𝑥𝑙4) +(𝑙_2.2𝑑_𝑥𝑙2+ 𝑙_3.1𝑑_𝑥𝑙3)𝑣̂_𝑐𝑥3+ 𝑙₃𝑑_𝑥𝑙3(𝑣̂_𝑐𝑥1+

𝑣̂_𝑐𝑥2)+(𝑙_4.2𝑑_𝑥𝑙4− 1)𝑣̂_𝑐𝑥1+(𝑙_4.2𝑑_𝑥𝑙4− 1)𝑣̂_𝑐𝑥2] (3.27)

𝑖̂_𝐶𝑥3= [(−𝑙_2.1+ 𝑙_2.2)𝑑_𝑥𝑙2+ (𝑙_3.1− 𝑙_3.2)𝑑_𝑥𝑙3+ (𝑙_4.1− 𝑙_4.2)𝑑_𝑥𝑙4] ∙ 𝑖̂_𝑥𝑛 (3.28) 𝑖̂_𝐶𝑥1= [(𝑙₂− 𝑙_2.2)𝑑_𝑥𝑙2+ (𝑙₃− 𝑙_3.3)𝑑_𝑥𝑙3+ 𝑙_4.2𝑑_𝑥𝑙4] ∙ 𝑖̂_𝑥𝑛 (3.29)

100 𝑖̂_𝐶𝑥2= [−𝑙_2.2𝑑_𝑥𝑙2+ (𝑙₃− 𝑙_3.1)𝑑_𝑥𝑙3+ (−𝑙₄+ 𝑙_4.2)𝑑_𝑥𝑙4] ∙ 𝑖̂_𝑥 (3.30) where 𝑙₁, 𝑙₂, 𝑙₃, and 𝑙₄ are the switching state control functions; while 𝑙_2.1, 𝑙_2.2, 𝑙_3.1, 𝑙_3.2, 𝑙_3.3, 𝑙_4.1 and 𝑙_4.2 are the redundant switching state control functions as stated in Table 3.7. The switching state is activated by the switching state control function being represented by the value ‘1’, when deactivated by the value ‘0’. The duty cycles of the voltage levels 1 to 5 are represented by the variables 𝑑_𝑥𝑙1, 𝑑_𝑥𝑙2, 𝑑_𝑥𝑙3, 𝑑_𝑥𝑙4 and 𝑑_𝑥𝑙5, respectively. Therefore, the redundant switching state to be selected for the voltage balancing control technique of the clamping capacitor voltage will be carried out by activating the redundant switching state control function. Also, the voltage balancing control technique of the clamping capacitor voltage can be achieved by adjusting the duty cycle of the voltage levels through the duty cycle of the switching power semiconductor devices. Therefore, the switch control functions in equations (3.4) to (3.7) are replaced by the product of the switching state control functions and associated duty cycle variables of the voltage level when the clamping capacitor is charging as presented in equations (3.27) to (3.30), as extracted from Table 3.2 and Table 3.7.

3) 7L-MNNPC Converter Topology

Figure 3.7 shows the circuit diagram of a 3ph 7L-MNNPC converter topology which consist of two clamping capacitors per phase, 𝐶_𝑥1 and 𝐶_𝑥2 (where 𝑥 represents 𝑎, 𝑏, 𝑐 of each converter phase leg) and a neutral-point. The clamping capacitor voltage must be maintained at one-sixth of the dc-link voltage. The switch control functions 𝑠_𝑥𝑦 (where 𝑦 represents 1, … , 8), which shows the position of each switching power semiconductor device in the converter topology.

The switch control function states the operational switching state of the converter topology highlighted in Table 3.3.

Based on the mathematical model of a 1ph 7L-MNNPC converter topology presented in equations (3.8) to (3.10), the average representation of the output phase voltage (3.8) and the current flowing through the clamping capacitors 𝐶_𝑥1, and 𝐶_𝑥2 (𝑖. 𝑒. 𝑖_𝐶𝑥1, and 𝑖_𝐶𝑥2) {(3.9) to (3.10)} obtained over a switching period are expressed below.

𝑣̂_𝑥𝑜= [(𝑑_𝑥5− 1)^𝑉𝑑𝑐

2 + 𝑑_𝑥4(𝑣̂_𝑐𝑥1+ 𝑣̂_𝑐𝑥2) + (𝑑_𝑥3− 1)𝑣̂_𝑐𝑥2+ (𝑑_𝑥2− 1)𝑣̂_𝑐𝑥1+ 𝑑_𝑥1𝑣̂_𝑐𝑥1] (3.31) 𝑖̂_𝐶𝑥1= (𝑑_𝑥4− 𝑑_𝑥2) ∙ 𝑖̂_𝑥𝑛 (3.32) 𝑖̂𝐶𝑥2= (𝑑𝑥4− 𝑑𝑥3) ∙ 𝑖̂𝑥𝑛 (3.33)

101 where 𝑣̂_𝑐𝑥1 and 𝑣̂_𝑐𝑥2 are the average voltages of the clamping capacitors 𝐶_𝑥1 and 𝐶_𝑥2, respectively. 𝑖̂_𝐶𝑥1 and 𝑖̂_𝐶𝑥2 are the average currents flowing through the clamping capacitors 𝐶_𝑥1 and 𝐶_𝑥2. 𝑖̂_𝑥𝑛 is the average output current, and 𝑑_𝑥1, 𝑑_𝑥2, 𝑑_𝑥3, 𝑑_𝑥4, 𝑑_𝑥5, 𝑑_𝑥3 and 𝑑_𝑥2 are the duty cycles of the switching functions 𝑆_𝑥1, 𝑆_𝑥2, 𝑆_𝑥3, 𝑆_𝑥4, 𝑆_𝑥5, 𝑆_𝑥3 and 𝑆_𝑥2, respectively. The average voltage of the clamping capacitors can be expressed as:

𝑣̂_𝑐𝑥1 = ¹

𝐶_𝑥1∫ 𝑖̂₀^𝑡 _𝐶𝑥1𝑑𝑡 +𝑉_𝑐𝑥1 (3.34) 𝑣̂_𝑐𝑥2 = ¹

𝐶𝑥2∫ 𝑖̂₀^𝑡 _𝐶𝑥2𝑑𝑡 +𝑉_𝑐𝑥2 (3.35) where 𝑉_𝑐𝑥1 and 𝑉_𝑐𝑥2 are the initial voltage values of the clamping capacitors 𝐶_𝑥1 and 𝐶_𝑥2.

Table 3.8, the switching state control function of each switching state have been highlighted.

The switch state control function 𝑙_𝑚 (where 𝑚 represents 1, … , 7), which show the actual switching state of a specific voltage level of the converter topology. Furthermore, some switching states have an extra state within a particular voltage level known as redundant Table 3.8: Highlighting Switching State Control Functions of a 7L-MNNPC converter.

𝑺_𝒙𝟔 𝑺_𝒙𝟓 𝑺_𝒙𝟒 𝑺_𝒙𝟑 𝑺_𝒙𝟐 𝑺_𝒙𝟏 𝑺_𝒙𝟔 𝑺_𝒙𝟓 𝑺_𝒙𝟒 𝑺_𝒙𝟑 𝑺_𝒙𝟐 𝑺_𝒙𝟏 𝑽_𝒙𝒐 Switching State

Switching State Control

Function

1 1 1 1 1 1 0 0 0 0 0 0 𝑉_𝑑𝑐⁄2 1 𝑙₁

1 1 1 1 1 0 0 0 0 0 0 1 𝑉_𝑑𝑐⁄3 2 𝑙₂

1 1 1 0 0 1 0 0 0 1 1 0 𝑉_𝑑𝑐⁄3 2.1 𝑙_2.1

1 1 0 1 1 0 0 0 1 0 0 1 𝑉_𝑑𝑐⁄3 2.2 𝑙_2.2

1 1 0 0 0 1 0 0 1 1 1 0 𝑉𝑑𝑐⁄3 2.3 𝑙_2.3

1 1 1 0 0 0 0 0 0 1 1 1 𝑉𝑑𝑐⁄6 3 𝑙₃

1 1 0 0 1 1 0 0 1 1 0 0 𝑉𝑑𝑐⁄6 3.1 𝑙_3.1

1 1 0 0 0 0 0 0 1 1 1 1 0 4 𝑙₄

0 0 1 1 1 1 1 1 0 0 0 0 0 4.1 𝑙_4.1

0 0 1 1 0 0 1 1 0 0 1 1 −𝑉_𝑑𝑐⁄6 5 𝑙₅

0 0 0 1 1 1 1 1 1 0 0 0 −𝑉_𝑑𝑐⁄6 5.1 𝑙_5.1

0 0 1 0 0 1 1 1 0 1 1 0 −𝑉_𝑑𝑐⁄3 6 𝑙₆

0 0 1 1 1 0 1 1 0 0 0 1 − 𝑉_𝑑𝑐⁄3 6.1 𝑙_6.1

0 0 0 1 1 0 1 1 1 0 0 1 − 𝑉_𝑑𝑐⁄3 6.2 𝑙_6.2

0 0 0 0 0 1 1 1 1 1 1 0 − 𝑉𝑑𝑐⁄3 6.3 𝑙_6.3

0 0 0 0 0 0 1 1 1 1 1 1 −𝑉𝑑𝑐⁄2 7 𝑙₇

102 switching state. Therefore, the redundant switch state control function 𝑙_𝑚.𝑛, where 𝑚 represents the actual switching state (as previously stated) and 𝑛 represents the redundant switching state of a specific voltage level of the converter topology (where 𝑛 = 1, 2, 3). Figures 3.11(a) to 3.11(l) shows the switching states and redundant switching states of each voltage level that affect the clamping capacitor voltage.

Sx5

Sx5

Sx6

Sx6

Sx4 Sx2

Sx4

Sx2

Sx3

Sx3

Sx1

Sx1

V

^xo

V

^dc

/2

V

^dc

/2

Cx1

Cx2

(Ix)>0

(a) S^x5

S^x5

S^x6

S^x6

S^x4 S^x2

S^x4

S^x2

S^x3

S^x3

S^x1

S^x1

V

^xo

V

^dc

/2

V

dc

/2

Cx1

C^x2 (I^x)>0

(b)

103 Sx5

Sx5

Sx6

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Sx4 Sx2

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Sx2

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Sx3

Sx1

Sx1

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^xo

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^dc

/2

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^dc

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Cx1

Cx2

(Ix)>0

(c)

Sx5

Sx5

Sx6

S^x6

Sx4 Sx2

Sx4

Sx2

Sx3

Sx3

Sx1

Sx1

V^xo Vdc/2

V^dc/2

C^x1 Cx2

(Ix)>0

(d)

Sx5

Sx5

Sx6

Sx6

Sx4 Sx2

Sx4

Sx2

S^x3

Sx3

Sx1

Sx1

V^xo V^dc/2

V^dc/2

Cx1

Cx2

(Ix)>0

(e)

104 Sx5

Sx5

Sx6

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Sx4 Sx2

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^xo

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/2

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Cx1

Cx2

(Ix)>0

(f) Sx5

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^xo

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/2

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^dc

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Cx1

Cx2

(Ix)>0

(g) S^x5

S^x5

S^x6

S^x6

S^x4 S^x2

S^x4

S^x2

S^x3

S^x3

S^x1

S^x1

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^xo

V

^dc

/2

V

dc

/2

Cx1

C^x2 (I^x)>0

(h)

105 S^x5

Sx5

Sx6

Sx6

Sx4 Sx2

Sx4

Sx2

Sx3

Sx3

Sx1

Sx1

V^xo Vdc/2

Vdc/2

Cx1

Cx2

(Ix)>0

(i) Sx5

Sx5

Sx6

Sx6

Sx4 Sx2

Sx4

Sx2

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Sx1

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^xo

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^dc

/2

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Cx1

Cx2 (Ix)>0

(j) Sx5

Sx5

Sx6

Sx6

Sx4 Sx2

Sx4

Sx2

Sx3

Sx3

Sx1

Sx1

V

^xo

V

^dc

/2

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^dc

/2

Cx1

Cx2 (Ix)>0

(k)

106 Sx5

Sx5

Sx6

Sx6

Sx4 Sx2

Sx4

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Sx3

Sx1

Sx1

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^xo

V

^dc

/2

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^dc

/2

Cx1

Cx2 (Ix)>0

(l)

Figure 3.11: Impact of switching states and positive phase current on the clamping capacitor voltages in a 7L-MNNPC converter. (a) State 2. (b) State 2.1. (c) State 2.2. (d)

State 2.3. (e) State 3. (f) State 3.1. (g) State 5. (h) State 5.1 (i) State 6. (j) State 6.1. (k) State 6.2. and (l) State 6.3.

Therefore, the average output voltage and clamping capacitors current in (3.31) to (3.33) can be expressed in terms of the duty cycle of each switching state, as stated below.

𝑣̂_𝑥𝑜 = [((𝑙₄𝑑_𝑥𝑙4+ 𝑙₃𝑑_𝑥𝑙3+ 𝑙₂𝑑_𝑥𝑙2+ 𝑑_𝑥𝑙1) − 1)^𝑉𝑑𝑐

2 + (((𝑙_2.1− 𝑙₂)𝑑_𝑥𝑙2)𝑣̂_𝑐𝑥1 +

((𝑙_2.1− 𝑙_2.2)𝑑_𝑥𝑙2) 𝑣̂_𝑐𝑥2) + (((𝑙₃− 𝑙_3.1)𝑑_𝑥𝑙3) − 1) 𝑣̂_𝑐𝑥2+ (((𝑙₅− 𝑙_5.1)𝑑_𝑥𝑙5) − 1) 𝑣̂_𝑐𝑥1+ ((𝑙_6.1− 𝑙_6.2)𝑑_𝑥𝑙6)𝑣̂_𝑐𝑥1] (3.36) 𝑖̂_𝐶𝑥1= [𝑙_2.1𝑑_𝑥𝑙2+ (𝑙₃− 𝑙_3.1)𝑑_𝑥𝑙3+ (𝑙₅− 𝑙_5.1)𝑑_𝑥𝑙5+ 𝑙₆𝑑_𝑥𝑙6] ∙ 𝑖̂_𝑥𝑛 (3.37) 𝑖̂_𝐶𝑥2= [𝑙_2.2𝑑_𝑥𝑙2+ (𝑙₃− 𝑙_3.1)𝑑_𝑥𝑙3+ (𝑙₅− 𝑙_5.1)𝑑_𝑥𝑙5+ 𝑙_6.2𝑑_𝑥𝑙6] ∙ 𝑖̂_𝑥𝑛 (3.38) where 𝑙₁, 𝑙₂, 𝑙₃, 𝑙₄, 𝑙₅, and 𝑙₆ are the switching state control functions; while 𝑙_2.1, 𝑙_2.2, 𝑙_2.3, 𝑙_3.1, 𝑙_4.1, 𝑙_5.1, 𝑙_6.1, 𝑙_6.2 and 𝑙_6.3 are the redundant switching state control functions as stated in Table 3.8. The switching state is activated by the switching state control function being represented by the value ‘1’, when deactivated by the value ‘0’. The duty cycles of the voltage levels 1 to 7 are represented by the variables 𝑑_𝑥𝑙1, 𝑑_𝑥𝑙2, 𝑑_𝑥𝑙3, 𝑑_𝑥𝑙4, 𝑑_𝑥𝑙5, 𝑑_𝑥𝑙6 and 𝑑_𝑥𝑙7, respectively.

Therefore, the redundant switching state to be selected for the voltage balancing control technique of the clamping capacitor voltage will be carried out by activating the redundant switching state control function. Also, the voltage balancing control technique of the clamping capacitor voltage can be achieved by adjusting the duty cycle of the voltage levels through the

107 duty cycle of the switching power semiconductor devices. Therefore, the switch control functions in equations (3.8) to (3.10) are replaced by the product of the switching state control functions and associated duty cycle variables of the voltage level when the clamping capacitor is charging as presented in equations (3.36) to (3.38), as extracted from Table 3.3 and Table 3.8.