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Computer Architecture and Organization

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Date: 15th January 2019

Computer Architecture and Organization

CSE322 Computer Architecture and Organization: The evolution of computers, CPU Performance measurement, Data representation, various elements of computer design: CPU organization: RISC and CISC – instructions sets, addressing modes. Data path Design: fixed and floating point arithmetic, Combinational and sequential ALU design, pipelined adder, multiplier, systolic arrays. Control Design: Hardwired and Micro-programmed control, Pipeline control.

Memory Organization: multilevel memories, address translation, Cache memory — address mapping. System Organization: I/O control, Bus control. [Prerequisite: CSE232].

Session 1

Computing and Computer: The Nature of Computing: The abacus & slide rule, The Elements of Computers, The brain versus the computer, The Evolution of Computers:

Mechanical Computer, Babbage’s Difference Engine, The Analytical Engine, Electronic Computer, and Computer generations.

Computer Generations.

Session 2

Design Methodology: System Design, System Representation, Hardware description language, Design process, Flowchart of an iterative design process, Design Levels, sum-of-products (SOP), product-of-sum (POS), System Bus and Interrupt.

Session 3

Data Representation: Bit, Byte, Word, Binary number system, ASCII, EBCDIC, Unicode, Integer, Floating point, Positive Number Representation, Half Adder, Full Adder, Ripple Carry Adder, Negative Number Representation.

Session 4

Processor Basics: Computer Program Execution, Block Diagram and Basic Operation, Basic CPU Design, Expanded Instruction Sets, Instruction Set Design: Fixed versus Variable-Length Instruction Formats, Number of Data Operands, Endian Mode, Addressing Modes, Other Instruction Design Issues, Modern CPUs, Pipeline.

Session 5

Datapath Design: Simple Adder Designs, Carry Lookahead Addition, Multiplication:

Combinational Multiplier, Sequential Multiplier, Sequential Multiplication, Booth’s Algorithm, Division: Sequential Divider, Combinational Divider, Arithmetic Logic Unit (ALU), Design of One Bit of ALU, Coprocessor, Pipeline Processing, Categorization of Pipeline Structures, Simple Instruction Pipelines.

Session 6

Memory Organization: Storage-Device Hierarchy, Introduction to Caches, Cache Fundamentals: cache hit, Cache miss, Cache-Memory Transfers, Types of Memory: Real memory and Virtual memory, Transfer of a Paged Memory to Contiguous Disk Space, Magnetic Disk, Optical Disk and Magnetic Tape.

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Exam Details:

Quiz 1 29– 30 January 2019

Assignment 1 05 – 10 February 2019

Quiz 2 10 – 12 February 2019

Assignment 2 25 – 28 February 2019

Mid Term Exam 1st week March 2019

Quiz 3 25 – 28 March 2019

Presentation 20 – 25March 2019

Assignment 3 01 – 05 April 2019

Final Exam: 15 – 20 April 2019

Assignments:

1. The Configuration of a Microcomputer

2. What is adder? Explain both of the adder (Half & Full) with proper circuit diagram and truth table.

3. What is Memory Organization of a computer system? Explain it briefly.

Book References:

1. Computer Architecture and Organization by John P. Hayes, Third Edition.

2. Computer Organization & Architecture by William Stallings, 6th Edition.

3. Fundamentals of Digital Logic with Verilog Design by Stephen Brown & Zvonko Vranesic.

4. Digital Principles and Applications by Albert Paul Malvino and Donald P. Leach, Fourth Edition.

5. Assembly Language Programming and Organization of the IBM PC by Ytha Yu and Charles Marut.

6. Microprocessors and Microcomputer-Based System Design by Mohamed Rafiquzzaman.

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