ADC0801ADC0802ADC0803ADC0804ADC0805 8-Bit P Compatible AD Converters

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ADC0801/ADC0802/ADC0803/ADC0804/ADC0805

8-Bit P Compatible A/D Converters

General Description

The ADC0801, ADC0802, ADC0803, ADC0804 and ADC0805 are CMOS 8-bit successive approximation A/D converters that use a differential potentiometric

ladder—similar to the 256R products. These converters are designed to allow operation with the NSC800 and INS8080A derivative control bus with TRI-STATE® output latches directly driving the data bus. These A/Ds appear like memory locations or I/O ports to the microprocessor and no interfacing logic is needed.

Differential analog voltage inputs allow increasing the common-mode rejection and offsetting the analog zero input voltage value. In addition, the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8 bits of resolution.

Features

n Compatible with 8080 8P derivatives—no interfacing

logic needed - access time - 135 ns

n Easy interface to all microprocessors, or operates “stand alone”

n Differential analog voltage inputs

n Logic inputs and outputs meet both MOS and TTL voltage level specifications

n Works with 2.5V (LM336) voltage reference n On-chip clock generator

n 0V to 5V analog input voltage range with single 5V supply

n No zero adjust required

n 0.3" standard width 20-pin DIP package

n 20-pin molded chip carrier or small outline package n Operates ratiometrically or with 5 VDC, 2.5 VDC, or

analog span adjusted voltage reference

Key Specifications

n Resolution 8 bits

n Total error ±1⁄4 LSB, ±1⁄2 LSB and ±1 LSB n Conversion time 100 8s

Connection Diagram

Ordering Information

TEMP RANGE 0°C TO 70°C 0°C TO 70°C −40°C TO +85°C

±1⁄4 Bit Adjusted ADC0801LCN

ERROR ±1⁄2 Bit Unadjusted ADC0802LCWM ADC0802LCN ±1⁄2 Bit Adjusted ADC0803LCN

±1Bit Unadjusted ADC0804LCWM ADC0804LCN ADC0805LCN/ADC0804LCJ PACKAGE OUTLINE M20B—Small

Outline

N20A—Molded DIP

TRI-STATE® is a registered trademark of National Semiconductor Corp. Z-80® is a registered trademark of Zilog Corp.

ADC080X

Dual-In-Line and Small Outline (SO) Packages

DS005671-30

See Ordering Information

November 1999

ADC0801/ADC0802/ADC0803/ADC0804/ADC0805 8-Bit P

Compatible A/D Converters

Typical Applications

Error Specification (Includes Full-Scale, Zero Error, and Non-Linearity)

Part Full- VREF/2=2.500 VDC VREF/2=No Connection Number Scale (No Adjustments) (No Adjustments) Adjusted

ADC0801 ±1⁄4 LSB ADC0802 ±1⁄2 LSB ADC0803 ±1⁄2 LSB

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ADC0804 ±1 LSB ADC0805 ±1 LSB DS005671-1

8080 Interface

DS005671-31

ADC0801/ADC0802/ADC0803/ADC0804/ADC0805

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Absolute Maximum Ratings

(Notes 1, 2)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

Supply Voltage (VCC) (Note 3) 6.5V

Voltage

Logic Control Inputs −0.3V to +18V

At Other Input and Outputs −0.3V to (VCC+0.3V)

Lead Temp. (Soldering, 10 seconds) Dual-In-Line Package (plastic) 260°C Dual-In-Line Package (ceramic) 300°C Surface Mount Package

Vapor Phase (60 seconds) 215°C Infrared (15 seconds) 220°C

Storage Temperature Range −65°C to +150°C Package Dissipation at TA=25°C 875 mW ESD Susceptibility (Note 10) 800V

Operating Ratings

(Notes 1, 2) Temperature Range TMIN≤TA≤TMAX

ADC0804LCJ −40°C≤TA≤+85°C ADC0801/02/03/05LCN −40°C≤TA≤+85°C ADC0804LCN 0°C≤TA≤+70°C

ADC0802/04LCWM 0°C≤TA≤+70°C Range of VCC 4.5 VDC to 6.3 VDC

Electrical Characteristics

The following specifications apply for VCC=5 VDC, TMIN≤TA≤TMAX and fCLK=640 kHz unless otherwise specified.

Parameter Conditions Min Typ Max Units

ADC0801: Total Adjusted Error (Note 8) With Full-Scale Adj. ±1⁄4 LSB (See Section 2.5.2)

ADC0802: Total Unadjusted Error (Note 8) VREF/2=2.500 VDC ±1⁄2 LSB ADC0803: Total Adjusted Error (Note 8) With Full-Scale Adj. ±1⁄2 LSB (See Section 2.5.2)

ADC0804: Total Unadjusted Error (Note 8) VREF/2=2.500 VDC ±1 LSB ADC0805: Total Unadjusted Error (Note 8) VREF/2-No Connection ±1 LSB VREF/2 Input Resistance (Pin 9) ADC0801/02/03/05 2.5 8.0 kΩ

ADC0804 (Note 9) 0.75 1.1 kΩ

Voltage Range (Note 4)

AC Electrical Characteristics

The following specifications apply for VCC=5 VDC and TMIN≤TA≤TMAX unless otherwise specified.

Symbol Parameter Conditions Min Typ Max Units

TC Conversion Time fCLK=640 kHz (Note 6) 103 114 8s TC Conversion Time (Notes 5, 6) 66 73 1/fCLK

fCLK Clock Frequency VCC=5V, (Note 5) 100 640 1460 kHz

Clock Duty Cycle 40 60 %

CR Conversion Rate in Free-Running INTR tied to WR with 8770 9708 conv/s Mode CS =0 VDC, fCLK=640 kHz

tW(WR)L Width of WR Input (Start Pulse Width) CS =0 VDC (Note 7) 100 ns

tACC Access Time (Delay from Falling CL=100 pF 135 200 ns

Edge of RD to Output Data Valid)

t1H, t0H TRI-STATE Control (Delay CL=10 pF, RL=10k 125 200 ns

from Rising Edge of RD to (See TRI-STATE Test Hi-Z State) Circuits)

tWI, tRI Delay from Falling Edge 300 450 ns of WR or RD to Reset of INTR

CIN Input Capacitance of Logic 5 7.5 pF Control Inputs

ADC0801/ADC0802/ADC0803/ADC0804/ADC0805

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“Program Fuzzy Pada Pengontrolan Suhu dan Kelembaban

Pada Strawberry”

;data lcd p0 rs_lcd equ p1.0 e_lcd equ p1.1 ;

display_clear equ 01h funcset equ 38h

entrymodset equ 06h dispon equ 0ch cursor equ 0eh blink equ 0fh ;

SizeX equ 3 ; 24 bit! ;

Operand EQU 30H Pembagi EQU 33H HasilBagi EQU 36H SisaBagi EQU 39H Pengali EQU Pembagi HasilKali EQU HasilBagi ;

ram_lcd equ 40h data_lcd equ 41h dataadc equ 42h temp_rib equ 43h temp_rat equ 44h temp_pul equ 45h temp_sat equ 46h temp_sisa equ 47h countsampling equ 48h countt equ 49h

LSBDIV equ 4ah MSBDIV equ 4bh ;

fsisa bit 20h.0 ftimer0 bit 20h.1 ;

org 0000h jmp start org 0030h

; ***** Multi Byte divider Pembagian:

MOV R0,#HasilBagi ACALL HapusNilai MOV R0,#SisaBagi CALL HapusNilai ;

MOV R3,#SizeX*8

(5)

LoopPembagian: CLR C

MOV R0,#Operand CALL GeserKiri1X MOV R0,#SisaBagi ACALL GeserKiri1X ;

MOV R0,#SisaBagi MOV R1,#Pembagi

CALL Perbandingan ; SisaBagi-Pembagi? JC JanganDikurangi ;

SisaBagi<Pembagi, skip! ;

MOV R0,#SisaBagi MOV R1,#Pembagi

CALL Pengurangan ;SisaBagi:=SisaBagi- Pembagi

JanganDikurangi: CPL C

MOV R0,#HasilBagi ;Simpan hasil CALL GeserKiri1X

DJNZ R3,LoopPembagian RET

;

GeserKiri1X: MOV R2,#SizeX LeftShift: MOV A,@R0 RLC A MOV @R0,A INC R0

DJNZ R2,LeftShift RET

; ***** Multi Byte Comparator Perbandingan:

CLR C

MOV R2,#SizeX LoopPerbandingan: MOV A,@R0

SUBB A,@R1 INC R1 INC R0

DJNZ R2,LoopPerbandingan RET

; ***** Multi Byte Substractor Pengurangan:

CLR C

MOV R2,#SizeX LoopPengurangan: MOV A,@R0

SUBB A,@R1 MOV @R0,A

(6)

INC R0 INC R1

DJNZ R2,LoopPengurangan RET

; ***** Multi Byte Eraser HapusNilai:

MOV R2,#SizeX LoopHapus: MOV @R0,#0 INC R0

DJNZ R2,LoopHapus RET

; ***** Multi Byte Multiplier Perkalian:

MOV R0,#HasilKali ACALL HapusNilai ;

MOV R3,#SizeX*8 LoopPerkalian: CLR C

MOV R0,#Pengali+SizeX-1 MOV R2,#SizeX

GeserKanan: MOV A,@R0 RRC A MOV @R0,A DEC R0

DJNZ R2,GeserKanan ;

JNC JanganDitambah ;

MOV R0,#HasilKali MOV R1,#Operand CALL Penambahan JanganDitambah: CLR C

MOV R0,#Operand CALL GeserKiri1X DJNZ R3,LoopPerkalian RET

; ***** Multi Byte Adder Penambahan:

CLR C

MOV R2,#SizeX LoopPenambahan: MOV A,@R0

ADDC A,@R1 MOV @R0,A INC R0 INC R1

DJNZ R2,LoopPenambahan RET

(7)

; JUM16: CLR C

ADD A,LSBDIV MOV LSBDIV,A MOV A,MSBDIV ADDC A,#0 MOV MSBDIV,A RET

;

_panas:

mov countsampling,#5 ; call sampling_data mov a,dataadc

mov b,#2 div ab mov r1,a mov a,b mov b,#5 mul ab

mov temp_sisa,a mov a,r1

mov b,#100 div ab

mov temp_rat,a mov a,b

mov b,#10 div ab

mov temp_pul,a mov temp_sat,b mov a,b

mov b,#10 div ab

mov temp_sisa,a ret

;

sampling_data1: mov lsbdiv,#0 mov msbdiv,#0

mov r4,countsampling ulangsam1:

call read_adc1 mov a,dataadc call jum16

djnz r4,ulangsam1 mov operand,lsbdiv mov operand+1,msbdiv mov operand+2,#0

mov pembagi,countsampling mov pembagi+1,#0

mov pembagi+2,#0 call pembagian

(8)

mov dataadc,hasilbagi ret

;

baca_suhu: mov p3,#00h

mov countsampling,#5 call sampling_data1 mov a,dataadc

mov b,#100 div ab

mov b,#10 div ab

mov temp_pul,a mov temp_sat,b call disp_suhu ret

;

read_suhu: read_adc1: mov dataadc,P2 next_sampling: nop

;mov r2,#25 not_EOC:

delay: djnz R2,$ djnz R3,delay mov dataadc,P2 djnz R3,$ ret

;

text_suhu: db 'Suhu :',0 ;

disp_suhu:

mov dptr,#text_suhu call tampilline1 mov a,temp_rat cjne a,#0,blktemp1 mov a,#' '

call write_data mov a,temp_pul cjne a,#0,blktemp2

(9)

mov a,#' ' call write_data jmp blktemp3 blktemp1: mov a,temp_rat call disp_angka blktemp2:

mov a,temp_pul call disp_angka blktemp3:

mov a,temp_sat call disp_angka mov a,#'.' call write_data mov a,temp_sisa call disp_angka mov a,#0dfh call write_data mov a,#'C' call write_data ret

banding:

mov a,temp_pul cjne a,#2,st mov a,temp_sat cjne a,#1,st1 call kondisi_1 ret

st: mov a,temp_pul cjne a,#1,st21 mov a,temp_sat cjne a,#0,st22 acall kondisi_2 ret

st21 : ajmp st21a st22 : ajmp st22a st1: mov a,temp_sat cjne a,#2,st11 call kondisi_1 ret

st11: mov a,temp_sat cjne a,#3,st111 call kondisi_1 ret

(10)

st1111111:call kondisi_1 ret

kondisi_1: setb p1.6 setb p1.7 clr p1.5 mov r4,#5 call job1 clr p1.7 mov r4,#5 clr p1.6 ret ;

kondisi_2: clr p1.6 setb p1.7 mov r4,#3 call job1 setb p1.5 mov r4,#5 call job1 clr p1.7 mov r4,#3 call job1 clr p1.5 ret ;

st21a: mov a,temp_pul cjne a,#1,st21b

st22a: mov a,temp_sat cjne a,#1,st22b

acall kondisi_2 ret

st21b : mov a,temp_pul cjne a,#1,st21c

st22b: mov a,temp_sat cjne a,#2,st22c

acall kondisi_2 ret

st21c: mov a,temp_pul cjne a,#1,st21d

st22c: mov a,temp_sat cjne a,#3,st22d

acall kondisi_2

(11)

ret

st21d: mov a,temp_pul cjne a,#1,st21e

st22d: mov a,temp_sat cjne a,#4,st22e

acall kondisi_2 ret

st21e:mov a,temp_pul cjne a,#1,st21f

st22e: mov a,temp_sat cjne a,#5,st22f

acall kondisi_2 ret

st21f: mov a,temp_pul cjne a,#1,st21g

st22f: mov a,temp_sat cjne a,#6,st22g

acall kondisi_2 ret

st21g: mov a,temp_pul cjne a,#1,st21h

st22g: mov a,temp_sat cjne a,#7,st23

acall kondisi_3 ret

st21h:ajmp banding kondisi_3:

setb p1.6 mov r4,#3 call job1 setb p1.7 clr p1.6 clr p1.7 clr p1.5 ret ;

st23 : mov a,temp_sat cjne a,#8,st23a

acall kondisi_3 ret

st23a: mov a,temp_sat cjne a,#9,st23b

acall kondisi_3 ret

st23b: mov a,temp_pul cjne a,#2,st21h

mov a,temp_sat cjne a,#0,st23c acall kondisi_3 ret

st23c: ret

(12)

;ajmp banding ;

;********************* ;inisialisasi lcd init_lcd:

mov a,#funcset call write_control mov a,#dispon call write_control mov a,#display_clear call write_control call dlylcd2

mov a,#entrymodset call write_control ret

;********************* dlylcd2:

mov r6,#40h dly2:

mov r7,#0 dly3:

djnz r7,dly3 djnz r6,dly2 ret

;

;********************* write_control:

clr e_lcd ;e=0 clr rs_lcd ;rs=0 mov p0,a

sjmp dlylcd1

;********************* write_data:

clr e_lcd ;e=0 setb rs_lcd ;rs=1 mov p0,a

;

dlylcd1:

setb e_lcd ;e=1 mov r7,#250 djnz r7,$ clr e_lcd ;e=0 ret

;********************* ;line lcd

line2: mov a,#0c0h sjmp lineout line1:

mov a,#80h lineout:

call write_control

(13)

ret

;********************* ;tampilan karakter tampilline2:

call line2 sjmp outchar tampilline1: call line1 sjmp outchar tampilcharloop: call write_data inc dptr

outchar: clr a

movc a,@a+dptr jnz tampilcharloop ret

;

tampilinram: clr a

movc a,@a+dptr jz finish_send mov data_lcd,a call send_lcd inc dptr inc ram_lcd sjmp tampilinram finish_send: ret

;;

;********************* ;send to add lcd

send_lcd: mov a,#9 clr c

subb a,data_lcd jc sendtoram mov a,data_lcd orl a,#30h mov data_lcd,a sendtoram: mov a,ram_lcd orl a,#80h

call write_control mov a,data_lcd call write_data ret

;

disp_angka: orl a,#30h call write_data ret

(14)

;********************* ;delay time

sebentar: call dlybounc djnz r5,sebentar ret

dlybounc: mov r6,#100 loopb2: mov r7,#250 loopb1: nop nop nop

djnz r7,loopb1 djnz r6,loopb2 ret

;

text_menu1: db '1.Suhu ',0 text_menu2:

db '2.Kelembaban ',0 ;

disp_menu: call init_lcd

mov dptr,#text_menu1 call tampilline1 mov dptr,#text_menu2 call tampilline2 ret

;

timer0: clr tr0 push acc push psw

djnz countt,resett0 setb ftimer0

clr tr0 clr tr1 jmp finisht0 resett0: mov tl0,#0efh mov th0,#0d8h setb tr0 finisht0: pop psw pop acc reti ;

read_kelembaban: mov p2,#00h

mov countsampling,#5

(15)

call sampling_data21 mov a,dataadc

mov b,#100 div ab

mov b,#10 div ab

mov temp_pul,a mov temp_sat,b

call disp_kelembaban ret

;

read_adc2: next_sampling2: nop

not_EOC2: ;mov r2,#25 delay2: djnz R2,$ djnz R3,delay2 djnz R3,$ mov dataadc,P3 ret

;

sampling_data21: mov lsbdiv,#0 mov msbdiv,#0

mov r4,countsampling ulangsam21:

call read_adc2 mov a,dataadc call jum16

djnz r4,ulangsam21 mov operand,lsbdiv mov operand+1,msbdiv mov operand+2,#0

mov pembagi,countsampling mov pembagi+1,#0

mov pembagi+2,#0 call pembagian

mov dataadc,hasilbagi ret

text_kelembaban: db 'kelembaban :',0 ;

(16)

disp_kelembaban:

mov dptr,#text_kelembaban call tampilline1

mov a,temp_rat cjne a,#0,blkc1 mov a,#' ' call write_data mov a,temp_pul cjne a,#0,blkc2 mov a,#' ' call write_data jmp blkc3

; blkc1:

mov a,temp_rat call disp_angka blkc2:

mov a,temp_pul call disp_angka blkc3:

mov a,temp_sat call disp_angka ;

mov a,#'%' call write_data ret

;

banding2: mov a,temp_pul cjne a,#6,sk mov a,temp_sat cjne a,#5,sk1 call kondisi_1a ret

kondisi_1a: setb p1.6 clr p1.5 mov r4,#5 call job1 setb p1.4 setb p1.7 mov r4,#5 clr p1.6 clr p1.7 ret ;

sk: mov a,temp_pul cjne a,#7,sk21 mov a,temp_sat cjne a,#0,sk22 acall kondisi_1a ret

(17)

sk21 : ajmp sk21a sk22 : ajmp sk22a sk1: mov a,temp_sat cjne a,#2,sk11 call kondisi_1a ret

sk11: mov a,temp_sat cjne a,#3,sk111 call kondisi_1a ret

sk1111111:call kondisi_1a ret

;

kondisi_2a: clr p1.6 setb p1.7 mov r4,#3 call job1 mov r4,#5 call job1 clr p1.7 ret ;

sk21a: mov a,temp_pul cjne a,#8,sk21b

sk22a: mov a,temp_sat cjne a,#1,sk22b

acall kondisi_2a ret

sk21b : mov a,temp_pul cjne a,#8,sk21c

sk22b: mov a,temp_sat cjne a,#2,sk22c

sk21c: mov a,temp_pul

(18)

cjne a,#8,sk21d

sk22c: mov a,temp_sat cjne a,#3,sk22d

sk21d: mov a,temp_pul cjne a,#8,sk21e

sk22d: mov a,temp_sat cjne a,#4,sk22e

sk21e:mov a,temp_pul cjne a,#9,sk21f

sk22e: mov a,temp_sat cjne a,#0,sk22f

sk21f: mov a,temp_pul cjne a,#9,sk21g

sk22f: mov a,temp_sat cjne a,#1,sk22g

sk21g: mov a,temp_pul cjne a,#9,sk21h

sk22g: mov a,temp_sat cjne a,#2,sk23

sk21h:ajmp banding2 kondisi_3a:

setb p1.4 mov r4,#3 call job1 clr p1.6 clr p1.7 clr p1.5 clr p1.4 ret ;

sk23 : mov a,temp_sat cjne a,#8,sk23a

sk23a: mov a,temp_sat cjne a,#9,sk23b

sk23b: mov a,temp_pul cjne a,#2,sk21h

mov a,temp_sat cjne a,#0,sk23c

(19)

sk23c: ret ;ajmp banding2 ;

text_tom2:

db '3. Untuk Keluar ',0 text_nama:

db ' O r l i n ',0 text_judul:

db ' Logika Fuzzy ',0 ;

start: clr p1.4 clr p1.5

clr p1.6 clr p1.7 mov p2,#00h mov p3,#00h call init_lcd

mov dptr,#text_nama call tampilline1 mov dptr,#text_judul call tampilline2 mov r5,#20

call sebentar kemenu:

mov p2,#00h mov p3,#00h call init_lcd call disp_menu cek_tom1:

jb p1.2,cek_tom2 call dlybounc jnb p1.2,$ mov p3,#00h ct1:

mov temp_rib,#0 mov temp_rat,#0 mov temp_pul,#0 mov temp_sat,#0 call disp_suhu call init_lcd

mov dptr,#text_tom2 call tampilline2 menu_suhu:

call baca_suhu ;acall banding jb p1.2,menu_suhu call dlybounc jnb p1.2,$ jmp kemenu ;

(20)

cek_tom2:

jb p1.3,cek_tom1 call dlybounc jnb p1.3,$ mov p2,#00h

ct2: call init_lcd mov dptr,#text_tom2 call tampilline2 mov temp_rib,#0 mov temp_rat,#0 mov temp_pul,#0 mov temp_sat,#0 call disp_kelembaban menu_kelembaban: call read_kelembaban ;acall banding2

jb p1.3,menu_kelembaban call dlybounc

jnb p1.3,$ jmp kemenu ;

job1: mov r5,#20 call sebentar djnz r4,job1 ret

;

cek_tom21: mov r4,#15 call job1 setb p1.5 mov r4,#10 call job1 clr p1.5 setb p1.7 mov r4,#2 call job1 setb p1.6 jb p1.2,tj clr p1.7 clr p1.6 ajmp ct1

tj: jb p1.3,tj1 clr p1.7

clr p1.6 ajmp ct2

tj1: mov r4,#10 call job1

clr p1.7 mov r4,#5 call job1 clr p1.6 clr p1.5

(21)

ajmp cek_tom1 ;

tabel_kelembaban: db 0 ;0

db 0 ;1 db 0 ;2 db 0 ;3 db 0 ;4 db 0 ;5 db 1 ;6 db 1 ;7 db 1 ;8 db 1 ;9 ;

db 1 ;10 db 1 ;11 db 2 ;12 db 2 ;13 db 2 ;14 db 2 ;15 db 2 ;16 db 3 ;17 db 3 ;18 db 3 ;19 ;

db 7 ;40 db 7 ;41 db 7 ;42 db 7 ;43 db 7 ;44

(22)

db 8 ;45 db 8 ;46 db 8 ;47 db 8 ;48 db 8 ;49 ;

db 20 ;90 db 20 ;91

(23)

db 21 ;92 db 21 ;93 db 22 ;94 db 22 ;95 db 23 ;96 db 23 ;97 db 24 ;98 db 24 ;99 ;

db 51 ;130 db 52 ;131 db 53 ;132 db 54 ;133 db 55 ;134 db 56 ;135 db 57 ;136 db 58 ;137 db 59 ;139 ;

(24)

db 100;170 db 100;171 db 100;172 db 100;173 db 101;174 db 101;175 db 101;176 db 101;177 db 102;178 db 102;179 ;

db 102;180 db 103;181 db 103;182 db 103;183 db 104;184 db 104;185 db 104;186 db 105;187

(25)

db 105;188 db 105;189 ;

db 118;230 db 118;231 db 118;232 db 118;233 db 119;234

(26)

db 119;235 db 119;236 db 120;237 db 120;238 db 120;239 ;

db 123;250 db 124;251 db 124;252 db 124;253 db 125;254 db 125;255 ;

end