Garner American Chemical Society 032904

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1 C. Michael Garner

March. 29, 2004 C. Michael Garner March. 29, 2004

Nano-material Opportunities and

Challenges for Application in

Electronics

C. Michael Garner Robert Meagley Mansour Moinpour Paul Koning

Tim T. Chen

Intel Corporation

C. Michael Garner Robert Meagley Mansour Moinpour Paul Koning

Tim T. Chen

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Agenda

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Moore's LawMoore's Law

•

Technology Challenges & NanoTechnology Challenges & Nano--material material Opportunities

Opportunities

•

NanoNano--material Challengesmaterial Challenges

•

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3 C. Michael Garner

Key Messages

•

Silicon Nanotechnology is production reality Silicon Nanotechnology is production reality and follows Moore

and follows Moore’’s laws law

•

New materials are needed for future New materials are needed for future technologies

technologies

•

““NanoNano--materialsmaterials”” could play an important role could play an important role in the silicon nanotechnology platform

in the silicon nanotechnology platform

•

Significant challenges must be overcome for Significant challenges must be overcome for “

“nanonano--materialsmaterials”” to be useful in future silicon to be useful in future silicon nanotechnology

nanotechnology

Nanotechnology could deliver critical materials Nanotechnology could deliver critical materials

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10000 10000 1000 1000 100 100 10 10 10 10 1 1 0.1 0.1 0.01 0.01 Micron

Micron NanometerNanometer

1970 1980 1990 2000 2010 2020

Nominal feature size

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Intel

’

s Transistor Research in

Deep Nanotechnology Space

65nm process 65nm process 2005 production 2005 production 30nm 30nm 20nm 20nm 45nm process 45nm process 2007 production

2007 production 32nm process32nm process 2009 production

2009 production

15nm

Experimental transistors for future process generations

22nm process 22nm process 2011 production 2011 production 10nm 10nm

Transistors will be improved for production

Transistors will be improved

for production

Source: Intel

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Silicon Scaling Leads to Material

Challenges

•

LithographyLithography

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TransistorsTransistors

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InterconnectsInterconnects

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7 C. Michael Garner

PPT Shrink Source: Intel

Material Challenges

Materials Challenges Everywhere

Materials Challenges Everywhere

50nm

Resist Nano-domains Resist Nano-domains Print Features

Print Features Line Edge Roughness(LER)Line Edge Roughness(LER)

Low K Interlevel Dielectric Micelle Assembled….

Barrier Layer ~20nm

10nm

What Device Next? What Materials? How to Assemble? What Device Next?

What Device Next?

What Materials?

How to Assemble?

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Future Lithography Resist Challenges

Atomic Force Microscope

Picture of Resist Nano-domains (50nm X 50nm)

Atomic Force Microscope

Picture of Resist Nano-domains (50nm X 50nm)

Line Edge Roughness(LER)

Line Edge Roughness(LER)

•Resist nano-domains limiting feature resolution and defects. •Requires control at the molecular level

•Resist nano-domains limiting feature resolution and defects.

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New Materials, Devices Extend Si

Scaling

Gate Gate Silicide Silicide added added Channel Channel Strained Strained silicon silicon Changes Changes Made Made Future Future Options Options High

High--kk gate gate dielectric dielectric Transistor Transistor Source: Intel Source: Intel Source: Source: Intel Intel PolySi Silicon PolySi Silicon Gate dielectric less than 3 atomic layers thick

•New Chemical Precursors

•New Process Chemicals

•New Chemical Precursors

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Source: Intel

Source: Intel

New Interconnect Materials

Changes Changes Made Made Metal lines Metal lines

Al Cu

Insulating

dielectric

SiO

SiO₂₂ SiOFSiOF CDO

CDO

(low

(low--k)k)

Future Future Options Options Ultra Ultra Low

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Molecular Self

-

Assembly

Low

Low--K DielectricK Dielectric

• Materials of the gel self-organize into a Low K dielectric

• Assembly driven by two-sided organic surfactant molecules

Source: J. Brinker, UNM/Sandia National Labs

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Chemical Mechanical Polish

Carrier

Slurry + Water + Chemicals

Platen

Pad

Chemical Mechanical Planarization (CMP)

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Integrated Thermal and Power

Delivery Management

Heat spreader for high heat flux from die

Capacitors for high current, low noise power delivery

Thermal Challenge

Ultra low thermal resistance Thermal Interface Material

Thermal Challenge

Ultra low thermal resistance Thermal Interface Material Power Challenge

Ultra fast,

high charge density capacitors

Power Challenge Ultra fast,

high charge density capacitors

Nano-material Opportunities in Thermal and Power Delivery

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High Integration Packages

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• Thin SiliconThin Silicon

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• Thin Super Adhesives Thin Super Adhesives

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• Improved Molding CompoundImproved Molding Compound

Improved Adhesives

Mixed Technologies

Substrate 1.5mm

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Nano

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Complexity of Requirements

Materials Integrated Materials Integrated Assembly

Assembly Process Materials Process Materials

Complexity of Requirements

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Nano

-

material Challenges

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Significantly improve material performanceSignificantly improve material performance

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Controlled assembly into useful formsControlled assembly into useful forms

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Control & reproducibility of propertiesControl & reproducibility of properties

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PurityPurity

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MetrologyMetrology

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Environmental Health & Safety DataEnvironmental Health & Safety Data

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Summary

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Silicon Nanotechnology is production reality Silicon Nanotechnology is production reality and follows Moore

and follows Moore’’s laws law

•

New materials are needed for future New materials are needed for future technologies

technologies

•

NanoNano--materials could play an important role in materials could play an important role in the silicon nanotechnology platform

the silicon nanotechnology platform

•

Significant challenges must be overcome for Significant challenges must be overcome for nano

nano--materials to be useful in future silicon materials to be useful in future silicon nanotechnology

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For further information on Intel's silicon technology and Moore’s Law, please visit the Silicon Showcase

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