Figure 5-41 shows the functional blocks within a Harris Semiconductor ICL644, 45, 46, 47 and ICL7644, 45, 46, 47 step-up converters. Figure 5-42 shows the electrical characteristics. These ICs are low-power, fixed +5-V output, step-up DC-DC converters designed for operation from very low input voltages. All control functions and a power FET are contained in the ICL644,45, and 47, minimizing ex
ternal components. The ICL646 contains an output pin to drive an external FET when higher output currents are required.
A control pin changes between high-power and low-power standby modes.
Standby allows operating for extended periods with minimum battery drain, and a power-ready function is available for controlling external devices when the IC is switched between standby and high-power. In the high-power mode, the output cur
rent is about 40 mA. In standby, the power is about 500 μΑ.
Table 5-1 · Design equations for LM78S40 {National Semiconductor Linear Applications Handbook, 1991, p. 1152) LM78S40 Design Formulae Characteristic Step Down Step Up Inverting •PK 2 loUT(max) 2l0UT(max)( L ) /V.NHVQUTKVD-VSAT Rsc 0.33 lpk 0.33 I, pk 0.33 I, pk toff VQUT + Vp V|N ~ VSAT - VpUT VQUT + Vp - VIN VIN - VSAT 'VQUTI + Vp V,N - VSAT
(*»*m)*
'Pk/VQUT + Vp-VlN^ V Ok / EL /IVQUTI + Vp^ 'Pk toff toff IpkL VQUT + Vp
»PkL VQUT + Vp - VIN
JfikL JVQUTI + Vp CT0iF) 45 X 10-5 to^s) 45 x 10-5 toffOxs) 45 X 10-5 to^s) Co lpk (ton + tpff) β VRIPPLE
(!pk ~ IQUT)2 tpff 2 lpk VRIPPLE (lpk - OUT)2 tpff 2 Jpk VRIPPLE Efficiency iViN - VSAT + Vp) VQUT I VIN / VQUT + Vp VIN - VSAT VIN
/ VQUT \ WouT + vD-vsy f JVQUTI \ Wo + ! VQUTI/ 'lN(avg) (Max load condition)
lpk ( VQUT + Vp \ 2 Vv,N - VSAT + vD/ 2 «pk UN + JVQUTI + Vp 2 VV,N + IVQUTI + VD-VSAT Note: VSAT—Saturation voltage of the switching element VQ—forward voltage of the flyback diode
Figure 5-41. Functional block diagram of low-voltage step-up converter (Harris Semi
conductor, Linear and Telecom ICs, 1991, p. 2-91)
Minimum start-up voltage is 1.5 V, but once started, the IC will operate to lower voltages as the battery discharges. A separate low-battery monitor is avail
able. The monitor can be used at its default value of 1.17 V or may be adjusted to any higher voltage.
The ICL644, 46, and 47 are optimized for single-cell (1.15- to 1.6-V) battery operation and can also be used with input voltages up to 4 V. The ICL645 is de
signed for two-cell (or single lithium cell) operation with typical battery voltages of 2 to 3.6 V. The ICL647 is identical to the ICL644 except that the IC647 output is preset to +3 V. The ICL764X series offers the same features as the ICL64X, with the addition of a shutdown feature. In the shutdown mode, the quiescent current is less than 5 μA. Before we get into simplified design of specific applications, here is a description of IC functions.
5.6.1 Basic Operating Principle
The ICs are flyback or boost converters (see Chapter 1). As shown in Fig.
5-41, the circuit consists of a battery in series with a coil, a high-power FET, recti
fier, and a filter. When the switch is closed, current builds up in the coil, creating a magnetic field. During the second half, or flyback part, of the cycle, the power FET opens, the magnetic field collapses, and the voltage across the inductor reverses po
larity, adding to the voltage of the battery and discharging through Dj into the load.
The switch is controlled by a constant-frequency oscillator. The oscillator out
put is gated on and off by a comparator that monitors the output voltage. When the output is above the comparator threshold, the power FET skips an entire cycle of the oscillator. This pulse-skipping technique varies the average duty cycle to achieve regulation, rather than varying the period or duty cycle of each power-FET cycle.
Pulse skipping eliminates a number of linear circuits that would otherwise add both complexity and quiescent operating current.
The key to operating CMOS circuits from a 1-V supply depends on bootstrap
ping. A specially designed oscillator starts itself up on a very low voltage and builds
Figure 5-42. Electrical characteristics for low-voltage step-up converter (Harris Semiconductor, Linear and Telecom ICs, 1991, pp. 2-88-89 Operating Temperature ICL64XCXX OOC to +70OC ICL64XIXX -40°C to +85<>C Storage Temperature -65<>C to +160°C Lead Temperature (Soldering, 10 Sec) +300°C Power Dissipation Plastic DIP (derate 1Om W/OC above 70<>C) 800mW SOIC (derate 8.7m W/©c above 70°C) 695mW
Absolute Maximum Ratings Peak Voltage at LX1 Pin +16V Peak Voltage at LX2 or Vcc Pin +6.6V Supply Voltage to L1 +15V Supply Voltage to L2, Vcc +56v Peak Cubent, LX1 50mA Peak Current. LX2 1.6A LBO Output Current 50mA Input Voltage, CTL, LBI (See Note) -0.3V to (V+ +0.3V) NOTE: V+ is generated ai LX1. In low current mode, it is 4.5V to 5.6V (2.6V to 3.6V on ICL646 & £1.7646); in high current mode. M is 10V to 15V. Steasea above thoa· hated under "Absolute Maximum Ratinga" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Specifications: ICL644, ICL646, ICL647, ICL7644, ICL7646, ICL7647 (GND « OV, VßATT S 1-2V. TA « 25<>C, Unless Otherwise Specified.) SYMBOL VOUT Vud VLX! VLX2 •l_X2 |Q f
°
%ON *ON RPSONPARAMETER Output Voltage Minimum Input Voltage to LX1 Minimum Startup.Voltage to LX1 Input Voltage to LX2 Peak LX2 Switch Current Standby Current Switching Frequency LX2, D Switch Duty Cycle LX2, D Switch On Time LX2 On Resistance TEST CONDITIONS ICL644,ICL646 TA * Over Temp.* ICL647 TA a Over Temp.* k_-0MA(Note1) lL-ΟμΑ ICL644,ICL647<Note1) IL β ΟμΑ, CTL - Open VBATT*10to1.6V ICL644, ICL646 ICL647 ICL644, ICL646 ICL647 ICL646.ICL647 (Notel)
UMITS MIN 4.5 2.7 - - 0.5 - - 15.5 66 50 27 20 0.40
TYP 5.0 3.0 0.9 0.9 - - 80 18 75 66 36 37 -
MAX 5.5 3.3 1.0 1.15 5.6 1.5 - 24 80 75 49 47 0.67
UNITS V V V v I V A μΑ kHz % % j μβ μβ n
VLB| •LBI vLBO VPR VcTL D Output Saturation Current Low Battery Input Threshold Voltage Low Battery Input Threshold Tempco Low Battery Input Bias Curent Low Battery Output Power Ready CTL Input Threshold Efficiency ICL646, Source Sink (Short Circuit Current) VLBI<1-12V,lLB03s1-6mA VLBI^-WLBO35-1^ PRHigh.lpRs-ΙμΑ PR Low, IpR = 1 μΑ 5ma < ILOAD ^ 40ma
- - 1.12 - - - V+-1 - - - -
-25 100 -0.5 0.01 - - vOUT -0.2 0.3 0.07 75
- - 1.18 - 10 0.4 - - - - -
mV/o Electrical Specifications: ICL645 & ICL7645 (GND = OV, VBATT = 2.4V, TA = 25°C, Unless Otherwise Specified.) SYMBOL VOUT" I VLX1 Vud VLX2 >LX2 iQ f
°
| %ON k)N I RpsoNPARAMETER Output Voltage Minimum Input Voltage to LX1 Minimum Startup Voltage to LX1 Input Voltage to LX2 Peak LX2 Switch Current Standby Current Switching Frequency Switch Duty Cycle Switch On Time LX2 On Resistance TEST CONDITIONS TA = Over Temperature* Ι|_ = 0μΑ Ι|_ = 0μΑ(Νοίβ1) (Notai) l|_ = ΟμΑ, CTL ■ Open vBATT = 2.0to3.2V (Notel)
LIMITS MIN 4.5 - - - - - 15.5 40 15 0.40
TYP 5.0 0.9 0.8 - - 40 18 50 28 -
MAX 5.5 1.0 1.15 5.6 1.5 - 24 60 38 0.67
UNIT kH
4* Figure 5-42. (continued) Electrical Specifications: ICL645 & ICL7645 (GND « ov, VBATT = 2.4V, T A = 25<>c. unless otherwise specified.) 1 SYMBOL VLB| >LBI VLBO VpR VcTL PARAMETER Low Battery Input Threshold Voltage Low Battery Input Threshold Tempco Low Battery Input Bias Current Low Battery Output Power Ready Input Threshold Efficiency TEST CONDITIONS VLBI< 1.12V,lLBO* 1.6mA VLB|>1.18V,ILBO--1MA PRHigh,lpR = -1uA PR Low, Ipp » 1 mA 5mA < ILOAD 1150mA
LIMITS MIN 1.12 - - - V+-1 - - - -
TYP -0.5 0.01 - - VOUT -0.2 0.3 0.7 75
MAX 1.18 - 10 0.4 - - - - - NOTE: 1. Not tested, guaranteed by design and characterization. * Commercial Temperature Range - 0°C to +70°C Industrial Temperature Range - -40°C to +85°C * Commercial Temperatur· Range - 0°C to +70°C Industrial Temperature Range - -40°C to +85°C
up (or bootstraps) a higher voltage that, in turn, is used as the supply for further op
eration. This supply yields higher efficiency because the bootstrapped voltage drives the gate of the internal power FET to a lower on-resistance.
When power is first applied, the circuit is very inefficient (for the first cycle) until a higher voltage is generated on the flyback half of the first cycle. This higher voltage is rectified and filtered and powers the entire IC (and thus the oscillator) for the next cycle. Because each cycle generates a higher voltage for the next cycle, the voltage builds up very rapidly. An internal regulator limits the voltage to about 12 V. The load for this supply is only the CMOS chip itself, so the requirements for the components (particularly the external inductor Lj) are very broad. The voltage is brought out to the V+ pin and connected to a tantalum capacitor for filtering.
This bootstrapped 12 V drives an internal Af-channel power FET that furnishes switching power for the load. Because the gate of this FET is driven from a 12-V supply, the FET has a very low on-resistance and can efficiently switch high cur
rents through a second inductor L2. It is the power stored in L2 that is delivered to the 5-V load through external Schottky diode Dr The rectified and filtered 5-V out
put is connected back to the OUT pin to provide feedback. The IC thus has two sep
arate switching circuits and uses two separate inductors.
5.6.2 Pin Functions and Circuit Details
Figures 5-43 and 5-44 show the pin functions and typical circuit connections, respectively. The Table 1 referred to in Fig. 5^44 is Table 5-2 in this book.
As shown in Fig. 5-44, the higher-value inductor Lj is typically 4.7 mH and may have fairly high losses. Lx is used for the low-power section of the circuit. The Lj voltage is rectified by an internal diode and routed to pin 2 (V+), where the volt
age is filtered by external capacitor Cr
The second inductor L2 varies from 39 to 500 μΗ, depending on input voltage and load current. Table 5-2 shows some typical L2 inductance values for various batteries and input voltages. L2 must have low series resistance and sufficient core material to handle the load power without saturating (see Chapter 3).
Inductor L2 is connected to pin 1 (LX2), and to the drain of the FET. The L2 volt
age is rectified by an external Schottky diode Dj and filtered by an external capacitor C2. This is the main +5-V output (+3 V for the ICL647), and it is connected to OUT (pin 10), which is the feedback input in the high-power mode. Figure 5-45 shows a similar circuit for the ICL646 using an external FET for higher-power output.
5.6.3 Low-Power Standby Mode
A CTL (control) pin (13) is available for putting the IC into standby mode to conserve power. When the CTL pin is held low (as shown in Figs. 5-44 and 5^45), the IC operates in the high-power mode. When CTL is driven high or left open, the following occurs: the PR power-ready pin (11) is driven low, the high-power FET is gated off, the 12-V (V+) switching supply is reduced to 5 V (+3 V for the ICL647) and is connected to the OUT pin (10).
ICL646, ICL7646 PIN NUMBER - 1 - 2 3 - 4
I
5 6 8M4 9I
10I
11 | 7 13 12ICL644, ICL7644 ICL645, ICL7645 ICL647, ICL7647 1 - 2 - 3 7 4 5 6 8* 9 10 11 12,14 13 -
NAME LX2 vcc V+ v+ l/C GNO VREF LBO LBI NC •so LX1 OUT PR HP.GND CTL 0
FUNCTION Output drain of high power N-channel MOS FET. Connect to battery positive terminal. Output of low power up converter, 10 to 15V in high power mode. 4.5V to 5.5V in standby mode. Output of low p^wer up converter. 10 to 15V in high power mode. 2.6 to 3.6V in standby mode. Internal Connection. Leave this pin unconnec ed. "Do not ground." Low power ground. 1.295V bandgap reference output; should be decoupled with a capacitor to pin 7. This terminal is high impedance and cannot source or sink current. Low battery monitor output Sinks 1.6mA when LBI is less than 1.17V, otherwise sources 1 μΑ from V+. Low battery monitor input. Very high input impedance. No connection. "Shutdown pin on ICL764X series and no connect pin on ICL64X series. Allows user to turn part off by grounding pin 8. Output (drain) of low power N-channel power driver. +5V (+3V on ICL647). Feedback (input) pin for high power operation; output pin in standby mode. Power ready output; high (+5V on ICL644, 645, 646; +3V on ICL647) when high power converter is ready to supply power. High power ground. Control mode switch input; open circuit or high for standby mode, ground for high power mode. Driver output to external FET. Output voltage swings from GND to y our- ~ j Figure 5-43· Pin functions for low-voltage step-up converter (Harris Semiconductor, Linear and Telecom ICs, 1991, p. 2-90
01
«7/*.H 1NS617
GNO , C L 7 e 44 ICL7B47 CTL HP GNO LBO IC PR LI - TOKO
PART NUMBER
»STLY - 472
■ # 7 C2
220μΡ
ί
22μΡ C I
SEE TABLE t.
FOR L2 INOUCTOR PART NUMBERS
Pin 8 uMd on 764X ttrim only.
Figure 5^44. Typical circuit connections (Harris Semiconductor, Linear and Telecom ICs, 1991, p. 2-91)
By lowering the internal 12-V supply to 5 V, the leakage currents of the CMOS circuits and the losses associated with the voltage reference and oscillator are reduced to a minimum. The internal low-power 5-V supply can furnish up to 500 μΑ and is connected to the normal 5-V output pin (10), thus supplying current to the load and keeping alive any standby circuits.
5.6.4 Power-Ready Output Pin
During initial start-up (and when placed in standby mode) the internal volt
ages are too low to drive the power FET efficiently. A separate comparator deter
mines when this voltage has reached a high enough value to drive the FET. The output of this comparator gates the FET drive voltage. This scheme extends battery life in standby mode and prevents the power FET from stalling when switching to a high-power mode. The comparator output is also brought out to the power-ready PR pin and can be used to control external circuits, further reducing battery drain.
5.6.5 Start-up and Mode Considerations
The IC may be started up in either the low-power (standby) or high-power mode. When starting in the high-power mode, both the low-power switch and the high-power switch start immediately. Whether or not the load is connected, the out
put voltage rises to 5 V in the first few cycles. The OUT pin becomes an input for feedback to control regulation.
If the high-power load (greater than about 500 μΑ) is connected to the OUT pin, and the IC is placed in the low-power mode (CTL pin driven high or left open), the low-power oscillator must furnish all of the 5-V power through the OUT pin, causing the low-power oscillator to stall. Therefore, it is important to disconnect any
Table 5-2. Minimum inductance for common batteries (Harris Semiconductor, Linear and Telecom ICs, 1991, p. 2-94) 1 BATTERY TYPE | 1NiCada(ICL644) | 1 Alkaline (ICL644) | 1 Alkaline (ICL644) | 2NiCad3(ICL645) | 2 Alkaline· (ICL645) | 1 Lithium (ICL645) | 1 NiCad(ICL646)·· | 1 Alkaline (ICL646)- | 1 Alkaline QCL647)
BATTERY VOLTAGE MIN 1.15V 1.20V 2.5V 2.30V 2.40V 2.60V 1.15V 1.20V 1.20V
MAX 1.35V 1.55V 3.5V 2.70V 3.10V 3.60V 1.35V 1.55V 1.55V
OUTPUT 5V 5V 5V 5V 5V 5V 5V 5V 3V
43mA 43mA 150mA 64mA 62mA | 64mA 250mA 275mA 60mA
COIL SPECIFICATIONS <L2) TOKO 8RBS 262LYF SERIES | μΗ· ] 39 47 33 68 82 | 100 12 6.8 39
OHMS J 0.09 0.10 0.80 0.18 0.17 j 0.22 0.049 0.037 0.09
PART NO -0087K -0088K -0086K -0090K -0091K | -0092 | -0081 | -0079 | -0087 Coils ara from Toko. Inductanea (μΗ) is tha MINIMUM allowed «or the listad battary voltaga ranga (Battary Voltaga: MIN. MAX), Lower vaJuaa ara not racommandad. except whan using tha ICL646/7646 eonvartara since they usa an external MOSFET. If lass currant than Hatad in tha Output column is naadad. a highar inductanea coil wël raduca loaaaa. Tha optimum induct· ' Thasa ICL646 circuita uaa an external curant switch. Peak switch currant is typically 3 5A.
anca variaa mvarsaly with raquirad output currant 4 aN other condlion unchangad. For example, refer to ima 3 and tha 10mA output. ΐ20μ supplias this currant more efficiently than tha 39μΗ coil of line 2.12 ma be calculated using the equations in the Inductor Selection Section.
load currents (greater than 500 μΑ) whenever the low-power or standby mode is se
lected. The power-ready PR pin can be used to disconnect the load through an exter
nal transistor. With this method, both the mode and high-power load connections are controlled through the CTL input.
5.6.6 Input Filtering
It is important to limit the rate of rise of the battery voltage when the circuit is first turned on, either with a mechanical switch or by the installation of batteries. A simple RC network made up of the battery internal resistance and a 10-μΡ tantalum capacitor connected at the battery side of L2 input is sufficient. This capacitor also helps absorb the (relatively) high peak currents that are drawn from the battery in the high-power mode.
5.6.7 Output Filtering
It is also important to limit the speed at which V+ decreases to 5 V when the mode is switched from high power to standby. This is done with a 22-μΡ capacitor connected between the V+ and OUT pins. A 220-μΡ capacitor connected at the OUT pin also provides filtering and serves to maintain the 5 V during the switchover period. Without these capacitors, the 5 V might produce a negative spike during the switchover.
5.6.8 Low-Battery Function
A completely independent low-battery monitor is built into the IC. The moni
tor input LB1 is the positive input of a CMOS comparator. The negative input is connected to the internal 1.17-V bandgap reference. This input can be connected di
rectly to the battery in single-cell circuits or connected to a high-resistance voltage divider for higher-voltage monitoring. The output LBO can sink 1.6 mA or source several microamperes from V+.
5.6.9 Shutdown Function
The ICL764X series is equipped with a shutdown feature. Pin 8, an NC, or no- connect, pin on the ICL64X series, is used to power the IC down. During shutdown, the IC draws less than 5 μΑ quiescent current. The ICL764X can be shut down by grounding pin 8. When pin 8 is left open (floating), the ICL764X series is identical to the ICL64X series.
5.6. ΊΟ Inductor Selection
Now we come to the much-dreaded calculations for selecting the inductor.
Compare the following information with the inductor-selection calculations in Chapter 3.
The choice of the low-power inductor Lj is not critical. A 4.7-mH coil with a DC resistance less than 40 Ω is adequate for most applications. In general, higher in
ductance values allow lower start-up voltage, and lower resistances produce lower quiescent current in the standby mode. If the inductance is made too high, the low- power (V+) output voltage and current are reduced. This, in turn, reduces the effi
ciency of the power section, so the +5-V output (in standby mode) supplies less current. Lower values of inductance raise the minimum start-up voltage.
The high-power coil L2 must store most of the energy that flows into the load.
Accordingly, L2 should have a powdered-iron or ferrite core and should have low resistance to minimize losses. L2 must also have an adequate current rating to pre
vent saturation.
Calculating the worst-case inductor value for L2 is a two-step process. The first step involves determining the smallest inductor value (LMIN) that will not cause the circuit to exceed the peak current rating of the ICL644,45, and 47 with the high
est expected input voltage VIN(MAX), the longest on-time t0N(MAX), and the lowest total resistance R(MIN)> which is the sum of the minimum coil and FET resistances.
Note that this peak current refers to the inductor and FET switch and is several times the load current.
The following example assumes the minimum frequency f0(MIN) and the max
imum %ON(MAX) f°r m e calculation of t0N(MAX). Although the calculated value for tON(MAX) is above that specified in the electrical characteristics table (49 ps), the ex
ample is still valid and yields a worst-case minimum inductor value.
Note that units with both f0(MIN) and %0N(MAX) v a m e s n e a r m e enc*s °f m e al
lowed distributions will be rejected for tON(MAX). From Fig. 5-42:
W ^ x 2= 1-5 A
RDSON(MIN) = 0 · 4 "
*0(MiN)= 15-5 kHz Duty-cycle maximum, %ΟΝ(ΜΑΧ) = 0·^·
Then:
WMAX) = %ON(MAx/fo(MiN)= 0.8/15,500 = 51.6 ps.
Assume that the minimum coil resistance RC0IL(MIN) is 0.1 Ω. The minimum total resistance R(MIN) is:
RDS0 N (MIN) + RCOIL(MIN) = 0 4 + 0 1 = °5 Ω·
Then:
V
lw = 1.5 A = 1 N ( M A X ) X [ 1 - e-R(MIN)Xt0N(MAX) / L(MIN)]
Λ(ΜΙΝ)