2.3 Lead-Free Soldering and Bonding Processes .1 Basic Soldering Processes
2.3.3 Oxidation-Free Fluxless Soldering Technology
Fundamentally, this technology provides oxidation-free environment from the beginning to the end, i.e., from solder manufacture to solder joint formation.
There are four basic requirements: (a) oxidation prevention measure during solder manufacture, (b) capping layer to block oxygen penetration into the solder afterwards, (c) capping layer being dissolved into and becoming a part of the solder joint, and (d) proper environment to inhibit oxidation during the bonding process. Since we reported this technology in 1991 [55], it has been applied to developing various fluxless processes based on Sn-Au, Sn-Cu, Sn-Ag, Sn-Bi, Sn- In, In-Au, In-Cu, In-Ag binary systems and In-Pb-Au ternary system [69–77].
We now present our recent bonding processes based on Sn-Ag and In-Ag systems, respectively, to illustrate these fundamental requirements [77, 78]. The
process using Sn-Ag system is chosen as a representative one because Sn-rich Sn-Ag alloy gets oxidized easily. Thus, it is particularly difficult to achieve fluxless feature. The process based on In-Ag system is interesting as it involves transient liquid phase bonding effect where the molten phase solidifies even at the bonding temperature due to solid liquid reaction.
To begin, a thin 0.03mm Cr layer and 0.1mm Au layer are deposited on a Si wafer in a high vacuum E-beam evaporator (210–6torr). The Cr layer acts as an adhesion layer and the Au layer prevents the Cr from oxidation. The Cr/Au dual layer is used as a seed layer of electroplating as well as the underbump metallurgy (UBM). A 10mm layer of Sn is then electroplated in a stannous Sn- based bath at 21.5 mA/cm2in 25 min. The plating bath temperature and pH value are 468C and 1, respectively. Then, Ag film is plated over Sn layer for 1 min expecting 0.2mm thickness. Prior to the Ag plating process, the sample is chemically treated to reduce the possibility of an oxide layer over the Sn. The Ag plating bath is a cyanide-free, mildly alkaline plating solution at pH 10.5. The current density and process temperature are 4 mA/cm2and room temperature, respectively. Expected composition of the joint is 96.9 at.% Sn and 3.1 at.% Ag, which is near the eutectic composition of the Sn-Ag system. The Ag layer over the Sn prevents the inner Sn layer from oxidation. This Si wafer with Cr/Au/Sn/
Ag structure is diced into 4.5 mm4.5 mm chips. Another Si wafer is deposited with 0.03mm Cr, followed by 0.1mm Au in one vacuum cycle again, and diced into 6.5 mm6.5 mm substrates. The Si chip and substrate are held together with a static pressure of 50 psi (0.35 MPa) in a graphite fixture to ensure intimate contact. The assembly is mounted on a graphite heating platform inside a small vacuum chamber that is pumped down to 100 millitorrs. The graphite platform is heated using a temperature controller/driver. The fixture temperature is monitored by a thermocouple and controlled by the temperature controller. Optimal bonding temperature appears to be 2408C with a dwell time at peak temperature of 1 min. Reflow time is about 6 min. The heating platform is turned off and the assembly is allowed to cool naturally to room temperature in the same vacuum ambient.
Figure 2.9 depicts the schematics of the bonding principle. As mentioned earlier, the electroplated Si chip (with Cr/Au/Sn/Ag) and Si substrate deposited with Cr/Au are placed together and mounted on the heating platform inside a vacuum chamber that is pumped to 100 millitorrs. In the solder structure on the Si chip, thin Ag layer covers the inner Sn as illustrated in Fig. 2.9(a). The melting temperature of the designed composition (96.9 at.% Sn and 3.1 at.%
Ag) is slightly higher than Sn-Ag eutectic point of 2218C. As temperature increases towards the bonding temperature of 2408C, the thick Sn layer melts at 2328C and the molten Sn starts to react with the Ag capping layer to initially form Ag3Sn intermetallic compound and subsequently dissolve this layer to turn into Sn-rich (L) phase. The molten (L) phase would wet the Au layer on the substrate to form AuSn4intermetallic compound, as shown in Fig. 2.9(b). As temperature goes up to 2408C bonding temperature, the (L) phase dissolves the Ag3Sn and AuSn4intermetallics completely, depicted in Fig. 2.9(c). When this
happens, the essential condition of producing a joint is achieved. Upon cooling down to room temperature, the joint solidifies and is expected to consist of small AuSn4and Ag3Sn intermetallic grains in a Sn rich matrix, indicated in Fig. 2.9(d).
The samples fabricated are examined by a reflection mode SAM (C-SAM) to evaluate the quality of fluxless Sn-Ag joints. Figure 2.10 shows C-SAM images of two samples. In the reflection mode SAM, the voids show up as bright spots
Silicon Substrate Cr
Au Cr Au Plated Ag Silicon Chip
Plated Sn
(a) As deposited
Au-Sn Intermetallics
(b) At melting temperature of Sn
Molten Sn + AuSn4+ Ag3Sn
Cr
Cr Au Silicon Substrate
Silicon Chip
Molten Phase
Silicon Substrate Silicon Chip
Cr
Cr
(c) At bonding temperature of 240°C
(d) After cooling to room temperature Silicon Substrate
Silicon Chip
Cr
Cr
Sn rich matrix + AuSn4+Ag3Sn
Fig. 2.9 Principle of the fluxless bonding using Sn-Ag multilayer structure [77]
on a gray background. The joints are virtually void free. To study the micro- structure of the joint, several samples are cut in cross-section and polished.
SEM and EDX analysis are used to examine the cross-section of these samples.
Figure 2.11 exhibits the secondary electron (SE) image of a joint cross section.
The bonding layer is quite uniform with a thickness of 2.5mm, which is less than expected. The reason is that significant amount of molten Sn is squeezed out in the bonding process. This molten Sn wets, reacts with, and stays on the area of Cr/Au coated substrate not covered by the chip. The surface of the cross section is not as smooth as desired, caused by the polishing process that still needs to be refined. The SEM image shows a homogeneous phase with about 97 at.% of Sn.
To our surprise, Ag3Sn and AuSn4intermetallic grains are not observed. One possible reason is that the SEM image does not pick up very small AuSn4or
1mm 1mm
Fig. 2.10 Reflection scanning acoustic microscope (C-SAM) image of two samples bonded using fluxless Sn-Ag joint. The joints are virtually void free [77]
Fig. 2.11 SEM images of a eutectic Sn-Ag joint at 10,000x magnification [77]
Ag3Sn grains with adequate contact. Another possibility is that the small amount of Au and Ag is not enough for intermetallic nucleation in the Sn matrix. In the latter case, the Au and Ag atoms are just dissolved in Sn to form a solid solution. The solder joints are very strong. We tried to break the joint with a hand tool but the silicon chip always break first. A de-bonding test is performed on several samples to measure the melting temperature. The melting temperature ranges from 219 to 2268C, which is close to the expected solidus temperature.
We next move onto the In-Ag process [78]. Figure 2.12 depicts the bonding design. Layer of Ag is electroplated on the silicon chip. The substrate chosen is Cu laminated with 280mm thick of Ag foil by a new direct bonding process developed recently. In (Indium) is electroplated on the Ag foil, followed by a cap layer of Ag. We have found that electroplated In over Ag foil does not exist as pure In, but forms AgIn2IMC layer by reaction with Ag atoms during the plating process. AgIn2has an interesting characteristic; at 1668C, it turns into a mixture of In-rich molten phase (L) and Ag2In solid grains. This situation continues until temperature reaches 2058C. At and above 2058C, Ag2In grains convert tog-phase grains. Thus, between 166 and 2058C, the (L) phase exists and can react with the Ag layer on the Si chip. In experiment, the Si chip is placed over Ag-laminated Cu substrate and held with static pressure to ensure intimate contact. The bonding is performed at 2058C for 3 min in 50 millitorr vacuum. Many samples were fabricated. When we tried to break the samples with a hand tool, the silicon chip always broke first. It means that the joint is really strong. To study the microstructure, several samples were cut in cross section and polished. SEM and EDX analysis were used to examine these samples. Figure 2.13 (a) and (b) are the secondary electron images of a joint cross section. Three distinct layers are identified as Ag/Ag2In/Ag. While 6mm of Ag still remains on the chip side connected to silicon, the Ag2In layer has grown to 18mm, resulting from rapid solid liquid reaction between Ag and the molten phase (L). Based on the observations, we present bonding mechanism. As temperature increases towards the bonding temperature of 2058C, the AgIn2
layer starts melting at 1668C and converts to a mixture of molten phase (L) and
Copper Substrate Laminated Silver
Plated Ag
Silicon Chip Cr
Plated In
Plated Ag (cap layer)
Au
Fig. 2.12 Design of bonding process between Si/Cr/Au/Ag and Cu/Ag/In/Ag [78]
Ag2In solid grains. The molten phase now reacts with upper and bottom Ag layers and dissolves some of the Ag layers and a joint is formed. After cooling down to room temperature, the resulting joint would consist of Ag, Ag2In, and AgIn2layers. The SEM image in Fig. 2.13 shows that the joint consists of only Ag and Ag2In without AgIn2. The absence of AgIn2 indicates that,
17~18µm Ag2In 6µm Ag
Ag Si
Laminated Ag
Cu
(a)
(b)
Fig. 2.13 Secondary images of the joint cross-section. The joint consists of three distinct layers of Ag, Ag2In, and Ag layers,(a)low magnification(b)high magnification [78]
during the bonding process, the molten phase (L) dissolves enough Ag and turns into Ag2In completely. The Ag2In compound is in solid phase at the bonding temperature. Therefore, the joint solidifies during the bonding process and before cooling to room temperature. This effect is usually referred to as transient liquid phase bonding. At and beyond 3008C, Ag2In turns into g phase which remains solid until temperature reaches 6308C.
Thus, the joint produced has very high melting temperature even though it is made at 2058C.