Literature review: On-line Testing of Digital VLSI Circuits and Decision
2.2 Literature review: On-line testing of digital VLSI circuitscircuits
2.2.1 Signature monitoring in FSMs
Signature monitoring techniques for OLT basically work by studying the state sequences of the FSM model of a sequential circuit during its operation. Signatures are FSM state sequences traversed during execution. In these methods, signatures are analyzed concurrently with the execution of the circuit. This analysis targets to detect faults leading
Table 2.4: Merits and demerits of BIST
Merits Demerits
• Reduced parasitics, loading, etc. due to absence of ATE, probes, packaging, etc.
• Reduced test point access problem.
• Startup, at-speed and in-situ testing supported.
• High on-chip hardware overhead when compared to ATE based testing.
• On-chip BIST hardware design com- plexity
– Signal application.
– Signal tapping.
– Test evaluation.
• Test of BIST hardware.
• Cannot detect faults that develop on the fly.
• CAD tools for automated BIST circuit design are rare or application specific.
• On-chip power consumption
Table 2.5: Merits and demerits of OLT
Merits Demerits
• All advantages of BIST holds.
• On-line detection of faults is possible avoiding suspension of normal opera- tion.
• Area and power overhead of the OLT circuit.
• On-chip tester area overhead is higher compared to area requirements of BIST.
• Testing of the OLT circuit.
• No CAD tool for generating on-line test circuits is widely accepted or available commercially.
to illegal paths in the control flow graph, i.e., paths having transitions which do not exist in the FSM specification. To ensure that the runtime signature of the fault free FSM is different from the one with fault, asignature invariant property is forced during FSM synthesis. The principle of signature monitoring for FSMs has been proposed in [66,67]. Figure 2.7 illustrates the basic architecture for OLT using the scheme of signature monitoring in FSMs. The main component of the monitor is a Multiple Input Shift Register (MISR), which generates a signature using the polynomial division of the codes of the state that is reached during normal operation. So the runtime signature represents a value of the path followed through the control-flow graph of the FSM. A primitive polynomial is used to perform division in order to reduce the fault masking (also called “aliasing”). The correct values of the signature are pre-computed from the specified FSM graph and are compared with the runtime signature at some special states called checking points. To ensure that the runtime signature of the normal circuit FSM is different from the faulty one, an invariant property is forced during FSM synthesis and can be stated as [67]:
Signature invariance property: The signature of the sequence of state codes obtained by polynomial division with the primitive divisor polynomial is invariant after each state in the graph, when any legal path is taken. Checking involves comparison of the runtime signature with the invariant reference signature when the current state corresponds to any selected check points. To obtain an FSM with signature invariance property the state assignment procedure is modified to take into account the constraints related to such an invariance. The approach has been proved to be feasible in [66, 67] and several implementations based on this approach have been reported in [22, 100, 115].
The major advantage of the schemes based on signature monitoring is due to the fact that the area overhead incurred for OLT is extremely low (and almost negligible in cases of FSMs with large number of states); the results presented in [67] has reported that the area of the additional circuit required for OLT is about 1% to 5% of the CUT when the FSM is large. It is also discussed in [67] that detection latency may be high for some FSMs which can be remedied by increasing the number of checkpoints, however, incurring more area overhead. The hybrid signature monitoring scheme reported in [22] detects control flow errors caused by transient and intermittent faults. It is shown that the scheme has offered very high fault coverage with low detection latency and area overhead. In [115], a concurrent control flow error detection and recovery mechanism has been proposed using encoded signature monitoring technique. The scheme recovers from most of the control flow errors with relatively low performance overhead.
However, many times by default, signature invariance is not present. In that case, the
function Next state
Output logic
State register
MISR
logic Reference
signal
Comparator PO
PI
Status
FSM for the circuit Signature monitor
Comparison
Figure 2.7: Basic architecture for signature monitoring
state assignment procedure of the FSM may have to be modified to take into account the constraints related to such an invariance. In other words, signature monitoring techniques for OLT require some special properties in the circuit structure, so they require re-synthesis and re-design, which lead to a change in the original structure of the circuit; they are accordingly termed as intrusive OLT methodologies. In the worst case, when the FSM graph is well connected, a large number of new states are added to achieve the signature invariant properly. Further, the state explosion problem in FSM makes the application of this scheme difficult for practical circuits; results reported in the OLT literature using these schemes are limited to circuits having typically about one hundred states.